SATA-IP Introduction. Agenda
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1 Introduction Ver1.3E Support Virtex-6/Spartan-6! Magician of the Storage! 2012/7/31 Design Gateway Page 1 Agenda SATA Overview Summary, Features and Trend Merit and Solution Introduction Summary Application 2012/7/31 Design Gateway Page 2
2 What is SATA? Standard storage interface of HDD/SSD SATA1.0 released in year 2000, the latest standard is SATA3.0. Improved from IDE (Parallel-ATA) Cable(from 80 line 46cm to flat narrow cable 1m) High-speed (PATA: Max.133MB/s -> SATA: Max.600MByte/s) Jumper setting is not required anymore. Jumper setting is required to select Master/Slave 2012/7/31 Design Gateway Page 3 Popular Features of SATA device Compatibility. Easy to replace. Commodity. Easy to buy. Low price 3.5 HDD 2TB is approximately 65USD 2.5 SSD 64GB is approximately 100USD (Sep 2011, in Japanese market) 2012/7/31 Design Gateway Page 4
3 Trend of SATA device SATA storage is switching to SSD from HDD. SSD has advantage compared with HDD in toughness & silence. HDD has advantage compared with SSD in capacity and price. 2012/7/31 Design Gateway Page 5 Merit of SATA adoption Huge non-volatile storage GigaByte/TeraByte capacity. High-speed and Low cost Several Megabyte per second Read/Write speed Mass produced goods Compatibility Easy and quick to repair and recover, just replace. Your product lineup will be various with different capacity storages Just change storage capacity to arrange various products from high-end model to low cost model. 2012/7/31 Design Gateway Page 6
4 Solution for embedded system 1:Use Existing SATA chip (ASSP) Merit: Device cost Demerit: Limitation of MOQ, support and fixed function 2:Use FPGA+ core Merit: Flexibility, support special usage such as RAID, MOQ etc.. Demerit: Device cost (In case of SATA function only) Conclusion: If the system is simple function and the availability is acceptable, ASSP may be better for you. For other case, FPGA + core is best solution for you!! 2012/7/31 Design Gateway Page 7 What is? Implement SATA channel by MGT resource. IP-Core includes Link layer (and some part of Transport layer). Reference Design available for PHY layer and Transport layer. Reference Design provides Transport layer design IP-Core includes Link layer Reference Design provides PHY layer design 2012/7/31 Design Gateway Page 8
5 Product Lineup Part number & supported devices 001 : For Virtex-5LXT/Virtex-5SXT 002 : For Virtex-5FXT 003 : For Spartan-6LXT 004 : For Virtex-6LXT 2012/7/31 Design Gateway Page 9 Supports both of Host and Device Single IP-Core supports both of Host (PC side) and Device (Disk side). Switch between Host Core and Device Core by dev_host_n signal input. dev_host_n = GND = VCC SATA Host Core SATA Device Core 2012/7/31 Design Gateway Page 10
6 Approved IP-Core by Xilinx URL = /7/31 Design Gateway Page 11 HDD performance Extracts HDD maximum performance Bottle neck exists not in SATA interface but in HDD internal. Transfer speed varies between outer and inner area of the disk. HDD sequential access performance of 2012/7/31 Design Gateway Page 12
7 SSD performance More than 200MB/s transfer speed by the latest SSD. Achieves SSD specification performance. Best for high-speed large-capacity storage application. Extracts maximum performance from SSD 2012/7/31 Design Gateway Page 13 Free Bit-file for Evaluation (1) Serial communication with PC as Host side. Write/Read access to/from SATA device. Measure transmission speed. Example of write transfer Set address, sector count and type of data pattern Measure transmission speed and display the result 2012/7/31 Design Gateway Page 14
8 Free Bit-file for Evaluation (2) Free bit-file for Evaluation on Xilinx FPGA boards. ML505, ML506, ML605, SP605 Downloadable from Web page. Serial communication Software (such as Hyper Terminal) Serial JTAG 2 miniusb cables SP-605 board impact Adaptor Board (Option) AB01-PCIe2SATA evaluation environment SATA-II SSD/HDD 2012/7/31 Design Gateway Page 15 Reference Design (Summary) EDK Project Design of Evaluation bit-file. Provide all source code (include firmware) except IP core. It helps your development term reduce. Check and study original reference design. Modify the reference and check operation on real board to be final product step by step. No risk to back to rebuild, able to develop for short term! 2012/7/31 Design Gateway Page 16
9 Reference Design (Structure) DDR2 Memory Read/Write data is stored to external DDR memory Processor Sub-System Processor Local Bus (PLB) Multi-Port Memory Controller (MPMC) Native Port Interface (NPI) MPMC controls DMA Interrupt Controller Processor Local Bus (PLB) Local Memory Bus (LMB) For serial communication with PC UART Timer PLB I/F LMB I/F MicroBlaze (CPU) BRAM Ctrl Control whole system by firmware on MicroBlaze Ctrl INT Data NPI-SATA Ctrl SATA IP NPI bridge Link layer (IP core) Reference Design SATA PHY PHY layer Serial Port SATA II Device Block diagram of reference design 2012/7/31 Design Gateway Page 17 Development tool for RAID Adapter board with 10 SATA Host connectors. Connector for FMC-HPC of ML605 connection. Direct connect to 2.5 inch SSDs or HDDs. Adaptor Board for RAID development P/N: AB09-SATAFMC 5 SATA connectors on top side and 5 SATA connectors on bottom side Evaluation board supporting FMC-HPC I/F (such as ML605) 2012/7/31 Design Gateway Page 18
10 Application (1) Advanced High-definition Video Recorder Parallel access by RAID to provide enough bandwidth 2012/7/31 Design Gateway Page 19 Application (2) User removes USB dongle Key When leaving from desk. Encryption key inside Not able to read any correct data from SATA device without USB dongle key. Security Drive System 2012/7/31 Design Gateway Page 20
11 EDK-based RAID System design DDR2 SO-DIMM Reference Design provides connection template via NPI Processor Sub-System Instruction & Data RAM PLB NPI DMA Engine for External I/F Serial Port Microblaze UART TIMER MPMC NPI NPI NPI DMA Engine DMA Engine DMA Engine Transport & Link Layer Interface Transport & Link Layer Interface Transport & Link Layer Interface SATA PHY (GTP) SATA PHY (GTP) SATA PHY (GTP) SATA I/II Hard disk SATA I/II Hard disk SATA I/II Hard disk Can add/remove SATA channel count on EDK platform NPI DMA Engine Transport & Link Layer Interface SATA PHY (GTP) SATA I/II Hard disk BRAM Ctrl Interrupt Address/Data Decoder RAID system easy design based on EDK Easy and short term RAID system development is now possible! 2012/7/31 Design Gateway Page 21 For more detail Detailed documents available on the web site. Contact Design Gateway Co,. Ltd. sales@design-gateway.com FAX : /7/31 Design Gateway Page 22
12 Revision History Rev. Date History English version initial release Add introduction of summary of SATA Update explanation of RAID development tool (AB09-FMCRAID board) 2012/7/31 Design Gateway Page 23
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