50GeV KEK IPNS. J-PARC Target R&D sub gr. KEK Electronics/Online gr. Contents. Read-out module Front-end

Size: px
Start display at page:

Download "50GeV KEK IPNS. J-PARC Target R&D sub gr. KEK Electronics/Online gr. Contents. Read-out module Front-end"

Transcription

1 50GeV Contents Read-out module Front-end KEK IPNS J-PARC Target R&D sub gr. KEK Electronics/Online gr.

2 / Current digitizer VME scalar Advanet ADVME2706 (64ch scanning )? Analog multiplexer Yokogawa WE7271(4ch isolation digitizer)? Post AMP (0.7sec current integrator) ADMVE2760

3 BLM Read-out BLM BLM BLM Reset Gate Input-1 Input-2 Output-1 Output-2 16ch Charge AMP (current integrator) Comparator (DAC controllable) 16 ch Analog signal 16ch Digital out To Interlock VME bus 64ch scanning Advanet ADVME2706 Ethernet Interface Prototype current integrator (KEK / ) VME bus EPICS Channel access Control net

4 Magnet local LAN Control Net Power Supply Control Server (PC/Windows) Microsoft ODBC Database (MySQL) EPICS IOC EPICS-SQL device support EPICS Channel access Power Supply Controller Power Supply Controller Power Supply Controller PC/Linux Operation Terminal Power Supply Power Supply Power Supply Power Supply Power Supply KEK / /online group

5 / BLM Prototype 16ch VME current integrator EPICS interface MySQL interface SQL IOC EPICS I/O MySQL Write Read» KEK-PS

6 Detector # of ch. # of detectors Primary Beam Intensity monitor Beam timing (rel.) CT CT 1 20~30 ~4 TDC Position monitor Pickup 4 20? Profile monitor SPIC ~32 40~60? Loss monitor Gas chamber 1 80~100? Beam timing (abs.) GPS 2 or 3 GPS Horn Current monitor CT 1 4~8 F Secondary Beam Profile monitor Pion monitor Ion chamber Cherenkov? ~32 ~40 2? 1 Muon monitor SSD 20 1 Muon profile monitor Ion chamber 64 1 or 2 (~2000 ch) 1 spill 5µsec

7 DAQ BM BM BM BM Front-end system Front-end system T2K DAQ NET Beam monitor T2K DAQ Real-time Data server EPICS IOC Control net EPICS Channel access T2K T2K DAQ

8 Prototype Read-out module A/D card slot A/D card slot A/D card slot A/D card slot PCI (PMC) PMC slot PMC slot PMC slot (Processor) VME 9U euro card(vme) 4 Front-end A/D card slot 2 general PMC slot 1 Processor PMC slot VME interface 512kB x 4 FIFO 32bit 33MHz PCI bus DAQ KEK elec./online/belle DAQ group

9 PCI Mezzanine Card, IEEE PCI PCI/PMC 10mm 149mm PMC Mother Board Processor (PPC/x86/ ) 74mm (VME, CompactPCI, etc) 100Base/Gigabit Ethernet IEEE1394 Ramix PMC610 Memory 4port Ethernet card Etc. x86 PC architecture Linux architecture OS Radisys EPC-6315 Pentium III-m PrPMC PC

10 Front-end daughter card / Front-end daughter card Time Memory Cell (TMC) based pipeline TDC TMC : AMT2 Input : 24ch LVDS 96 ch/board Resolution: 0.78 ns/bit Trigger buffer depth: 8 words 500MHz F 8bit 2ch/FINESSE Analog memory cell 1GHz sample 16bit wave form sampler 5MHz sample High resolution TDC 50psec DSSD pipeline front-end (CMS) Charge sensitive Current integrator type ASIC Prototype of flash : Analog Devices AD Resolution: 12bit Number of channel: 8 Max sampling clock: 40MHz

11 ASIC Current Integrator Bipolar 0.6µm ft : 2~20 GHz KEK electronics group

12 Read-out module DMA : 80MB/sec Trigger Accept : 28kHz 1 event data size : 832B Pentium III-m 800MHz Processor performance Front-end 2 Flash S/N : bit ASIC Current integrator

13 16ch VME current integrator (0.7 sec) EPICS/SQL Read-out platform platform 40MHz Flash ASIC current integrator (6µsec) prototype

Development of a PCI Based Data Acquisition Platform for High Intensity Accelerator Experiments

Development of a PCI Based Data Acquisition Platform for High Intensity Accelerator Experiments Development of a PCI Based Data Acquisition Platform for High Intensity Accelerator Experiments T. Higuchi, H. Fujii, M. Ikeno, Y. Igarashi, E. Inoue, R. Itoh, H. Kodama, T. Murakami, M. Nakao, K. Nakayoshi,

More information

Hera-B DAQ System and its self-healing abilities

Hera-B DAQ System and its self-healing abilities Hera-B DAQ System and its self-healing abilities V.Rybnikov, DESY, Hamburg 1. HERA-B experiment 2. DAQ architecture Read-out Self-healing tools Switch SLT nodes isolation 3. Run control system 4. Self-healing

More information

Development of Beam Monitor DAQ system for 3NBT at J-PARC

Development of Beam Monitor DAQ system for 3NBT at J-PARC 1th ICALEPCS Int. Conf. on Accelerator & Large Expt. Physics Control Systems. Geneva, 1-14 Oct 25, PO1.24-1 (25) Development of Beam Monitor DAQ system for 3NBT at J-PARC M.Ooi 1, T. Kai 1, S. Meigo 1,

More information

New Development of EPICS-based Data Acquisition System for Millimeter-wave Interferometer in KSTAR Tokamak

New Development of EPICS-based Data Acquisition System for Millimeter-wave Interferometer in KSTAR Tokamak October 10-14, 2011 Grenoble, France New Development of EPICS-based Data Acquisition System for Millimeter-wave Interferometer in KSTAR Tokamak October 11, 2011, Taegu Lee KSTAR Research Center 2 Outlines

More information

Development of a New TDC LSI and a VME Module

Development of a New TDC LSI and a VME Module Presented at the 2001 IEEE Nuclear Science Symposium, San Diego, Nov. 3-10, 2001. To be published in IEEE Trans. Nucl. Sci. June, 2002. Development of a New TDC LSI and a VME Module Yasuo Arai, Member,

More information

Data Acquisition in Particle Physics Experiments. Ing. Giuseppe De Robertis INFN Sez. Di Bari

Data Acquisition in Particle Physics Experiments. Ing. Giuseppe De Robertis INFN Sez. Di Bari Data Acquisition in Particle Physics Experiments Ing. Giuseppe De Robertis INFN Sez. Di Bari Outline DAQ systems Theory of operation Case of a large experiment (CMS) Example of readout GEM detectors for

More information

Trigger Layout and Responsibilities

Trigger Layout and Responsibilities CMS EMU TRIGGER ELECTRONICS B. Paul Padley Rice University February 1999 Trigger Layout and Responsibilities Basic Requirements z Latency: < 3.2 us z Fully pipelined synchronous architecture, dead time

More information

Embedded LLRF Controller with Channel Access on MicroTCA Backplane Interconnect

Embedded LLRF Controller with Channel Access on MicroTCA Backplane Interconnect < kazuro.furukawa @ kek.jp > with Channel Access on MicroTCA Backplane Interconnect K. Furukawa, K. Akai, A. Akiyama, T. Kobayashi, S. Michizono, T. Miura, K. Nakanishi, J. Odagiri (KEK) H. Deguchi, K.

More information

S-LINK: A Prototype of the ATLAS Read-out Link

S-LINK: A Prototype of the ATLAS Read-out Link : A Prototype of the ATLAS Read-out Link Erik van der Bij, Robert McLaren, Zoltán Meggyesi EP-Division CERN, CH-1211 Geneva 23 Abstract The ATLAS data acquisition system needs over 1500 read-out links

More information

The ALICE TPC Readout Control Unit 10th Workshop on Electronics for LHC and future Experiments September 2004, BOSTON, USA

The ALICE TPC Readout Control Unit 10th Workshop on Electronics for LHC and future Experiments September 2004, BOSTON, USA Carmen González Gutierrez (CERN PH/ED) The ALICE TPC Readout Control Unit 10th Workshop on Electronics for LHC and future Experiments 13 17 September 2004, BOSTON, USA Outline: 9 System overview 9 Readout

More information

The MROD. The MDT Precision Chambers ROD. Adriaan König University of Nijmegen. 5 October nd ATLAS ROD Workshop 1

The MROD. The MDT Precision Chambers ROD. Adriaan König University of Nijmegen. 5 October nd ATLAS ROD Workshop 1 The MROD The MDT Precision Chambers ROD Adriaan König University of Nijmegen 5 October 2000 2nd ATLAS ROD Workshop 1 Contents System Overview MROD-0 Prototype MROD-1 Prototype Performance Study FE Parameter

More information

ROB IN Performance Measurements

ROB IN Performance Measurements ROB IN Performance Measurements I. Mandjavidze CEA Saclay, 91191 Gif-sur-Yvette CEDEX, France ROB Complex Hardware Organisation Mode of Operation ROB Complex Software Organisation Performance Measurements

More information

Electronics on the detector Mechanical constraints: Fixing the module on the PM base.

Electronics on the detector Mechanical constraints: Fixing the module on the PM base. PID meeting Mechanical implementation ti Electronics architecture SNATS upgrade proposal Christophe Beigbeder PID meeting 1 Electronics is split in two parts : - one directly mounted on the PM base receiving

More information

The GTPC Package: Tracking and Analysis Software for GEM TPCs

The GTPC Package: Tracking and Analysis Software for GEM TPCs The GTPC Package: Tracking and Analysis Software for GEM TPCs Linear Collider TPC R&D Meeting LBNL, Berkeley, California (USA) 18-19 October, 003 Steffen Kappler Institut für Experimentelle Kernphysik,

More information

Takeo Higuchi IPNS, KEK Belle DAQ group. 2009/01/07 SLAC Advanced Instrumentation Seminars

Takeo Higuchi IPNS, KEK Belle DAQ group. 2009/01/07 SLAC Advanced Instrumentation Seminars Belle DAQ System Takeo Higuchi IPNS, KEK Belle DAQ group 2009/01/07 SLAC Advanced Instrumentation Seminars Introduction to the Belle DAQ Belle DAQ Overview trigger decision system clock trigger clock F/O

More information

SBC-COMe FEATURES DESCRIPTION APPLICATIONS SOFTWARE. EnTegra Ltd Tel: 44(0) Web:

SBC-COMe FEATURES DESCRIPTION APPLICATIONS SOFTWARE. EnTegra Ltd Tel: 44(0) Web: A Windows /Linux Embedded Single Board Computer with XMC IO Site FEATURES Combines an industry standard COM CPU module with an XMC IO module in a compact, stand alone design Scalable CPU performance from

More information

ROBIN Functional demonstrator of the ATLAS Trigger / DAQ Read-Out Buffer O.Gachelin, M.Huet, P.Le Dû, M.Mur C.E.A. Saclay - DAPNIA

ROBIN Functional demonstrator of the ATLAS Trigger / DAQ Read-Out Buffer O.Gachelin, M.Huet, P.Le Dû, M.Mur C.E.A. Saclay - DAPNIA 1 ROBIN Functional demonstrator of the ATLAS Trigger / DAQ Read-Out Buffer O.Gachelin, M.Huet, P.Le Dû, M.Mur C.E.A. Saclay - DAPNIA 2 Basic principles Data flow : output < input including L2 and L3 according

More information

A THESIS SUBMITTED TO THE GRADUATE DIVISION OF THE UNIVERSITY OF HAWAI I IN PARTIAL FULFILLMENT OF THE REQUIREMENTS FOR THE DEGREE OF

A THESIS SUBMITTED TO THE GRADUATE DIVISION OF THE UNIVERSITY OF HAWAI I IN PARTIAL FULFILLMENT OF THE REQUIREMENTS FOR THE DEGREE OF USING A PCI SCHEDULER AND A DYNAMIC THRESHOLD TO ENHANCE A HIGH SPEED READOUT SYSTEM A THESIS SUBMITTED TO THE GRADUATE DIVISION OF THE UNIVERSITY OF HAWAI I IN PARTIAL FULFILLMENT OF THE REQUIREMENTS

More information

12-bit CompactPCI Digitizer Selection Table

12-bit CompactPCI Digitizer Selection Table -bit CompactPCI Digitizer Selection Table 36 38 0 bits bits bits 50 MHz 00 MHz 00 and 300 MHz 3) 00 MS/s 00 MS/s 00 MS/s Opt. XA00 required XA00 required XA00 required Ctrl I/O ) < 000 ns < 000 ns < 000

More information

LHC Detector Upgrades

LHC Detector Upgrades Su Dong SLAC Summer Institute Aug/2/2012 1 LHC is exceeding expectations in many ways Design lumi 1x10 34 Design pileup ~24 Rapid increase in luminosity Even more dramatic pileup challenge Z->µµ event

More information

The Belle Silicon Vertex Detector. T. Tsuboyama (KEK) 6 Dec Workshop New Hadrons with Various Flavors 6 7 Dec Nagoya Univ.

The Belle Silicon Vertex Detector. T. Tsuboyama (KEK) 6 Dec Workshop New Hadrons with Various Flavors 6 7 Dec Nagoya Univ. The Belle Silicon Vertex Detector T. Tsuboyama (KEK) 6 Dec. 2008 Workshop New Hadrons with Various Flavors 6 7 Dec. 2008 Nagoya Univ. Outline Belle Silicon vertex detector Upgrade plan R&D and beam tests

More information

PMC-16AI Channel, 16-Bit Analog Input PMC Board. With 500 KSPS Input Conversion Rate. Features Include: Applications Include:

PMC-16AI Channel, 16-Bit Analog Input PMC Board. With 500 KSPS Input Conversion Rate. Features Include: Applications Include: PMC-16AI64 64-Channel, 16-Bit Analog Input PMC Board With 500 KSPS Input Conversion Rate Features Include: 64 Single-ended or 32 Differential 16-Bit Scanned Analog Input Channels Conversion Rates to 500K

More information

Vertex Detector Electronics: ODE to ECS Interface

Vertex Detector Electronics: ODE to ECS Interface Vertex Detector Electronics: ODE to ECS Interface LHCb Technical Note Issue: 1 Revision: 0 Reference: LHCb 2000-012 VELO Created: 1 February 2000 Last modified: 20 March 2000 Prepared By: Yuri Ermoline

More information

GPS time synchronization system for T2K

GPS time synchronization system for T2K GPS time synchronization system for T2K Hans Berns and Jeff Wilkes University of Washington, Seattle SK Collaboration meeting Nov 8, 2007 11/8/07: GPS 1 11/8/07: GPS 2 T2K GPS Time Synchronization: overview

More information

System-on-a-Programmable-Chip (SOPC) Development Board

System-on-a-Programmable-Chip (SOPC) Development Board System-on-a-Programmable-Chip (SOPC) Development Board Solution Brief 47 March 2000, ver. 1 Target Applications: Embedded microprocessor-based solutions Family: APEX TM 20K Ordering Code: SOPC-BOARD/A4E

More information

AD16-16(PCI)EV. Features. High-Resolution Analog Input Board for PCI AD16-16(PCI)EV 1. Ver.1.02

AD16-16(PCI)EV. Features. High-Resolution Analog Input Board for PCI AD16-16(PCI)EV 1. Ver.1.02 High-Resolution Analog Input Board for PCI AD6-6(PCI)EV * s, color and design of the products are subject to change without notice. Features Resolution : 6-bit, combination speed : 0 sec/ch This product

More information

EMU FED. --- Crate and Electronics. ESR, CERN, November B. Bylsma, S. Durkin, Jason Gilmore, Jianhui Gu, T.Y. Ling. The Ohio State University

EMU FED. --- Crate and Electronics. ESR, CERN, November B. Bylsma, S. Durkin, Jason Gilmore, Jianhui Gu, T.Y. Ling. The Ohio State University EMU FED --- Crate and Electronics B. Bylsma, S. Durkin, Jason Gilmore, Jianhui Gu, T.Y. Ling The Ohio State University ESR, CERN, November 2004 EMU FED Design EMU FED: Outline FED Crate & Custom Backplane

More information

Status of the CSNS Control System

Status of the CSNS Control System Status of the CSNS Control System Chunhong Wang Control Group Accelerator Center IHEP 14/10/2011 ICAEPCS2011,Grenoble,France Outline Project Overview Preliminary Design of the Control System Control Task/Scope

More information

Advanced NI-DAQmx Programming Techniques with LabVIEW

Advanced NI-DAQmx Programming Techniques with LabVIEW Advanced NI-DAQmx Programming Techniques with LabVIEW Agenda Understanding Your Hardware Data Acquisition Systems Data Acquisition Device Subsystems Advanced Programming with NI-DAQmx Understanding Your

More information

AD12-16(PCI)EV. Features. Analog Input Board for PCI AD12-16(PCI)EV 1. Ver.1.02

AD12-16(PCI)EV. Features. Analog Input Board for PCI AD12-16(PCI)EV 1. Ver.1.02 Analog Input Board for PCI AD2-6(PCI)EV * s, color and design of the products are subject to change without notice. This product is PCI-compliant interface boards that convert analog input signals to digital

More information

Description of Circuit. Fine Time Measurement : LVDS Receiver/Dribver. Production Readiness Review ATLAS Muon TDC (AMT)

Description of Circuit. Fine Time Measurement : LVDS Receiver/Dribver. Production Readiness Review ATLAS Muon TDC (AMT) ATLAS Production Readiness Review ATLAS Muon TDC (AMT) 2 June 22@CERN Yasuo Arai (KEK) yasuo.arai@kek.jp http://atlas.kek.jp/tdc/prr/ Description of Circuit Fine Time Measurement : LVDS Receiver/Dribver

More information

Heavy Photon Search Data Acquisition

Heavy Photon Search Data Acquisition Heavy Photon Search Data Acquisition Presented by Ryan Herbst PPA Engineering 5/25/2011 1 Overview Data Output & Control 1GigE Read Out Board Ethernet Switch Processor Blade Trigger Board ATCA Crate RTM

More information

PSEC-4: Review of Architecture, etc. Eric Oberla 27-oct-2012

PSEC-4: Review of Architecture, etc. Eric Oberla 27-oct-2012 PSEC-4: Review of Architecture, etc. Eric Oberla 27-oct-2012 PSEC-4 ASIC: design specs LAPPD Collaboration Designed to sample & digitize fast pulses (MCPs): Sampling rate capability > 10GSa/s Analog bandwidth

More information

Features. High-precision Analog input board (Low Profile size) for PCI Express AI-1616L-LPE AI-1616L-LPE 1. Ver.1.01

Features. High-precision Analog input board (Low Profile size) for PCI Express AI-1616L-LPE AI-1616L-LPE 1. Ver.1.01 High-precision Analog input board (Low Profile size) for PCI Express AI-1616L-LPE *Specifications, colors and design of the products are subject to change without notice. This product is a multi-function,

More information

The Use of LabVIEW FPGA in Accelerator Instrumentation.

The Use of LabVIEW FPGA in Accelerator Instrumentation. The Use of LabVIEW FPGA in Accelerator Instrumentation. Willem Blokland Research Accelerator Division Spallation Neutron Source Introduction Spallation Neutron Source at Oak Ridge National Laboratory:

More information

ROB-IN Functional demonstrator of the ATLAS Trigger / DAQ Read-Out Buffer O.Gachelin, M.Huet, P.Le Dû, M.Mur C.E.A.

ROB-IN Functional demonstrator of the ATLAS Trigger / DAQ Read-Out Buffer O.Gachelin, M.Huet, P.Le Dû, M.Mur C.E.A. 1 ROB-IN Functional demonstrator of the ATLAS Trigger / DAQ Read-Out Buffer O.Gachelin, M.Huet, P.Le Dû, M.Mur C.E.A. Saclay - DAPNIA 2 Basic principles Data flow : output < input including L2 and L3 according

More information

Development of high-resolution TDC based on FPGA.

Development of high-resolution TDC based on FPGA. FPGA を用いた high-resolution TDC の開発 Development of high-resolution TDC based on FPGA. 阪大理, 東北大理 A, JAEA B, KEK C, Open-It D @ 本多良太郎, 三輪浩司 A, 細見健二 B, 池野正弘 CD, 内田智久 CD SNP スクール 2017@ 福島 1 Outline Motivation

More information

PC/104 Modules. Short Form. The complete embedded PC solution. CPUs: x86, 386SX, 486DX4, Pentium

PC/104 Modules. Short Form. The complete embedded PC solution. CPUs: x86, 386SX, 486DX4, Pentium PC/104 Modules Short Form CPUs: x86, 86SX, 486DX4, Pentium Peripherals: SVGA, PCMCIA, SCSI, GPS, Sound-Blaster Parallel DSPs, Neural Coprocessor Communication: Ethernet, Multiserial, Can, Profibus, Modem/fax

More information

Detector Data Acquisition Hardware Designs and Features of NGC (New General Detector Controller)

Detector Data Acquisition Hardware Designs and Features of NGC (New General Detector Controller) Detector Data Acquisition Hardware Designs and Features of NGC (New General Detector Controller) Manfred Meyer, Gert Finger European Organisation for Astronomical Research in the Southern Hemisphere, Karl-Schwarzschild-Str.

More information

The Application of DAQ-Middleware to the J-PARC E16 Experiment

The Application of DAQ-Middleware to the J-PARC E16 Experiment Track 1 Session: #3 (Data acquisition and electronics) April 14, 2015 18:00 Village Center The Application of DAQ-Middleware to the J-PARC E16 Experiment E Hamada 1, M Ikeno 1, D Kawama 2, Y Morino 1,

More information

CSC Trigger Motherboard

CSC Trigger Motherboard CSC Trigger Motherboard Functions of TMB Tests: Performance at summer 2003 test beam Radiation, magnetic fields, etc. Plans for TMB production and testing 1 Cathode LCT CSC Trigger Requirements Identify

More information

LHCb Online System BEAUTY-2002

LHCb Online System BEAUTY-2002 BEAUTY-2002 8th International Conference on B-Physics at Hadron machines June 17-21 2002 antiago de Compostela, Galicia (pain ) Niko Neufeld, CERN EP (for the LHCb Online Team) 1 Mission The LHCb Online

More information

AD16-16(PCI)EV. Features. High-Resolution Analog Input Board for PCI AD16-16(PCI)EV 1. Ver.1.01

AD16-16(PCI)EV. Features. High-Resolution Analog Input Board for PCI AD16-16(PCI)EV 1. Ver.1.01 High-Resolution Analog Input Board for PCI AD6-6(PCI)EV * s, color and design of the products are subject to change without notice. Features Resolution :6-bit, combination speed : 0μsec/ch This product

More information

AD12-16(PCI)EV. Features. Analog Input Board for PCI AD12-16(PCI)EV 1. Ver.1.01

AD12-16(PCI)EV. Features. Analog Input Board for PCI AD12-16(PCI)EV 1. Ver.1.01 Analog Input Board for PCI AD2-6(PCI)EV * s, color and design of the products are subject to change without notice. This product is PCI-compliant interface boards that convert analog input signals to digital

More information

Timing System Modules

Timing System Modules Timing System Modules Jukka Pietarinen EPICS Collaboration Meeting, Argonne, June 2006 Timing System Functionality based on the APS timing system Redesigned for SLS Series 100 Improved performance for

More information

Results of Radiation Test of the Cathode Front-end Board for CMS Endcap Muon Chambers

Results of Radiation Test of the Cathode Front-end Board for CMS Endcap Muon Chambers Results of Radiation Test of the Cathode Front-end Board for CMS Endcap Muon Chambers B. Bylsma 1, L.S. Durkin 1, J. Gu 1, T.Y. Ling 1, M. Tripathi 2 1 Department of Physics, Ohio State University, Columbus,

More information

Scintillator-strip Plane Electronics

Scintillator-strip Plane Electronics Scintillator-strip Plane Electronics Mani Tripathi Britt Holbrook (Engineer) Juan Lizarazo (Grad student) Peter Marleau (Grad student) Tiffany Landry (Junior Specialist) Cherie Williams (Undergrad student)

More information

Choosing the Right COTS Mezzanine Module

Choosing the Right COTS Mezzanine Module Choosing the Right COTS Mezzanine Module Rodger Hosking, Vice President, Pentek One Park Way, Upper Saddle River, New Jersey 07458 Tel: (201) 818-5900 www.pentek.com Open architecture embedded systems

More information

ATLANTIS - a modular, hybrid FPGA/CPU processor for the ATLAS. University of Mannheim, B6, 26, Mannheim, Germany

ATLANTIS - a modular, hybrid FPGA/CPU processor for the ATLAS. University of Mannheim, B6, 26, Mannheim, Germany ATLANTIS - a modular, hybrid FPGA/CPU processor for the ATLAS Readout Systems A. Kugel, Ch. Hinkelbein, R. Manner, M. Muller, H. Singpiel University of Mannheim, B6, 26, 68131 Mannheim, Germany fkugel,

More information

The LHCb upgrade. Outline: Present LHCb detector and trigger LHCb upgrade main drivers Overview of the sub-detector modifications Conclusions

The LHCb upgrade. Outline: Present LHCb detector and trigger LHCb upgrade main drivers Overview of the sub-detector modifications Conclusions The LHCb upgrade Burkhard Schmidt for the LHCb Collaboration Outline: Present LHCb detector and trigger LHCb upgrade main drivers Overview of the sub-detector modifications Conclusions OT IT coverage 1.9

More information

Front End Electronics. Level 1 Trigger

Front End Electronics. Level 1 Trigger 0. CMS HCAL rigger and Readout Electronics Project he overall technical coordination for the HCAL trigger and readout electronics (ri- DAS) project will be located in the Maryland HEP group, led by Drew

More information

BLM and BWS installation examples

BLM and BWS installation examples BLM and BWS installation examples Front Back LHC BLM system: 4 crates connected through P2 connector (with the combiner card) for HV control, crate interconnections, beam permit and beam energy distribution.

More information

High Bandwidth Electronics

High Bandwidth Electronics DOE BES Neutron & Photon Detectors Workshop, August 1-3, 2012 Ryan Herbst System Overview What are the standard components in a detector system? Detector/Amplifier & ADC Digital front end - Configure and

More information

Development of a 24 ch TDC LSI for the ATLAS Muon Detector

Development of a 24 ch TDC LSI for the ATLAS Muon Detector Contribution paper to the 6th Workshop on Electronics for LHC Experiments, 11-15, Sep. 2000, Krakow, Poland. Development of a 24 ch TDC LSI for the ATLAS Muon Detector Yasuo Arai 1 and Tsuneo Emura 2 1

More information

Analog Input Sample Rate

Analog Input Sample Rate ECONseries Low Cost USB Data Acquisition Modules Overview The ECONseries is a flexible yet economical series of multifunction DAQ modules. You chse the number of analog I/O and digital I/O channels, the

More information

ADI12-16(PCI) Isolated Multi-Function Analog Input Board for PCI ADI12-16(PCI) 1. Ver.1.01

ADI12-16(PCI) Isolated Multi-Function Analog Input Board for PCI ADI12-16(PCI) 1. Ver.1.01 Isolated Multi-Function Analog Input for PCI ADI2-6(PCI) This product is PCI-compliant interface boards that convert analog input signals to digital equivalents (performing analog-to-digital conversion).

More information

Modules and Front-End Electronics Developments for the ATLAS ITk Strips Upgrade

Modules and Front-End Electronics Developments for the ATLAS ITk Strips Upgrade Modules and Front-End Electronics Developments for the ATLAS ITk Strips Upgrade Carlos García Argos, on behalf of the ATLAS ITk Collaboration University of Freiburg International Conference on Technology

More information

AIO UE3-PE. Features. 1MSPS 12-bit Analog I/O Board for PCI Express AIO UE3-PE 1. Ver.1.01

AIO UE3-PE. Features. 1MSPS 12-bit Analog I/O Board for PCI Express AIO UE3-PE 1. Ver.1.01 1MSPS 12-bit Analog I/O Board for PCI Express AIO-121601UE3-PE * Specifications, color and design of the products are subject to change without notice. This product is an unisolated PCI Express bus-compliant

More information

The Trigger and Data Acquisition system for the NA62 experiment at CERN

The Trigger and Data Acquisition system for the NA62 experiment at CERN The Trigger and Data Acquisition system for the NA62 experiment at CERN M. Sozzi University of Pisa and INFN 11 th Pisa Meeting on Advanced Detectors Introduction for the unaware In year 2009 a.d. CERN

More information

Quiz for Chapter 6 Storage and Other I/O Topics 3.10

Quiz for Chapter 6 Storage and Other I/O Topics 3.10 Date: 3.10 Not all questions are of equal difficulty. Please review the entire quiz first and then budget your time carefully. Name: Course: 1. [6 points] Give a concise answer to each of the following

More information

Status of Control System. Hiroshi Kaji

Status of Control System. Hiroshi Kaji Status of Control System Hiroshi Kaji 2 Introduction The aim of control system is to increase integrated luminosity, which directly affects the accuracy of physics results. Our control system are required

More information

PMC-12AI Channel, 12-Bit Analog Input PMC Board. With 1,500 KSPS Input Conversion Rate

PMC-12AI Channel, 12-Bit Analog Input PMC Board. With 1,500 KSPS Input Conversion Rate PMC-12AI64 64-Channel, 12-Bit Analog Input PMC Board With 1,500 KSPS Input Conversion Rate Features Include: 64 Single-ended or 32 Differential 12-Bit Scanned Analog Input Channels Sample Rates to 1,500

More information

The DAQ/Trigger Hardware Systems for Jefferson Lab's 12GeV Experimental Programs

The DAQ/Trigger Hardware Systems for Jefferson Lab's 12GeV Experimental Programs The DAQ/Trigger Hardware Systems for Jefferson Lab's 12GeV Experimental Programs Chris Cuevas Fast Electronics Group Experimental Nuclear Physics Division Page 1 Outline Focus of this talk will cover the

More information

16AIO 16-Bit Analog Input/Output Board With 32 Input Channels, 4 Output Channels and 16-Bit Digital I/O Port

16AIO 16-Bit Analog Input/Output Board With 32 Input Channels, 4 Output Channels and 16-Bit Digital I/O Port 16AIO 16-Bit Analog Input/Output Board With 32 Input Channels, 4 Output Channels and 16-Bit Digital I/O Port Features Include: Available in PMC, PCI, cpci and PC104-Plus and PCI Express form factors as:

More information

AIO AH-PCI. Features. Packing List. 12-bits Analog I/O Board (High Gain) for PCI AIO AH-PCI 1. Ver.1.04

AIO AH-PCI. Features. Packing List. 12-bits Analog I/O Board (High Gain) for PCI AIO AH-PCI 1. Ver.1.04 12-bits alog I/O Board (High Gain) for PCI AIO-121602AH-PCI This product is a PCI-bus compatible multifunction board equipped with analog input x 16ch, analog output x 2ch, digital input/output (unisolated

More information

USCMS HCAL FERU: Front End Readout Unit. Drew Baden University of Maryland February 2000

USCMS HCAL FERU: Front End Readout Unit. Drew Baden University of Maryland February 2000 USCMS HCAL FERU: Front End Readout Unit Drew Baden University of Maryland February 2000 HCAL Front-End Readout Unit Joint effort between: University of Maryland Drew Baden (Level 3 Manager) Boston University

More information

Construction of a compact DAQ-system using DSP-based VME modules

Construction of a compact DAQ-system using DSP-based VME modules Abstract We have developed a DSP based data-acquisition syustem(daq) system, based on the DSP. The system utilizes VME boards with one or two s. Our intension was to consturct a compact DAQ framework which

More information

DATENBLATT ADA16-32/2(PCI)F. HABEN SIE FRAGEN ODER WÜNSCHEN SIE EIN INDIVIDUELLES ANGEBOT? Unser Team berät Sie gerne persönlich.

DATENBLATT ADA16-32/2(PCI)F. HABEN SIE FRAGEN ODER WÜNSCHEN SIE EIN INDIVIDUELLES ANGEBOT? Unser Team berät Sie gerne persönlich. DATENBLATT ADA16-32/2(PCI)F HABEN SIE FRAGEN ODER WÜNSCHEN SIE EIN INDIVIDUELLES ANGEBOT? Unser Team berät Sie gerne persönlich. TELEFON + 49 (0) 81 41/36 97-0 TELEFAX + 49 (0) 81 41/36 97-30 E-MAIL info@plug-in.de

More information

FT Cal and FT Hodo DAQ and Trigger

FT Cal and FT Hodo DAQ and Trigger FT Cal and FT Hodo DAQ and Trigger Outline FT-Cal and FT-Hodo read-out electronics FT-Cal and FT-Hodo DAQ and trigger FADC250 firmware CTP firmware for FT-Cal and FT-Hodo FT-Cal and FT-Hodo crates and

More information

The Front-End Driver Card for the CMS Silicon Strip Tracker Readout.

The Front-End Driver Card for the CMS Silicon Strip Tracker Readout. The Front-End Driver Card for the CMS Silicon Strip Tracker Readout. S.A. Baird 1, K.W. Bell 1, E. Corrin 2, J.A. Coughlan 1, C.P. Day 1, C. Foudas 2, E.J. Freeman 1, W.J.F. Gannon 1, G. Hall 2, R.N.J.

More information

Nitro240/260 CPU Board Scalable 680x0 VME board for I/O intensive applications

Nitro240/260 CPU Board Scalable 680x0 VME board for I/O intensive applications Nitro240/260 CPU Board Scalable 680x0 VME board for I/O intensive applications Nitro260 features a 50 MHz MC68060 CISC processor with superscalar pipeline architecture for maximum integer and floating

More information

EPICS: Experimental Physics and Industrial Control System. Control Architecture Reading Group

EPICS: Experimental Physics and Industrial Control System. Control Architecture Reading Group EPICS: Experimental Physics and Industrial Control System Control Architecture Reading Group Overview What, Why and Who? The Subsystems Performance Conclusions What is EPICS and Why? Scaleable real-time

More information

Experience of Developing BEPCII Control System. Jijiu ZHAO IHEP, Beijing ICALEPCS2007 October 18, 2007

Experience of Developing BEPCII Control System. Jijiu ZHAO IHEP, Beijing ICALEPCS2007 October 18, 2007 Experience of Developing BEPCII Control System Jijiu ZHAO IHEP, Beijing ICALEPCS2007 October 18, 2007 BEPCII Project The project BEPCII is for upgrading the BEPC (Beijing Electron Positron Collider) to

More information

Development and test of a versatile DAQ system based on the ATCA standard

Development and test of a versatile DAQ system based on the ATCA standard Development and test of a versatile DAQ system based on the ATCA standard M.Bianco, a P.J.Loesel, b S.Martoiu, c, ad and A.Zibell e a CERN PH Department, Geneve, Switzerland b Ludwig-Maximilians-Univ.

More information

Embedded Controller combines Machine Control and Data Acquisition using EPICS and MDSplus P. Milne

Embedded Controller combines Machine Control and Data Acquisition using EPICS and MDSplus P. Milne Embedded Controller combines Machine Control and Data Acquisition using EPICS and MDSplus P. Milne Solutions Ltd, James Watt Building, SETP, G75 0QD East Kilbride, United Kingdom Applications such as pulse

More information

LVL1 e/γ RoI Builder Prototype

LVL1 e/γ RoI Builder Prototype LVL e/γ RoI Builder Prototype RoI / s matching and zero suppression Receiver RoI VME Receiver RoI Control Receiver RoI S-Link Interface Receiver Output - LVL / Supervisor RoI Builder discussion - Verilog/VHDL

More information

12AI Channel, 12-Bit Analog Input PMC Board. With 1,500 KSPS Input Conversion Rate

12AI Channel, 12-Bit Analog Input PMC Board. With 1,500 KSPS Input Conversion Rate 64-Channel, 12-Bit Analog Input PMC Board With 1,500 KSPS Input Conversion Rate Available in PMC, PCI, cpci and PC104-Plus and PCI Express form factors as: PMC-12AI64: PCI-12AI64: cpci-12ai64: PC104P-12AI64:

More information

32-CHANNEL 16-BIT TRANSDUCER INPUT PMC

32-CHANNEL 16-BIT TRANSDUCER INPUT PMC 16AICS32 32-CHANNEL 16-BIT TRANSDUCER INPUT PMC With Scanning Input Current Source Available in PMC, PCI, cpci and PC104-Plus and PCI Express form factors as: PMC-16AICS32: PCI-1616AICS32: cpci-16aics32:

More information

BTeV at C0. p p. Tevatron CDF. BTeV - a hadron collider B-physics experiment. Fermi National Accelerator Laboratory. Michael Wang

BTeV at C0. p p. Tevatron CDF. BTeV - a hadron collider B-physics experiment. Fermi National Accelerator Laboratory. Michael Wang BTeV Trigger BEAUTY 2003 9 th International Conference on B-Physics at Hadron Machines Oct. 14-18, 2003, Carnegie Mellon University, Fermilab (for the BTeV collaboration) Fermi National Accelerator Laboratory

More information

Trigger and Data Acquisition at the Large Hadron Collider

Trigger and Data Acquisition at the Large Hadron Collider Trigger and Data Acquisition at the Large Hadron Collider Acknowledgments (again) This overview talk would not exist without the help of many colleagues and all the material available online I wish to

More information

Wir schaffen Wissen heute für morgen REUSABLE PATIENT SAFETY SYSTEM FRAMEWORK FOR THE PROTON THERAPY CENTRE AT PSI

Wir schaffen Wissen heute für morgen REUSABLE PATIENT SAFETY SYSTEM FRAMEWORK FOR THE PROTON THERAPY CENTRE AT PSI Wir schaffen Wissen heute für morgen REUSABLE PATIENT SAFETY SYSTEM FRAMEWORK FOR THE PROTON THERAPY CENTRE AT PSI P. Fernandez Carmona, M. Eichin, M. Grossmann, E. Johansen, A. Mayor, H.A. Regele ICALEPCS15,

More information

Electronics and data acquisition systems for the RPC based INO ICAL detector

Electronics and data acquisition systems for the RPC based INO ICAL detector Electronics and data acquisition systems for the RPC based INO ICAL detector Tata Institute of Fundamental Research, Mumbai 400005, India E-mail: bsn@tifr.res.in Sudeshna Dasgupta, Sonal Dhuldhaj, Naba

More information

User s Manual. Please Read before Installation (Combustion Pressure Analysis Software)

User s Manual. Please Read before Installation (Combustion Pressure Analysis Software) User s Manual Please Read before Installation (Combustion Pressure Analysis Software) Thank you for purchasing the Combustion Pressure Analysis Software. This user s manual explains how to install the

More information

16-Channel 16-Bit PMC Analog I/O Board

16-Channel 16-Bit PMC Analog I/O Board 16-Channel 16-Bit PMC Analog I/O Board With 8 Input Channels, 8 Output Channels, and Autocalibration Eight 16-Bit Analog Output Channels with 16-Bit D/A Converter per Channel Eight 16-Bit Analog Input

More information

TANGO. mature system strong collaboration co-development. lots of features embedded too

TANGO. mature system strong collaboration co-development. lots of features embedded too PCaPAC06 Summary day #1 TANGO mature system strong collaboration co-development lots of features embedded too PETRA III based on well established technologies: TINE, ACOP, cpci, CAN,. shared responsibilities

More information

A variety of ECONseries modules provide economical yet flexible solutions. Waveform Generation

A variety of ECONseries modules provide economical yet flexible solutions. Waveform Generation ECONseries BUS: USB Type: Economy, Mini-Instruments ECONseries Economy USB Mini-Instruments Flexible Yet Economical A variety of low-cost ECONseries modules are available to provide flexible yet economical

More information

Trigger Report. W. H. Smith U. Wisconsin. Calorimeter & Muon Trigger: Highlights Milestones Concerns Near-term Activities CMS

Trigger Report. W. H. Smith U. Wisconsin. Calorimeter & Muon Trigger: Highlights Milestones Concerns Near-term Activities CMS Trigger Report W. H. Smith U. Wisconsin Calorimeter & Muon Trigger: Highlights Milestones Concerns Near-term Activities Calorimeter Trigger Highlights, Milestones, Activities: Receiver Card Prototype delivered

More information

The White Rabbit Project

The White Rabbit Project WR Project Status 1/ 1 The White Rabbit Project Technical introduction and status report T. W lostowski BE-CO Hardware and Timing section CERN November 11, 2010 WR Project Status 2/ 1 Introduction Outline

More information

The MROD. The Read Out Driver for the ATLAS MDT Muon Precision Chambers

The MROD. The Read Out Driver for the ATLAS MDT Muon Precision Chambers The MROD The Read Out Driver for the ATLAS MDT Muon Precision Chambers Design Review Report Overview Marcello Barisonzi, Henk Boterenbrood, Rutger van der Eijk, Peter Jansweijer, Gerard Kieft, Jos Vermeulen

More information

EMBEDDED EPICS ON ITRON/SH4-BASED CONTROLLERS

EMBEDDED EPICS ON ITRON/SH4-BASED CONTROLLERS 10th ICALEPCS Int. Conf. on Accelerator & Large Expt. Physics Control Systems. Geneva, 10-14 Oct 2005, PO2.069-4 (2005) EMBEDDED EPICS ON ITRON/SH4-BASED CONTROLLERS G. Jiang, J. Odagiri, N. Yamamoto,

More information

PMC-16AIO 16-Bit Analog Input/Output PMC Board With 32 Input Channels, 4 Output Channels and 16-Bit Digital I/O Port

PMC-16AIO 16-Bit Analog Input/Output PMC Board With 32 Input Channels, 4 Output Channels and 16-Bit Digital I/O Port PMC-16AIO 16-Bit Analog Input/Output PMC Board With 32 Input Channels, 4 Output Channels and 16-Bit Digital I/O Port Features Include: 32 Single-Ended or 16 Differential 16-Bit Scanned Analog Input Channels

More information

Mixed-Signal. From ICs to Systems. Mixed-Signal solutions from Aeroflex Colorado Springs. Standard products. Custom ASICs. Mixed-Signal modules

Mixed-Signal. From ICs to Systems. Mixed-Signal solutions from Aeroflex Colorado Springs. Standard products. Custom ASICs. Mixed-Signal modules A passion for performance. Mixed-Signal solutions from Aeroflex Colorado Springs Standard products Custom ASICs Mixed-Signal modules Circuit card assemblies Mixed-Signal From ICs to Systems RadHard ASICs

More information

Components for Integrating Device Controllers for Fast Orbit Feedback

Components for Integrating Device Controllers for Fast Orbit Feedback Components for Integrating Device Controllers for Fast Orbit Feedback Jukka Pietarinen EPICS Collaboration Meeting Knoxville October 2007 Topics PMC-SFP Module for Diamond Fast Orbit Feedback Future plans

More information

Preliminary Design of a Real-Time Hardware Architecture for erhic

Preliminary Design of a Real-Time Hardware Architecture for erhic Preliminary Design of a Real-Time Hardware Architecture for erhic Rob Michnoff Brookhaven National Laboratory, Upton, NY ICALEPCS 2015 October 22, 2015 Outline Overview of erhic project -Accelerator (C-A)

More information

CMS Trigger/DAQ HCAL FERU System

CMS Trigger/DAQ HCAL FERU System CMS Trigger/DAQ HCAL FERU System Drew Baden University of Maryland October 2000 http://macdrew.physics.umd.edu/cms/ Honest assessment: About 3 months behind schedule. TRIDAS Overall Project Timelines Expected

More information

Activity on GEM by the Rome group since last meeting

Activity on GEM by the Rome group since last meeting OLYMPUS Collaboration DESY 24/Feb/21 Activity on GEM by the Rome group since last meeting Salvatore Frullani / INFN-Rome Sanità Group 1 Outline DESY test beam 9-2 December SBS Technical Review JLab 22

More information

AIO LN-USB. Features. N Series for USB Multifunction DAQ Unit (8ch AI, 2ch AO, 16ch DIO) AIO LN-USB 1. Ver.1.01

AIO LN-USB. Features. N Series for USB Multifunction DAQ Unit (8ch AI, 2ch AO, 16ch DIO) AIO LN-USB 1. Ver.1.01 N Series for USB Multifunction DAQ Unit (8ch AI, 2ch AO, 16ch DIO) AIO-120802LN-USB This product is a USB2.0-compliant analog I/O unit that extends the analog I/O function of USB port of PCs. Compact design

More information

The CMS Event Builder

The CMS Event Builder The CMS Event Builder Frans Meijers CERN/EP-CMD CMD on behalf of the CMS-DAQ group CHEP03, La Jolla, USA, March 24-28 28 2003 1. Introduction 2. Selected Results from the Technical Design Report R&D programme

More information

Kiichi Kameda, Toshiki Natsui, Hidetoshi Shiratsu >Yokogawa

Kiichi Kameda, Toshiki Natsui, Hidetoshi Shiratsu >Yokogawa Akito Uchiyama (SHI Accelerator Service Ltd.) >RIKEN / RIBF Jun-ichi Odagiri, Kazuro Furukawa, Hidetoshi Nakagawa, Tatsuro Nakamura, Masahito Tomizawa, Noboru Yamamoto, (KEK) Makoto Takagi (KIS), Takuya

More information

RPC Trigger Overview

RPC Trigger Overview RPC Trigger Overview presented by Maciek Kudla, Warsaw University RPC Trigger ESR Warsaw, July 8th, 2003 RPC Trigger Task The task of RPC Muon Trigger electronics is to deliver 4 highest momentum muons

More information