Addressing USB Type-C TM transmitter receiver and cable test challenges 有效克服 USB Type-C TM 發射器 接收器及纜線的測試挑戰

Transcription

1 Addressing USB Type-C TM transmitter receiver and cable test challenges 有效克服 USB Type-C TM 發射器 接收器及纜線的測試挑戰 2016/06/15 Francis Liu Sr. Project Manager Gary Hsiao Project Manager 索取技術白皮書

2 Topics Today Page 2 Overview TX/RX Testing Requirements Cable Test Questions

3 What is the USB C-Connector? One connector to rule them all C-Connector Lightning micro USB Ethernet, DisplayPort, Power, SATA, VGA, USB2 replaced by C type connector. Computers and tablets will have only one connector for data transport and that will be the USB Type C Reversible (can be flipped) Can handle 5 Amps at 20Volts Broad application in standards Low Profile 10Gbs with way to 40Gbs Page 3

4 The Communications Ecosystem Where does USB-C fit? Chipsets & Components Handsets & Devices Base Stations & Broadband Network Infrastructure Data & Cloud Computing 2G/3G/4G Base Stations Small Cells Switches/ Routers Long-haul Optical Networks Enterprises Data Centers Type-C Page 4

5 Why Does It Matter? Simplicity and Capability to consumer. Complexity to Designers, Integrators, and Validators Speed Speeds of the Future and Backwards Compatibility Power Up to 100 W Power direction no longer fixed Standards Integration Page 5

6 USB Type C Signal Plan High Speed Lanes B12 GND GND A1 4 High Speed Lanes: Up to 20Gbs each RX1 RX1 TX1 TX1 Port 1 V BUS V BUS SBU2 CC1 D- D+ CC2 + D+ D- SBU1 USB2 lines: -USB2 operation -Link Communication 4 GND & 4 Supply Pins To handle up to 5 amps B1 V BUS TX2 TX2 GND V BUS RX2 RX2 GND A12 SBU lines: -Extra lines for alternate use Port 2 Page 6

7 USB Type C Signal Plan CC Pins (Configuration Channel) B12 GND GND A1 RX1 TX1 RX1 TX1 V BUS V BUS SBU2 CC1 D- D+ D+ D- CC2 SBU1 CC lines for: 1. Detection 2. Orientation 3. Configuration Channel 4. Supply Power to cable 5. Power Delivery 6. Alt mode configuration V BUS V BUS TX2 RX2 TX2 RX2 B1 GND GND A12 Page 7

8 USB Type C Port Function USB 3.1 & USB 2.0 B12 GND GND A1 Alt STD USB3.1 Operation STD Mux Port Mux RX1 TX1 RX1 TX1 V BUS V BUS SBU2 CC1 D- D+ USB2.0 Operation D+ USB 3.1 D+ D- CC2 SBU1 V BUS V BUS D- USB 2.0 TX2 RX2 Product TX2 RX2 B1 GND GND A12 Page 8

9 USB Type C Port Function USB 3.1 Gen1/2 Page 9

10 DP USB Type C Port Function Alternate Mode: DisplayPort Downstream Facing Port (Video Output) STD Mux Port Mux Cable Provider/ Consumer V Conn V CONN CC USB 3.1 Supply Provider/ Consumer Port Mux Upstream Facing Port (Display) Page 10

11 Topics Today Page 11 Overview TX/RX Testing Requirements Cable Test Questions

12 USB 3.1 Channel Budget Host Device chip Host Routing Cable characteristics Device routing chip Ic pins Connector Type Connector Type Ic pins Loss at Nyquist is identified here. Channel Models (s-parameters) required. Page 12

13 USB 3.1 TX Compliance Patterns Gen 1 Tx Eye/jitter/SSC testing Gen 2 Tx Eye/jitter/SSC testing Gen 2 Tx preshoot/deemphasis testing Page 13

14 U7243B TX Compliance Test SW Setup overview All different types of DUT 1. USB-IF fixtures 2. Keysight fixtures Most updated Channel embedded model from USB-IF Page 14

15 U7243B TX Compliance Test SW Gen1 Tx testing Gen2 LFPS, SCDx/LBPS testing Preshoot/Deemphasis Gen2 SSC testing Eye/Jitter short channel Eye/Jitter long channel Page 15

16 U7243B TX Compliance Test SW Select suitable transfer function for the compliance test Page 16

17 Type-C 10G/5G Tx Test TD 1.1, TD 1.3, TD 1.4, TD 1.5, TD 1.6 Scope Cal-Out or Or device Or Page 17

18 Testing USB3.1 Transmitters: LFPS LFPS: Low Frequency Periodic Signaling Page 18

19 Testing USB3.1 Transmitters: SCDx SCDx (USB3.1): Superspeed Capability Declaration 1/2 SCD SCD LSB first Page 19

20 Testing USB3.1 Transmitters: LBPM LBPM: LFPS Based Pulse Width Modulation Messaging Page 20

21 Testing USB3.1 Transmitters: SSC Fundamental LBPM Interval Page 21

22 Tx Signal Quality Page 22

23 Pre-Shoot/De-Emphasis Page 23

24 USB 3.1 Gen 2 Type C Fixture Kit Page 24

25 N7015A Type-C Test Fixture High speed coax cables, Matched pairs for TX2+, TX2-, RX2+, RX2- Type C plug connection to DUT (receptacle) 2 pin header for SBU1 and SBU2 test points Vbus and CC lines to N7016A fixture via USB Type C (plug style) cable USB2.0 D+ and D- High speed coax cables, Matched pairs for TX1+, TX1-, RX1+, RX1- High speed (TX/RX) and D+/D- lanes to scope through coax cables N7015A de-embedding models available and will be integrated into compliance applications and Infiniium baseline software Power and Control signals to low speed N7016A fixture though type C cable View SBU1/2 signals Page 25

26 Type C connector Measurements High Bandwidth breakout and Connection Form factor Performance Connection Page 26

27 USB 3.1 gen2 10Gb/s, Receiver Test RX Calibration Procedure Steps performed without test channel : De-emphasis, pre-shoot and launch amplitude calibration RJ calibration SJ calibration Calibration steps with 23dB channel (test channel + device/host mock up): Selection of correct CLB based on eye height measurement with previously calibrated de-emphasis, pre-shoot, launch amplitude, RJ and SJ values Tuning of eye width by adjusting de-emphasis and if necessary secondary SJ 87MHz Fine tuning of eye height by adjusting launch amplitude Preliminary CTS is not released Page 27

28 USB 3.1 gen2 10Gb/s USB 3.1 Type C 23dB Cal Channel CLB Scope J-BERT 1m cable with USB Type-C connectors Type-C to Type C board Mock host / device Compliance Load Board (CLB): A fixture set contains three CLBs with traces of different lengths to be able to adjust residual ISI Four versions of Type-C to Type-C board: Host RX breakout for DUT TX to BERT RX channel, no V bus connection Host TX no breakout, no V bus connection Device RX breakout for DUT TX to BERT RX, V bus connection Device TX no breakout, no V bus connection Mock-Up fixture: Simulates reference device/host loss. Used for calibration only. Page 28

29 USB 3.1 gen2 10Gb/s RX Cal Targets Parameter Min Nominal Max Unit SigTest Technology Template Calibration channel N/A N/A Test N/A N/A V pp 800 mv N/A N/A Pre-shoot db N/A N/A De-emphasis db N/A N/A RJ (Random Jitter) ps RMS usb_3_10gb USB_3_10Gb_Rj_Sj_CAL SJ (Sinusoidal Jitter) 500kHz 1MHz 2MHz 4MHz 7.5MHz 15MHz 30MHz 50MHz 100MHz UI pp usb_3_10gb USB_3_10Gb_Rj_Sj_CAL Eye Height 70 (10-6 ) 70 (10-6 ) 75 (10-6 ) mv usb_3_10gb USB_3_10_CP9_RX_CAL_CTLE_N5dB Eye Width 48 (10-6 ) 48 (10-6 ) 50 (10-6 ) ps usb_3_10gb USB_3_10_CP9_RX_CAL_CTLE_N5dB Preliminary CTS is not released Page 29

30 N5990A Test Automation for USB Calibration 10G Without Test Channel Pre-shoot calibration De-emphasis calibration Generator output voltage calibration RJ calibration Low frequency SJ calibration High frequency SJ calibration 23dB Channel: CLB selection Eye width pre-calibration Eye height and width calibration Compliance eye calibration Compliance eye verification (1) (2) (1) The eye height / eye width calibration and compliance eye calibration combine the eye width and eye height fine adjustement steps as outlined before in a more advantagous way for a test automation (2) The compliance eye verification is a measurement of eye width and eye height with the currently set calibration data. This useful to check if the calibration is still good or needs to be redone. Page 30

31 N5990A Test Automation for USB 3.0/3.1 Ease of Use, super simple connection The N5990A Test Automation for USB 3.0/3.1 guides users through every setup changes with connection diagrams and detailed descriptions Page 31

32 J-BERT PG USB 3.1 gen2 10Gb/s USB 3.1 Type C 14.5dB Test Channel J-BERT ED V bus DUT Unlike for USB 3.0/3.1 gen1 5G RX testing USB 3.1 gen2 10G RX compliance testing requires to test each test frequency for bits. Page 32

33 N5990A Test Automation for USB Test Overview Compliance Tests: 5G RX Compliance long channel 5G RX Compliance short channel 5G RX Compliance LFPS 10G RX Compliance position 1 10G RX Compliance position 2 Characterization Tests: RX constant parameter RX jitter tolerance (SJ margin) RX and LFPS sensitivity RX data rate deviation LFPS Duty Cycle Page 33

34 Example report from Host Page 34

35 Loopback Training USB 3.1 LTS tool USB Link Training Suite is a trainings sequence generation tool for USB3.1 Gen1/2 Easy manipulation of SCD1/SCD2/LBPM cycles TSEQ count TS1 count TS2 count LFPS parameters adjustment: tperiod, tburst, trepeat, tpwm. Choice of: Power On sequence Warm Reset sequence Page 35

36 USB3.1 Cal N7015A Type-C Fixture Step 3) Rx Test with N7015A and M8041A ISI emulation or M8048A Traces M8041A SMA matched pair CLB 1m Type-C Cable Fixt. 1C USB3.1 Type C DUT (a). Std. Type C Fixtures M8041A Int. ISI SMA matched pair dB N7015A Type-C Probe USB3.1 Type C DUT (b). Int. ISI with N7015A -14.5dB M8041A SMA matched pair M8048A ISI Traces N7015A Type-C Probe USB3.1 Type C DUT (c). Ext. ISI with N7015A -14.5dB Page 36

37 Sinusoidal Jitter [ps] USB3.1 Calibration with N7015A Type-C Fixture Step 5) Run Jitter Tolerance with all three setups For Each Setup two Jitter Tolerance (Jtol) measurements were done : Rx1_10G_JTol for USB3.1 Device with Type-C Connector Sinusoidal Jitter Frequency [MHz] Cap Setup Min Spec USB IF (1) USB IF (2) Int ISI (1) Int ISI (2) Ext ISI (1) Ext ISI (2) Jitter Tolerance Difference Sinusoidal Jitter Frequency [MHz] USB IF - Int ISI [ps] USB IF - Ext ISI [ps] Jitter Stepsize [ps] Conclusion: The Jtol difference between USB IF <-> Int ISI and USB IF <-> ext ISI is within 2 Jitter steps (1.6ps > 7.5MHz). That s within the measurement uncertainty and both N7015A setups correlates well with USB-IF setup. Page 37

38 Thunderbolt 3 Solutions Page 38

39 Thunderbolt 3 Overview Announced in Q Uses the Type-C connector Channel aggregation: two independent 20Gbps links into one logical 40Gbps link Supports other standards through ALT mode Cost competitive vs mult chip, discrete, mux solutions Page 39

40 Testing Methodology PHY testing approach will be similar to Thunderbolt 2 Tx, Rx, and Return Loss Today, customers with Thunderbolt DUTs need to work with their Intel PAE Keysight Scope, BERT, ENA are within the CTS list Page 40

41 Thunderbolt 2/3 Transmitter Test 21GHz BW required for compliance testing (25GHz BW recommended in CTS) Silicon 20/80 risetime can be <15ps Imaginarium FW TenLira SW TCL and Alpine Ridge scripts Crosstalk generator Type-C test fixture Controller for Devices New preset testing and optimization for 10.3G and 20.6G Page 41

42 Thunderbolt 2/3 Receiver Test Calibration and testing for 10.3G and 20.6G Crosstalk generator Type-C Plug Fixture Microcontroller Optimizing preset for BER Scripts for querying errors in internal error detector Page 42

43 Thunderbolt 2/3 Return Loss Test DUT output PRBS31 on all lanes with SSC turned on Setup the Network Analyzer with automated measurements Page Page 43

44 Testing DisplayPort over the Type-C Connector: TX and RX Phy Layer Validation Disclaimer: The DisplayPort AltMode compliance test requirements are not final. Therefore, all opinions, judgments, recommendations, etc. that are presented herein are the opinions of the presenter of the material and do not necessarily reflect the opinions of VESA, or other member companies. Page 44

45 Review of DisplayPort Interface Data Ck Level Policy Mgr Tx DisplayPort Source Main Link PE Logic 4 Differential Lanes AUX Main Link Hot Plug Detect Up to 4 differential lanes: 4 possible bit rates TX: 4 possible level settings 4 possible pre-emphasis settings Spread Spectrum Clocking (optional) Dual Mode optional RX: Receiver individual clock recovery Receiver Tolerance curve specified. Receiver Sensitivity = 50mV 1 Differential Lane Bit Recovery DPCD EDID Data Interrupt DisplayPort Sink AUX Channel Phy Layer Bit rate at 1Mbs Manchester II encoded Purpose Link Management Test Mode control Page 45

46 TX Test Setup for DP over USB Type-C Keysight TPAs High Speed Phy test AUX Phy test Connector: Type C N7015A Fixtures N7016A USB C to DP cable Unigraf DPR-100 AUX Automation Keysight TPAs High Speed Phy test AUX Phy test Connector: Type C N7015A Fixtures N7016A USB C cable Power Delivery Controller AUX Automation Page 46

47 DP Transmitter Testing: Whole Channel DUT Cable Model Sink Data Ck Level Driver Tx PE Logic Decode REFERENCE EQUALIZER Eye DisplayPort Source Standard DP mdp USB Type C Cable Loss Model CTLE DFE (50mv max) TP2 TP3 TP3EQ TP3EQ Math performed on oscilloscope on TP2 acquisition Page 47

48 DisplayPort Tests: Patterns and Test Point Test RBR HBR HBR2 HBR3 3-1 Eye Diagram PRBS7 Cable PRBS7/ DUT Model HBR2CPAT HBR2CPAT Sink TP3EQ Arbitrary TP3EQ 3-2 Non PreEmphasis Level PRBS7 PRBS7 PRBS7 Arbitrary 3-3 Pre-Emphasis Level PRBS7 PRBS7 PLTPAT Arbitrary 3-4 Inter Pair Skew D10.2 D10.2 D10.2 Arbitrary 3-11 Non ISI Jitter PRBS7 PRBS7 NA NA 3-11 Deterministic Jitter NA NA/ HBR2CPAT 3-12 Total Jitter PRBS7 PRBS7/ HBR2CPAT/D10.2 HBR2CPAT TP3EQ CP2520/D10.2 TP3EQ Arbitrary TP3EQ Arbitrary TP3EQ 3-14 Main Link Frequency D10.2 D10.2 D10.2 Arbitrary 3-15 Spread Spectrum Modulation Frequency 3-16 Spread Spectrum Deviation Accuracy D10.2 D10.2 D10.2 Arbitrary D10.2 D10.2 D10.2 Arbitrary 3-18 Dual Mode TMDS Clock All appropriate Data Rates/Random Pattern 3-19 Dual Mode TMDS Eye Test All appropriate Data Rates/Random Pattern Page 48

49 DisplayPort Tests and Levels & Pre-Emphasis Test Levels Pre-Emphasis 3-1 Eye Diagram RBR/HBR: Setting 2 HBR2/3: User Choice RBR/HBR: Setting 0 HBR2/3: User Choice 3-2 Non PreEmphasis Level All Settings Setting Pre-Emphasis Level All Settings All Valid Settings 3-4 Inter Pair Skew Setting 2 Setting Non ISI Jitter RBR/HBR: All settings RBR/HBR: Setting Deterministic Jitter RBR/HBR: All settings HBR2/3: User Choice 3-12 Total Jitter RBR/HBR: All settings HBR2/3: User Choice RBR/HBR: Setting 0 HBR2/3: User Choice RBR/HBR: Setting 0 HBR2/3: User Choice 3-14 Main Link Frequency Setting 2 Setting SSC Modulation Frequency Setting 2 Setting SSC Deviation Accuracy Setting 2 Setting Dual Mode TMDS Clock No choice 3-19 Dual Mode TMDS Eye Test No choice Page 49

50 RX Test Setup for DP over USB Type-C InterSymbol Interference High Speed Phy test N7015A N7016A Unigraf DPT-200 USB C to DP cable AUX Automation Page 50

51 Topics Today Page 51 Overview TX/RX Testing Requirements Cable Test Questions

52 Testing DisplayPort over the Type-C Connector: Cable Test Challenges Disclaimer: The DisplayPort AltMode compliance test requirements are not final. Therefore, all opinions, judgments, recommendations, etc. that are presented herein are the opinions of the presenter of the material and do not necessarily reflect the opinions of VESA, or other member companies. Page 52

53 Supported Cable Types USB Type-C to USB Type-C Type-C to Type-C will re-use USB Type-C electrical specifications and will require proper documentation from USB-IF to prove compliance USB Type-C to DisplayPort Specification based on USB Type-C to USB Type-C Passive Cable Assemblies (Section 3.7.3) specification methodology USB Type-C to Protocol Converter (e.g. DVI, HDMI) USB Type-C to Multi-function Dock Page 53

54 DisplayPort Alt Mode Cable Measurement Challenges Tighter device margins (1UI is ~ Gbps) Managing the different impedance environments of USB Type-C (85Ω) and DisplayPort (100Ω) Significant loss at higher frequencies require more rigorous approach to removing fixture effects, to measure the true performance of the device Channel response affected by many features in channel (loss, reflection, crosstalk, mode conversion) Page 54

55 Managing the Different Impedance Environments USB Type-C to DisplayPort Cable Electrical Properties Insertion loss and Return loss are to be tested relative to an 85Ω differential environment at the USB Type-C connector and relative to a 100Ω differential environment at the DisplayPort connector. 85Ω 100Ω How to perform measurements when the impedance targets are different on each end? Recommendations: Design fixtures in 50 ohm SE (100 ohm DIFF) Calibrate in 50 ohm SE (100 ohm DIFF) Measure in 50 ohm SE (100 ohm DIFF) Renormalize S-parameters of USB port to 85 ohm, using port reference impedance conversion function Page 55

56 Port Reference Impedance Conversion USB Cable Example ENA Option TDR provides an integrated port reference impedance conversion feature. Insertion Loss Diff ZConversion Port1 = 100Ω Port2 = 100Ω Return Loss Diff ZConversion Port1 = 85Ω Port2 = 100Ω Diff ZConversion Port1 = 85Ω Port2 = 100Ω Diff ZConversion Port1 = 100Ω Port2 = 100Ω Page 56

57 Removing the Fixture Effects from Measurement USB Example USB 3.1 CTS recommends 2x Thru de-embedding (AFR) and TRL calibration Excellent correlation between the AFR and TRL methods Removing the effects of the fixture is critical to ensure sufficient yield Page 57

58 New Compliance Methodology Traditional Method Interconnects have been characterized by measuring parametric characteristics such as insertion loss and impedance The limitation of the traditional parametric measurement is that it does not allow tradeoffs among the various test parameters Sufficient margin on insertion loss, but fails several points on return loss. Will this spec violation really cause interoperability issues? Insertion Loss Return Loss Page 58

59 New Compliance Methodology Channel Metrics There are three signal integrity impairments that impact the end-to-end link performance: attenuation, reflection and crosstalk. The channel metrics represents these three impairments: Insertion loss fit at Nyquist frequency (ILfitatNq) Integrated multi-reflection (IMR) Integrated crosstalk (IXT) The IMR and IRL limits have a dependency on ILFitAtNq. More IMR and IRL can be tolerated when ILFitAtNq decreases. Page 59

60 DisplayPort Alt Mode Cable Assembly Compliance Test Typical Configuration ENA Mainframe E5071C-4D5: 4-port, 300 khz to 14 GHz E5071C-4K5: 4-port, 300 khz to 20 GHz Enhanced Time Domain Analysis Option (E5071C-TDR) ECal Module (N4433A) (*) The list above includes the major equipment required. Please contact our local sales representative for configuration details. MOI (Method of Implementation) Step-by-step procedure on how to measure the specified parameters in the specification document using ENA Option TDR. Method of Implementation (MOI) document and instrument setup file will be made available for download on Keysight.com Test Fixtures Fixtures are available for purchase through Luxshare-ICT. ENA Option TDR is a authorized test tool for Cable PHY. Page 60

61 DisplayPort Alt Mode Cable Measurement Challenges Tighter device margins (1UI is ~ Gbps) Managing the different impedance environments of USB Type-C (85Ω) and DisplayPort (100Ω) Renormalize S-parameters using port reference impedance conversion function Significant loss at higher frequencies require more rigorous approach to removing fixture effects, to measure the true performance of the device 2x thru de-embedding using Automatic Fixture Removal (AFR) Channel response affected by many features in channel (loss, reflection, crosstalk, mode conversion) Paradigm shift from traditional parametric testing to channel metrics Keysight has the tools and expertise to help you conquer USB 3.1 Physical Layer Test Challenges Page 61

62 True Multiport Measurements for USB Type-C Cable Assembly Page 62

63 Keysight Type-C Test Solutions Design Simulation, USB-PD, and Channel Characterization Transmitter Test Interconnect Test Receiver Test SW HW U7243B USB Compliance Test Software DSAV254A Infiniium Scope M937xA PXI Multiport VNA 1x s12p Touchstone File s12p E5071C ENA Option TDR N5990A USB Compliance Test Software M8020A J-BERT High- Performance Serial BERT Fixture DUT N7015A/16A Tx Test Fixture Tx Cable/Connector Test Fixture Cable Rx Test Fixture from USB-IF Tx Rx Page 63

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