WEEK 4.3. ECE124 Digital Circuits and Systems Page 1

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1 WEEK 4.3 ECE124 Digital Circuits and Systems Page 1

2 Decoders implemented with NAND gates SomeBmes, in implementabon decoders are done with NAND gates rather than AND gates. With NAND gates, the table illustrabng the decoder operabon would look like this: x d0 y d1 d2 This only has the effect of inver2ng the outputs enable d3 So pay a8en2on In using a decoder, it is useful to know when the output is intended to be ac2ve high, or ac2ve low! ECE124 Digital Circuits and Systems Page 2

3 Decoder trees If we have decoders with enables, we can use mulbple, small decoders to implement larger decoders. Represent a smaller decoder as a box with inputs and outputs (we know how it works). x y enable d0 d1 d2 d3 ECE124 Digital Circuits and Systems Page 3

4 Example decoder tree: 4 to 16 decoder Using 2 to 4 decoders Inputs are x 1 (MSB), x 2, x 3, and x 4 (LSB). x3 x4 x y d0 d1 d2 y0 y1 y2 Outputs are y 0,, y 15. enable d3 y3 The two most significant bits x 1 and x 2 are used to enable the appropriate decoder in the second stage. The two least significant bits x 3 and x 4 are used to generate the correct output in the second stage. x1 x2 x y enable d0 d1 d2 d3 x y enable x y enable d0 d1 d2 d3 d0 d1 d2 d3 y4 y5 y6 y7 y8 y9 y10 y11 x y d0 d1 d2 y12 y13 y14 enable d3 y15 ECE124 Digital Circuits and Systems Page 4

5 FuncBon implementabon with decoders If we have a decoder and an OR gate handy, we can also implement funcbons too Consider implemenbng f(a,b,c) = (1,4,6,7) using a decoder and an OR gate to pick off the correct minterms. a x d0 d1 b y d2 c z d3 d4 f d5 d6 1 enable d7 ECE124 Digital Circuits and Systems Page 5

6 Encoders Performs the inverse operabon to a decoder. Encoder has 2 n or fewer input lines and n output lines. The output is the binary code corresponding to the input value. Can make the circuit using OR gates. ECE124 Digital Circuits and Systems Page 6

7 Example of an encoder An example of an 8 to 3 encoder: 7 ECE124 Digital Circuits and Systems Page 7

8 Priority encoders Simple encoder has problems: Assumes that only one input is acbve (high) at any given Bme. When mulbple inputs are high, there is an undefined output. Produces the output of 000 when no input is acbve (high) which is the same as d 0 begin acbve (high) so there is an ambiguity. A priority encoder gives priority to higher numbered inputs. It also has a validity output to indicate the all inputs are not zero. Example: 4 to 2 priority encoder: ECE124 Digital Circuits and Systems Page 8

9 MulBplexers Combinatorial circuit block that has data inputs, select inputs and a single data output. Data is passed from one of the inputs through to the output based on the se^ng of the select lines. For n inputs, we need ceil( log 2 (n) ) select inputs. MulBplexers have their own symbol. x 0 Inputs X n-1 M U X Y=Output If S=0=00..00,Y=X 0 If S=1=00..01, Y=X 1 If S=2=00..10,Y=X 2. S m-1 S 0 m=ceil(log 2 n) n=10, m=ceil(log 2 10)=CELI( )=4 ECE124 Digital Circuits and Systems Page 9

10 Example of a 2 input mulbplexer IllustraBon of a 2 input mulbplexer: x0 0 f x1 1 s Can always write the SOP for a mulbplexer easily; It is the appropriate se^ng of the control signal(s) AND ed with the appropriate input (the control signals gate the AND). ECE124 Digital Circuits and Systems Page 10

11 Example of a 4 input mulbplexer IllustraBon of a 2 input mulbplexer: x0 x1 x2 x f s1s0 The SOP for the 4 input mulbplexer is: ECE124 Digital Circuits and Systems Page 11

12 MulBplexers trees We can build larger mulbplexers from smaller mulbplexers. Example: 4 input MUX using several 2 input MUX: x0 0 x2 1 S 1.X 0 +S 1.X f x1 0 x3 1 S 1.X 1 +S 1.X 3 f=s 0 ( )+ S 0 ( ) S 1.X 0 +S 1.X 2 S 1.X 1 +S 1.X 3 s1 s0 ECE124 Digital Circuits and Systems Page 12

13 ImplementaBon of an n input funcbon using (n 1) input mulbplexer We can implement an n input funcbon using an (n 1) input MUX by examining the truth table. The first n 1 inputs in the truth table become the control lines, and the last input in the truth table is fed appropriately to the MUX inputs. x2 x2 x2!x f x0x1 ECE124 Digital Circuits and Systems Page 13

14 Shannon decomposibon We don t need an (n 1) input mulbplexer to implement an n input funcbon using mulbplexers. Building a 4 input MUX from 2 input MUX should sort of indicate that we can implement logic func2ons using any sort of MUX (parbcularly 2 input mulbplexers). Inputs to the logic funcbon become the select lines, and we connect 0 or 1 to the data inputs of the MUX the correct value (0 or 1) appears at the output given the se^ng on the select lines. Breaking a funcbon down for a MUX implementabon is called Shannon Decomposi2on. We should run through the math, since it is why it works ECE124 Digital Circuits and Systems Page 14

15 Cofactoring A B C F F 1 (A=0,B,C)=B.C+B.C F 2 (A=1,B,C)=B.C +B.C F(A,B,C)=A.F 1 (A=0,B,C)+A.F 2 (A=1,B,C) ECE124 Digital Circuits and Systems Page 15

16 Cofactors Consider any Boolean funcbon f = f(x 0, x 1,, x n ). We can always factor the funcbon with respect to any variable, say x 0. The terms f(0, x 1,, x n ) and f(1, x 1,, x n ) are the cofactors of f with respect to x 0. NoBce the x 0 no longer appears in either of the cofactors; it has been factored out. We can think of cofactors as dividing the truth table of f into halves. The rows in which x 0 = 0 are grouped together. The rows in which x 0 = 1 are grouped together. A MUX is used to select the proper half of the truth table based on the value of x 0. ECE124 Digital Circuits and Systems Page 16

17 Example using only 2 input mulbplexers (1) Implement the following funcbon using 2 input mul2plexers only (i.e., no logic gates). SoluBon is to cofactor with respect to some of the variables unbl we don t need any logic gates (i.e., no product terms leg). x 2 X 2 M U X x 2 M U X x 1 x 0 ECE124 Digital Circuits and Systems Page 17

18 Example using only 2 input mulbplexers (2) Our final circuit using only 2 input MUX is (simplified and unsimplified): x2 0 x2 1 x2 0 0 f f 1 1 x2 0 x2 0!x2 1!x2 1 x1 x0 x1 x0 ECE124 Digital Circuits and Systems Page 18

19 DemulBplexers Recall that a mulbplexer selects from mulbple inputs and directs this input through to the output. A demulbplexer does the opposite it switches a single data input onto one of several output lines. Note: A demul2plexer is simply a decoder in which the meaning of the inputs has changed. The decoder enable becomes the data input. The decoder data inputs become the select lines. Depending on how the decoder data inputs (select lines) are set, the selected output will follow the decoder enable (data input) ECE124 Digital Circuits and Systems Page 19

20 Tri State Buffers (1) In addibon to 0 and 1, we need the concept of an open circuit, or a high impedance state. A circuit that allows us to disconnect the output (open circuit) is called a tri state buffer): oe x y The signal oe is the output enable: When oe = 1, y = x, and when oe = 0 the output y is disconnected from input x ECE124 Digital Circuits and Systems Page 20

21 Tri State Buffers (2) Tri state buffers are useful when we want mulbple signals to drive a single wire at different Bmes. We can use the output enables to control which source drives a wire. We can implement mulbplexers with tri state buffers. Tri state buffers are useful in bus based design when we have mulbple sources of informabon that travel down the same set of wires (e.g., the data bus in a computer). ECE124 Digital Circuits and Systems Page 21

22 MulBplexers built using decoders and tri state buffers IllustraBon of a 4 to 1 mulbplexer made with tri state buffers and a decoder: select enable x y enable d0 d1 d2 d3 i0 i1 i2 i3 y ECE124 Digital Circuits and Systems Page 22

23 Busses These slides are included since an upper year instructor quesboned if students in ECE124 were taught this idea Hence some explicit notes. A bus is simply a bundle of mulbple wires running together which carry data from one place to another; e.g., a 16 bit bus, a 32 bit bus, a 64 bit bus. We represent a bus using a bold line with a slash through it possibly labeled with the number of individual wires contained in the bus. ECE124 Digital Circuits and Systems Page 23

24 Busses Imagine that each wire in the bus has different sources of informabon. In other words, there are mulbple drivers for each wire. You CANNOT have mulbple sources driving the same wire at the same Bme! This could, for example, cause electrical shorts if one source wants to drive a logical 1 (+ve voltage) while another source wants to drive a logical 0 (0 voltage). How can we prevent the mulbple driver problem??? ECE124 Digital Circuits and Systems Page 24

25 Busses Could make each wire be driven by a mulbplexer. Then, the select lines on the mulbplexer control whose can drive the wire at any given Bme Will never have more than one source driving a wire at a Bme. In this illustration, there are 8 multiplexers; one for each wire in the bus! ECE124 Digital Circuits and Systems Page 25

26 Busses Can accomplish the same thing using tri state buffers and a decoder to force the enable signals on the tri state buffers to values such that only one tri state buffer is ever on (other tri states are in high impedance state). Output enables coming from decoder; only 1 enable signal is active (at most) meaning only one driver ever connected. In this illustration, there are 8 tri-states; one for each wire in the bus! Will never have more than one source driving a wire at a Bme. ECE124 Digital Circuits and Systems Page 26

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