REV DCA DATE DRAWN CHECKED APPROVED PUBLISHED A W /09/2014 John Rodriguez Jay Jensen Robert Davis Linda Andujo

Transcription

1 REVISION HISTORY Refer to the DCA and associated markups for a complete description of the changes incorporated in a revision. REV DCA DATE DRAWN CHECKED APPROVED PUBLISHED A W /09/2014 John Rodriguez Jay Jensen Robert Davis Linda Andujo THIS DOCUMENT CONTAINS PROPRIETARY INFORMATION. NEITHER RECEIPT NOR POSSESSION OF THIS DOCUMENT CONFERS ANY RIGHT TO REPRODUCE, USE OR DISCLOSE, IN WHOLE OR IN PART, ANY INFORMATION CONTAINED IN THIS DOCUMENT WITHOUT WRITTEN AUTHORIZATION FROM WULFSBERG ELECTRONICS. Chelton Avionics, Inc. dba Wulfsberg Electronics Division Prescott, AZ CAGE CODE 1WZE2 A PRINTED COPY OF THIS DOCUMENT MAY NOT BE THE LATEST REVISION. IT IS THE USER S RESPONSIBILITY TO ENSURE THAT HE OR SHE IS USING THE LATEST DOCUMENT REVISION. THE LATEST REVISION MAY BE VIEWED OR PRINTED FROM THE ELECTRONIC DOCUMENT DISTRIBUTION SYSTEM. DOCUMENT TITLE SERVICE BULLETIN, CSB MOD 12 SIZE A LRU 5520 DOCUMENT NUMBER REV A Typed signatures indicate approval. Handwritten signature approval of this document is on file at Wulfsberg Electronics, Prescott, Arizona. SCALE: NONE DO NOT SCALE DRAWING Revision A Page 1 of 7

2 SERVICE BULLETIN EQUIPMENT: 5520 DATE: 07/11/2014 BULLETIN NUMBER: CSB REVISION: A Section 1 Planning Information 1.0 Implementation Approval Factory Repair Station Only 1.1 Compliance Upon next scheduled maintenance 1.2 Description Update the FPGA Software with load Checksum 0x002C Applicability Part Number , identified without hardware Mod 12 marked Units with Serial Number above met compliance at the time of manufacturing. 1.4 Reason When AMU ACB-B PWR is lost and CPLT is in EMR and PLT is in NRM, CPLT cannot hear AW. 1.5 Approval 1.6 Costing/Parts and Labor 1.7 Special Equipment Required Quantity Description Part Number 1 Altera ByteBlaster II Download Cable: Parallel PL-Byteblaster2 1 ** Altera ByteBlaster Download Cable : USB PL-USB-Blaster-RCN 1 Test Set TS Test Adapter Cable TS RS-232 Adapter Cable TS ** Alternate part depending on available PC system resources Revision A Page 2 of 7

3 1.8 Software Configuration Obtain information for this section from the Software Configuration Index. Software Component (SWID 12) Location Description Device Type Ver Rev Load Module Part Number FPGA Load EPM570T 100I5 FPGA pof 1.8 Weights and Balance 1.9 Electrical Load Data 1.10 Other Publications Affected 1.11 Reference Documents Maintenance Manual: EQUIPMENT MANUAL, AUDIO CONTROL PANEL (ACP) MODEL EQUIPMENT MANUAL AUDIO CONTROL PANEL (ACP) MODEL EQUIPMENT MANUAL AUDIO CONTROL PANEL (ACP) MODEL EQUIPMENT MANUAL AUDIO CONTROL PANEL (ACP) MODEL FPGA PROGRAMMING: VERSION DESCRIPTION DOCUMENT FPGA FOR 5520 Section 2 Procedure Instructions 2.1 Modification Procedure CAUTION Any disassembly/assembly of this unit must be done at a static safe workstation. removed modules should be placed in antistatic bags when not installed in the unit. Open the 5520 and gain access to the Headphone PCB, and Power Supply PCB, in accordance with the Maintenance Manual Disassembly Procedure. Perform the following modification: * Note: Unless otherwise noted, the sequence of rework can be adjusted to facilitate the process. 1. Turn OFF the DC power supply outputs and connect to the TS test set 28 VDC and Power Return inputs as shown in Figure FPGA Programming Setup below Revision A Page 3 of 7

4 2. Connect Altera Download cable (ByteBlaster II or USB-Blaster) to the PC (Parallel or USB) port and attach the 10-pin connector to the ACP-5520 board JTAG (TH1) connector. 3. Turn ON DC power supply outputs to power up the Obtain the POF files specified in section 1.8 Software Configuration. 5. Start the Quartus II Software application. 6. From menu, select <Tool><Programmer>. 7. If ByteBlaster [LPT1] or Usb-Blaster[USB-0] is not shown near the Hardware Setup button. a. Click the button to open the Hardware Setup dialog. b. Using the Currently selected hardware drop down dialog, select ByteBlaster [LPT1] or USB Blaster [USB-0]. c. Close the dialog. 8. Select JTAG in the MODE drop down list box. 9. Click<Add File> button and browse to local folder to select the desired POF Programming file. Click <Open> button to select the POF file for programming. 10. Make sure the check boxes for Programming/Configure and Verify are checked. 11. Click <Start> button to begin programming the device. 12. The progress bar will advance until 100% is displayed. Verify status messages in the system window indicating successfully performed verification and programming operations. The following information is expected in the bottom system status window. 13. Once the POF is loaded into the tool, verify the Device and Checksum fields match those specified in Table 3-5 for the POF. 14. Turn off DC power and disconnect the Download cable from the board JTAG connector. 15. Identify the unit with the procedure as described in the Identification Procedure and reassemble the unit in reverse order of disassembly or, if available, in accordance with the Maintenance Manual Assembly Procedure Revision A Page 4 of 7

5 2.2 Identification Procedure Mark Hardware MOD 12 on the external LRU Mod Data Label. 2.3 Acceptance Test procedures Perform a complete final acceptance / Return to Service test of the LRU in accordance with the appropriate Maintenance Manual. Section 3 Material Information/Parts Required The parts required to modify this unit in accordance with this procedure are available from Cobham Aerospace at (928) ITEM QTY U/M PART NUMBER DESCRIPTION REF Section 4 Warranty Information Units covered by factory warranty may be returned for application of this service bulletin under the the standard Cobham Aerospace Warranty Terms and Conditions. Ship units to: Cobham Aerospace, Communications Attn: Repair Station 6400 Wilkinson Drive Prescott, Arizona USA Revision A Page 5 of 7

6 Section 5 Illustrations Revision A Page 6 of 7

7 END Revision A Page 7 of 7