USB 2.0 High-Speed, Fault-Tolerant 3:1, 4:1 Multiplexers

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1 19-616; Rev ; 7/6 EVALUATION KIT AVAILABLE USB 2. High-Speed, Fault-Tolerant 3:1, 4:1 General Description The analog multiplexers combine the low on-capacitance (C ON ) and low on-resistance (R ON ) necessary for high-performance switching applications. These devices are designed for USB 2. high-speed applications at 48Mbps. The / also handle all the requirements for USB low- and full-speed signaling. The is a dual 3:1 multiplexer whereas the is a dual 4:1 multiplexer. The / feature two digital inputs, C and C 1, to control the analog signal path. Typical applications include switching a USB connector between USB and other operations such as serial communications, audio, and video. An enable input () is provided to disable all channels and place the device into a high-impedance (off) state, as well as reducing power consumption. The operate from a 2.7V to 3.6V power-supply voltage and are protected against +5.5V shorts to COM A - and COM A +. In addition, COM A + and COM A - are normally connected to outside circuitry and feature ±15kV ESD protection. The are available in a 3mm x 3mm, 16-pin TQFN package and operate over the -4 C to +85 C temperature range. Cell Phones Digital Still Cameras PDAs Digital Video Cameras MPEG-4 Players Portable GPS Combination Products KVM Applications Features Single 2.7V to 3.6V Power-Supply Voltage Low 4Ω (typ) On-Resistance (R ON ) -3dB Bandwidth: 425MHz Fault Tolerant to Meet Full USB 2. Specification COM_ Protected to ±15kV ESD Protection per Human Body Model (MIL-STD-883; Method 315) Low Operating Current (2µA), Ultra-Low Quiescent Current (3.µA max) in Standby Mode Low Threshold Eliminates the Need for Translators in 1.8V Low Voltage Systems Tiny 16-Pin, 3mm x 3mm, Lead-Free TQFN Package COMA+ AND COMA- (V) TIME (ns) NOTE: UI = 2.8ns MASK = USB 2. HIGH SPEED Eye Diagram Pin Configurations appear at end of data sheet. Ordering Information/Selector Guide PART PIN-PACKAGE MUX CONFIGURATION TOP MARK PKG CODE ETE+ 16 TQFN-EP* DUAL 3:1 AEY T ETE+ 16 TQFN-EP* DUAL 4:1 AEZ T Note: All devices are specified over the -4 C to +85 C operating temperature range. +Denotes lead-free package. *EP = Exposed paddle. Maxim Integrated Products 1 For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at , or visit Maxim s website at

2 USB 2. High-Speed, Fault-Tolerant 3:1, 4:1 ABSOLUTE MAXIMUM RATINGS (All Voltages Referenced to.)...-.3v to +4V,, C, C 1, (Note 1)...-.3V to +4V COM A+, COM A _, USB+, USB-, USB1+, USB1-, USB2+, USB2-, USB3+, USB V to +5.5V Continuous Current (COM A _ to USB_)...±12mA Peak Current (COM A _ to USB_) (pulsed at 1ms, 1% duty cycle)...±24ma Continuous Power Dissipation (T A = +7 C) 16-Pin TQFN (derate 2.8mW/ C above +7 C) mW Operating Temperature Range...-4 C to +85 C Storage Temperature Range C to +15 C Junction Temperature C Lead Temperature (soldering, 1s)...+3 C Note 1: Signals exceeding are clamped by internal diodes. Limit forward-diode current to maximum current rating. Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ELECTRICAL CHARACTERISTICS ( = +2.7V to +3.6V, T A = -4 C to +85 C, = low, = low, unless otherwise noted. Typical values are at = +3.3V and T A = +25 C.) (Note 2) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS ANALOG SWITCH (COM A _, USB ) = 2.7V, I COMA_ = T A = +25 C 4 5-1mA, V COMA_ = V, 1.5V, = low T A = -4 C to +85 C 6 On-Resistance R ON = 2.7V, I COMA_ = T A = +25 C 4 7-1mA, V COM_ = V, 1.5V, 2.7V, = low T A = -4 C to +85 C 8 = 2.7V, I COMA_ = T A = +25 C mA, V COMA_ = V, 1.5V, = high T A = -4 C to +85 C 18 Ω = 3.V, I COMA_ = T A = +25 C mA, V COMA_ = V, 1.5V, = high T A = -4 C to +85 C 13 On-Resistance Match Between Channels ΔR ON -1mA, V COMA_ = V, = 2.7V, I COMA_ = T A = +25 C V, 2.7V T A = -4 C to +85 C 1. On-Resistance Flatness R FLAT (ON) = 2.7V, I COMA_ = -1mA, V COMA_ = V, 1.5V, 2.7V Ω Ω Off-Leakage Current I L(OFF) = 3.6V, V COMA_ = V USB =.3V, 3.3V µa On-Leakage Current I L(ON) = 3.6V, V COMA_ = V USB =.3V, 3.3V µa Quiescent Supply Current I+ = 3.6V, C = C 1 = = low 25 6 or = high 3 Fault-Protection Trip Threshold V FP = 3.3V V ESD PROTECTION COM A +, COM A - Human Body Model ±15 kv µa 2

3 USB 2. High-Speed, Fault-Tolerant 3:1, 4:1 ELECTRICAL CHARACTERISTICS (continued) ( = +2.7V to +3.6V, T A = -4 C to +85 C, = low, = low, unless otherwise noted. Typical values are at = +3.3V and T A = +25 C.) (Note 2) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS SWITCH AC PERFORMANCE (Note 3) On-Loss ON LOSS f = 1MHz, < V IN < 1V, Figure 1.5 db Crosstalk V CT1, V DCT1 f = 5MHz, Figure 1-5 db Off-Isolation V ISO f = 5MHz, Figure 1-45 db Charge-Pump Noise V COM A _, USB_, R L = R S = 5Ω (Note 4) 1 µv Bandwidth -3dB BW R S = R L = unbalanced 5Ω 425 MHz Off-Capacitance C OFF f = 1MHz, COM A _, USB_, Figure pf On-Capacitance C ON f = 1MHz, COM A _, USB_, Figure 2 15 pf Propagation Delay t PD R L = R S = 5Ω, Figure 3 2 ps Output Skew Same Switch t SK Skew between opposite transitions in same switch, Figure 3 Fault-Protection Response Time t FP V COMA_ = V to 5V to V USB = 2.5V, R L = 5Ω, C L = 1pF, Figure 4 Fault-Protection Recovery Time t FPR V COMA_ = 5V to 3V to V USB = 1.5V, R L = 5Ω, C L = 1pF, Figure 4 1 ps 1 µs 1 µs Charge Injection Q V G =, C L = 1pF, Figure 5 25 pc Enable Turn-On Time t ON V U S B + = V +, R L = 5Ω, C L = 1p F, Fi g ur e µs Enable Turn-Off Time t OFF V U S B + = V +, R L = 5Ω, C L = 1p F, Fi g ur e 6 3 ns Address Transition Time t TRANS V U S B + = V +, R L = 5Ω, C L = 1p F, Fi g ur e µs Total Harmonic Distortion Plus Noise SWITCH LOGIC (,, C, C 1 ) THD+N f = 2Hz to 2kHz, V COMA_ = 1V P-P, R L = 6Ω.2 % Logic-Input Voltage Low V IL.4 V Logic-Input Voltage High V IH 1.4 V Input Logic Hysteresis V HYST 1 mv Input Leakage Current I LEAK = 3.6V, C = or, C 1 = or -1 1 µa Note 2: Limits at -4 C are guaranteed by design. Note 3: Guaranteed by design. Note 4: Charge-pump noise is specified as a peak-to-peak value. 3

4 USB 2. High-Speed, Fault-Tolerant 3:1, 4:1 ( = 3.3V, = = low, T A = +25 C, unless otherwise noted.) RON (Ω) CHARGE INJECTION (pc) ON-RESISTANCE vs. V COM = 2.7V = 3.3V V COM (V) = 3.6V CHARGE INJECTION vs. V COM C L = 1pF V COM (V) toc1 toc4 RON (Ω) QUIESCT SUPPLY CURRT (μa) ON-RESISTANCE vs. V COM T A = +85 C T A = +25 C T A = -4 C V COM (V) QUIESCT SUPPLY CURRT vs. TEMPERATURE = 3.6V TEMPERATURE ( C) Typical Operating Characteristics = 3.3V = 2.7V toc2 toc5 LEAKAGE CURRT (pa) LOGIC THRESHOLD (V) LEAKAGE CURRT vs. TEMPERATURE = 3.6V COM N-LEAKAGE 15 1 COM FF-LEAKAGE TEMPERATURE ( C) LOGIC THRESHOLD vs. SUPPLY VOLTAGE 1. V IH V IL SUPPLY VOLTAGE (V) toc3 toc6 LOSS (db) FREQUCY RESPONSE ON-RESPONSE OFF-ISOLATION CROSSTALK FREQUCY (MHz) toc7 THD+N (%).1 TOTAL HARMONIC DISTORTION PLUS NOISE vs. FREQUCY R L = 6Ω k 1k 1k FREQUCY (Hz) toc8 COMA+ AND COMA- (V) EYE DIAGRAM TIME (ns) toc9 4

5 USB 2. High-Speed, Fault-Tolerant 3:1, 4:1 PIN NAME 1 1 Ground 2 2 COM A + Analog Switch Common D+ Terminal 3 3 COM A - Analog Switch Common D- Terminal 4 4 FUNCTION Pin Description Positive Supply-Voltage Input. Connect to a 2.7V to 3.6V supply voltage. Bypass to with a.1µf capacitor placed as close as possible to the device. 5 5 C 1 Digital Control Input 1. C 1 and C control the analog signal path as shown in the Functional Diagrams section. 6 6 C Digital Control Input. C 1 and C control the analog signal path as shown in the Functional Diagrams section. 7, 8 N.C. No Connection. Not internally connected. 7 USB3- Analog Switch 3 D- Terminal 8 USB3+ Analog Switch 3 D+ Terminal 9 9 USB2- Analog Switch 2 D- Terminal 1 1 USB2+ Analog Switch 2 D+ Terminal USB1+ Analog Switch 1 D+ Terminal USB1- Analog Switch 1 D- Terminal USB+ Analog Switch D+ Terminal USB- Analog Switch D- Terminal Active-Low Enable Input. For normal operation, drive low. Drive high to place all channels in a high-impedance state. The internal charge pump is turned off when is a logic-high. Active-Low Charge-Pump Enable Input. Drive low for normal operation. Drive high to disable the charge pump with the switches still active at a reduced analog signal range and higher R ON. EP Exposed Paddle. Connect EP to. 5

6 USB 2. High-Speed, Fault-Tolerant 3:1, 4:1 CHANNEL SELECT C C 1.1μF USB_ COM_ MEASUREMTS ARE STANDARDIZED AGAINST SHORT AT SOCKET TERMINALS. OFF-ISOLATION IS MEASURED BETWE COM_ AND "OFF" USB_ TERMINAL ON EACH SWITCH. ON-LOSS IS MEASURED BETWE COM_ AND "ON" USB_ TERMINAL ON EACH SWITCH. CROSSTALK IS MEASURED FROM ONE USB_ CHANNEL TO ANOTHER USB_ CHANNEL. SIGNAL DIRECTION THROUGH SWITCH IS REVERSED; WORST VALUES ARE RECORDED. VIN VOUT MEAS. Test Circuits/Timing Diagrams NETWORK ANALYZER 5Ω 5Ω 5Ω 5Ω REF. OFF-ISOLATION = 2log ON-LOSS = 2log CROSSTALK = 2log V IN V IN V IN Figure 1. Off-Isolation, On-Loss, and Crosstalk CHANNEL SELECT C C 1 USB_, COM_ 1MHz CAPACITANCE ANALYZER Figure 2. Channel Off-/On-Capacitance 6

7 USB 2. High-Speed, Fault-Tolerant 3:1, 4:1 V IN+ R S R S USB_+ USB_- 5% C C 1 Test Circuits/Timing Diagrams (continued) IN+ IN- V COM A+ OUT+ RISE-TIME PROPAGATION DELAY = t PLHX OR t PLHY. FALL-TIME PROPAGATION DELAY = t PHLX OR t PHLY. R L t SK = t PLHX - t PHLX OR t PHLY - t PLHY. COM A- OUT- R L t INRISE t INFALL 9% 9% 5% 1% 1% V IN- 5% 5% V t OUTRISE t OUTFALL + V t PLHX 5% tphlx 5% 9% 9% 1% 1% - 5% 5% V t PHLY t PLHY Figure 3. Propagation Delay and Output Skew 7

8 USB 2. High-Speed, Fault-Tolerant 3:1, 4:1 2.5V COM A- t FP t FP USB_ Figure 4. Fault-Protection Response/Recovery Time Test Circuits/Timing Diagrams (continued) 5V 3V V t FPR 3V 2.5V 1.5V V V CO C C 1 USB_ COM A _ CL 1pF V G V CO Δ REPEAT TEST FOR EACH SECTION. Δ IS THE MEASURED VOLTAGE DUE TO CHARGE- TRANSFER ERROR Q WH THE CHANNEL TURNS OFF. Q = Δ X C L. Figure 5. Charge Injection 8

9 USB 2. High-Speed, Fault-Tolerant 3:1, 4:1 V C C 1 Figure 6. Enable Switching Times USB+ USB1+ USB2+ USB3+ COM A + 5Ω Test Circuits/Timing Diagrams (continued) V 5% 9% 9% 1pF t OFF t ON V ADD C C 1 USB+ USB1+ USB2+ USB3+ V ADD 5% 9% 9% COM A + 5Ω 1pF t TRANS t TRANS Figure 7. Address Transition Time 9

10 USB 2. High-Speed, Fault-Tolerant 3:1, 4:1 Detailed Description The analog multiplexers combine the low on-capacitance (C ON ) and low on-resistance (R ON ) necessary for high-performance switching applications. These devices are designed for USB 2. high-speed applications at 48Mbps. The / also handle all the requirements for USB low- and full-speed signaling. In the case of USB low/ full speed, these devices can function normally even if the supply voltage is 2.7V, even though the USB signal may be higher than the supply voltage. The is a dual 3:1 multiplexer, whereas the is a dual 4:1 multiplexer. The / feature two digital inputs, C and C 1, to control the analog signal path. Typical applications include switching a USB connector between USB and other operations such as serial communications, audio, and video. An enable input () is provided to disable all channels and place the device into a high-impedance (off) state, as well as shutting off the charge pump for minimum power consumption. The feature an additional charge-pump enable input () to disable the charge pump. The switches remain active at a lower analog signal range and higher R ON. The operate from a 2.7V to 3.6V power-supply voltage and are current-limit protected against +5.5V shorts to COM A - and COM A +. Digital Control Inputs (C, C 1 ) The provide two digital control inputs (C, C 1 ) to select the analog signal path between the COM A _ and USB channels. The truth tables for the are shown in the Functional Diagrams. Since the only has three USB channels, the code C 1 :C = 1:1 can be used to place all channels into a high-impedance state. This is particularly useful for eliminating the extra control line to the input that is normally used for disabling all channels. Driving C and C 1 rail-to-rail minimizes power consumption. Enable Input () The feature an enable input () that when driven high places all channels into a high-impedance state, as an all-off feature. The internal charge pump is also disabled when is high, thus minimizing the quiescent supply current. For normal operation, drive low. Charge-Pump Enable Input () The charge-pump input () disables and enables the internal charge pump. Drive high to disable the charge pump and reduce the quiescent supply current. With the charge pump disabled, the / still function normally; however, the analog signal range is reduced and the switch on-resistance (R ON ) is increased. The analog signal range with the charge pump disabled is V to 1.5V. For normal operation, drive low. Analog Signal Levels Signals applied to COM A + are routed to the USB_+ terminals, and signals applied to COM A - are routed to the USB_- terminals. These multiplexers are bidirectional, allowing COM A _ and USB_ to be configured as either inputs or outputs. The D+ and D- notation in the Pin Description table is arbitrary and can be interchanged. For example, USB D+ signals can be applied to COM A - and are routed to the USB_- terminals. Additionally, these multiplexers can be used for non-usb signals. COM A + and COM A - are normally connected to outside circuitry and are ±15kV ESD protected. The is a dual 3:1 multiplexer, allowing COM A + to be routed to one of three USB_+ channels, and COM A - to be routed to one of three USB_- channels. The is a dual 4:1 multiplexer, allowing COM A + to be routed to one of four USB_+ channels, and COM A - to be routed to one of four USB_- channels. Overvoltage Fault Protection The feature +5.5V fault protection to COM A + and COM A -. When a fault occurs between 4.5V to 5.5V, the switch automatically goes into a current-limiting mode that limits current to less than 2mA. Fault protection prevents these switches and downstream devices from being damaged due to shorts to the USB bus voltage rail. Applications Information USB Switching The analog multiplexers are fully compliant with the USB 2. specification. The low on-resistance and low on-capacitance of these multiplexers make them ideal for high-performance switching applications. The are ideal for routing USB data lines and for applications that require switching between different data types (see Figure 8). Board Layout High-speed switches require proper layout and design procedures for optimum performance. Keep designcontrolled impedance PC board traces as short as possible. Ensure that bypass capacitors are placed as close to the device as possible and use large ground planes where possible. 1

11 USB 2. High-Speed, Fault-Tolerant 3:1, 4:1 USB CONNECTOR V BUS D+ D- COM A + COM A - USB+ USB3+ USB TRANSCEIVER USB1- USB3- SERIAL DATA LINK USB1+ USB2- USB2+ USB- Figure 8. Multiplexing Four Data Types AUDIO HEADPHONE AUXILIARY INPUT ESD Protection As with all Maxim devices, ESD-protection structures are incorporated on all pins to protect against electrostatic discharges encountered during handling and assembly. The COM A + and COM A - lines have extra protection against static electricity. Maxim s engineers have developed state-of-the-art structures to protect these pins against ESD of ±15kV without damage. The ESD structures withstand high ESD in all states: normal operation, tri-state output mode, and powered down. After an ESD event, Maxim s E-versions keep working without latchup, whereas competing products can latch and must be powered down to remove latch-up. Human Body Model The COM A + and COM A - pins are characterized for ±15kV ESD protection using the Human Body Model (MIL-STD-883, Method 315). Figure 9a shows the Human Body Model and Figure 9b shows the current waveform it generates when discharged into a low impedance. This model consists of a 1pF capacitor charged to the ESD voltage of interest, which is then discharged into the device through a 1.5kΩ resistor. R C 1MΩ R D 15Ω CHARGE-CURRT- LIMIT RESISTOR DISCHARGE RESISTANCE I P 1% 9% Ir PEAK-TO-PEAK RINGING (NOT DRAWN TO SCALE) HIGH- VOLTAGE DC SOURCE Cs 1pF STORAGE CAPACITOR DEVICE UNDER TEST AMPERES 36.8% 1% t RL TIME t DL CURRT WAVEFORM Figure 9a. Human Body ESD Test Model Figure 9b. Human Body Model Current Waveform PROCESS: BiCMOS Chip Information 11

12 USB 2. High-Speed, Fault-Tolerant 3:1, 4:1 COM A + COM A - C C 1 CONTROL LOGIC CHARGE PUMP USB+ USB1+ USB2+ COM A + COM A - C C 1 CONTROL LOGIC Functional Diagrams CHARGE PUMP USB+ USB1+ USB2+ USB3+ USB- USB1- USB2- USB- USB1- USB2- USB3- C 1 C FUNCTION COMMT 1 1 COM A+ USB+ COM A- USB- COM A+ USB1+ COM A- USB1- COM A+ USB2+ COM A- USB2- NORMAL OPERATION NORMAL OPERATION NORMAL OPERATION 1 1 HIGH-Z ALL OFF 1 X X HIGH-Z ALL OFF 1 1 X X HIGH-Z ALL OFF COM A+ USB+ COM A- USB- COM A+ USB1+ COM A- USB1- COM A+ USB2+ COM A- USB2- LARGER R ON LARGER R ON LARGER R ON HIGH-Z ALL OFF X = 1 or. C 1 C FUNCTION COMMT COMA+ USB+ COMA- USB- COMA+ USB1+ COMA- USB1- COMA+ USB2+ COMA- USB2- COMA+ USB3+ COMA- USB3- NORMAL OPERATION NORMAL OPERATION NORMAL OPERATION NORMAL OPERATION 1 X X HIGH-Z ALL OFF 1 1 X X HIGH-Z ALL OFF COMA+ USB+ COMA- USB- COMA+ USB1+ COMA- USB1- COMA+ USB2+ COMA- USB2- COMA+ USB3+ COMA- USB3- LARGER RON LARGER RON LARGER RON LARGER RON 12

13 USB 2. High-Speed, Fault-Tolerant 3:1, 4:1 USB1- TOP VIEW USB+ USB USB2+ USB2- COMA *EP + COMA+ USB TQFN 4 8 USB3+ 7 USB3-6 C 5 C N.C. N.C. C C 1 *CONNECT EXPOSED PAD TO COMA+ USB *EP + TQFN Pin Configurations COMA- USB2+ USB2- USB1- TOP VIEW USB+ USB- 13

14 USB 2. High-Speed, Fault-Tolerant 3:1, 4:1 Package Information (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information, go to MARKING D D/2 E/2.1 C.8 C E AAAA LC A A2 A1 C L L C L e (ND - 1) X e e k L (NE - 1) X e E2 E2/2 e C L D2/2 b D2.1 M C A B L 12x16L QFN THIN.EPS PACKAGE OUTLINE 8, 12, 16L THIN QFN, 3x3x.8mm I 2 PKG REF. A b D E e L N ND NE A1 8L 3x3 MIN. NOM. MAX BSC L 3x3 MIN. NOM. MAX BSC L 3x3 MIN. NOM. MAX BSC PKG. CODES MIN. EXPOSED PAD VARIATIONS D2 NOM. MAX. MIN. NOM. MAX. T x 45 WEED-1 T x 45 WEED-1 T T1633F-3.65 T E PIN ID x 45 JEDEC TQ x 45 WEEC WEED-1 T x WEED x 45 WEED-2 T1633FH x WEED x 45 WEED-2 A2.2 REF.2 REF.2 REF T x 45 WEED-2 k NOTES: 1. DIMSIONING & TOLERANCING CONFORM TO ASME Y14.5M ALL DIMSIONS ARE IN MILLIMETERS. ANGLES ARE IN DEGREES. 3. N IS THE TOTAL NUMBER OF TERMINALS. 4. THE TERMINAL #1 IDTIFIER AND TERMINAL NUMBERING CONVTION SHALL CONFORM TO JESD 95-1 SPP-12. DETAILS OF TERMINAL #1 IDTIFIER ARE OPTIONAL, BUT MUST BE LOCATED WITHIN THE ZONE INDICATED. THE TERMINAL #1 IDTIFIER MAY BE EITHER A MOLD OR MARKED FEATURE. 5. DIMSION b APPLIES TO METALLIZED TERMINAL AND IS MEASURED BETWE.2 mm AND.25 mm FROM TERMINAL TIP. 6. ND AND NE REFER TO THE NUMBER OF TERMINALS ON EACH D AND E SIDE RESPECTIVELY. 7. DEPOPULATION IS POSSIBLE IN A SYMMETRICAL FASHION. 8. COPLANARITY APPLIES TO THE EXPOSED HEAT SINK SLUG AS WELL AS THE TERMINALS. 9. DRAWING CONFORMS TO JEDEC MO22 REVISION C. 1. MARKING IS FOR PACKAGE ORITATION REFERCE ONLY. 11. NUMBER OF LEADS SHOWN ARE FOR REFERCE ONLY. 12. WARPAGE NOT TO EXCEED.1mm. PACKAGE OUTLINE 8, 12, 16L THIN QFN, 3x3x.8mm I 2 Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. 14 Maxim Integrated Products, 12 San Gabriel Drive, Sunnyvale, CA Maxim Integrated Products is a registered trademark of Maxim Integrated Products, Inc. Boblet

15 GLISH?????????? WHAT'S NEW PRODUCTS SOLUTIONS DESIGN APPNOTES SUPPORT BUY COMPANY MEMBERS Maxim > P roducts > A nalog Switches and, USB 2. High-Speed, Fault-Tolerant 3:1, 4:1 High-Speed Analog Switches for Portable Applications that Allow a Limited Number of Pins to Be Used for Multiple Purposes QuickView Technical Documents Ordering Info More Information All Ordering Information Notes: Other options and links for purchasing parts are listed at: Didn't Find What You Need? Ask our applications engineers. Expert assistance in finding parts, usually within one business day. Part number suffixes: T or T&R = tape and reel; + = RoHS/lead-free; # = RoHS/lead-exempt. More: SeeFull Data Sheet or Part Naming Conventions. * Some packages have variations, listed on the drawing. "PkgCode/Variation" tells which variation the product uses. Devices: 1-8 of 8 Free Sam ple Buy Package: TYPE PINS FOOTPRINT DRAWING CODE/VAR * Temp RoHS/Lead-Free? Materials Analysis ETE-T -4C to +85C RoHS/Lead-Free: See data sheet ETE -4C to +85C RoHS/Lead-Free: See data sheet ETE+ THIN QFN;16 pin;1 mm Dwg: I (PDF) Use pkgcode/variation: T1633+4* -4C to +85C RoHS/Lead-Free: Lead Free Materials Analysis ETE+T THIN QFN;16 pin;1 mm Dwg: I (PDF) Use pkgcode/variation: T1633+4* -4C to +85C RoHS/Lead-Free: Lead Free Materials Analysis Free Sam ple Buy Package: TYPE PINS FOOTPRINT DRAWING CODE/VAR * Temp RoHS/Lead-Free? Materials Analysis ETE-T -4C to +85C RoHS/Lead-Free: See data sheet ETE -4C to +85C RoHS/Lead-Free: See data sheet ETE+ ETE+T THIN QFN;16 pin;1 mm Dwg: I (PDF) Use pkgcode/variation: T1633+4* THIN QFN;16 pin;1 mm Dwg: I (PDF) Use pkgcode/variation: T1633+4* -4C to +85C RoHS/Lead-Free: Lead Free Materials Analysis -4C to +85C RoHS/Lead-Free: Lead Free Materials Analysis Didn't Find What You Need? Next Day Product Selection Assistance from Applications Engineers Parametric Search Applications Help

16 QuickView Technical Documents Ordering Info More Information Description Key Features A pplications/u s es Key Specifications Diagram Data Sheet A pplication Notes Design Guides E ngineering Journals Reliability Reports Software/Models E valuation Kits P rice and A vailability Samples Buy O nline P ackage Information Lead-Free Information Related Products N otes and C omments E valuation Kits Document Ref.: ; Rev ; This page last modified: CONTACT US: SD US AN C opyright 27 by Maxim Integrated Products, Dallas Semiconductor Legal Notices P rivacy P olicy

1000 Base-T, ±15kV ESD Protection LAN Switch

19-0841; Rev 0; 6/07 1000 Base-T, ±15kV ESD Protection LAN Switch General Description The meets the needs of high-speed differential switching, including that of Gigabit Ethernet (10/100/1000) Base-T switching