Porting VME-Based Optical-Link Remote I/O Module to a PLC Platform - an Approach to Maximize Cross-Platform Portability Using SoC

Size: px
Start display at page:

Download "Porting VME-Based Optical-Link Remote I/O Module to a PLC Platform - an Approach to Maximize Cross-Platform Portability Using SoC"

Transcription

1 Porting VME-Based Optical-Link Remote I/O Module to a PLC Platform - an Approach to Maximize Cross-Platform Portability Using SoC T. Masuda, A. Kiyomichi Japan Synchrotron Radiation Research Institute (JASRI)

2 Outline Background Optical-linked remote I/O system Platform consideration Development of module Design policy Hardware implementation Software implementation Implementation of FPGA logic Summary

3 Background VME employed at SPring-8 as FE computers. Optical-linked Remote I/O systems utilized to cover widely distributed accelerator equipment. consist of VME-based master boards and several kinds of slave boards. two types of optical-linked remote I/O system RIO system OPT-VME system

4 Background RIO system developed by Mitsubishi Electric Co. used since 1997, already discontinued. employ over 1,400 slave boards in SPring-8. mainly for SR magnet power supplies control. many of them can be replaced with OPT-VME system. developed the compatible slave boards. RIO Master boards RIO Slave boards

5 Background OPT-VME: 4ch single-slot VME board OPT-VME system developed by SPring-8 at two types of VME-based master boards. OPT-VME OPT-CC OPT-CC: 12ch dual-slot VME board

6 Background OPT-VME system developed by SPring-8 at two types of VME-based master boards. OPT-VME OPT-CC employ over 400 slave boards in SPring types of slave boards are available. a kind of slave board Used for steering magnet PSs control at the booster ring.

7 Background OPT-VME system developed by SPring-8 at two types of VME-based master boards. OPT-VME OPT-CC employ over 400 slave boards in SPring types of slave boards are available. original communication protocol (OPT-Protocol 2006) Only support point-to-point connection.

8 Background OPT-CC: master mode OPT-VME system OPT-CC also available in the relay-mode. max. 132 slave boards can be controlled from a master. realized by switching control I/F communication procedure with the remote slave board is implemented in the device driver for the master board. The device driver is responsible for the high-level communication procedures including the remote slave control. OPT-CC: relay mode slave board

9 Background OPT-VME system OPT-CC also available in the relay-mode. max. 132 slave boards can be controlled. realized by switching control I/F. communication procedure with the remote slave board is implemented in the device driver for the master board. The device driver is responsible for the high-level communication procedures including the remote slave control. CC_top vme_if M U X regcnt vme_reg com_top ch_reg com_cntl ch_reg com_cntl ch_reg com_cntl INT_reg cc_opt- RMT_reg com_cntl _vme com_if _vme TOS LINK TOS LINK TOS LINK CH1 CH2 CH12

10 Background OPT-VME system OPT-CC also available in the relay-mode. max. 132 slave boards can be controlled. realized by switching control I/F. communication procedure with the remote slave board is implemented in the device driver for the master board. The device driver is responsible for the high-level communication procedures including the remote slave control. In a master mode CC_top VME vme_if I/F M U X regcnt vme_reg com_top ch_reg com_cntl ch_reg com_cntl ch_reg com_cntl INT_reg cc_opt- RMT_reg com_cntl _vme com_if _vme TOS LINK TOS LINK TOS LINK CH1 CH2 CH12

11 Background OPT-VME system OPT-CC also available in the relay-mode. max. 132 slave boards can be controlled. realized by switching control I/F. communication procedure with the remote slave board is implemented in the device driver for the master board. The device driver is responsible for the high-level communication procedures including the remote slave control. In a relay mode CC_top vme_if M U X regcnt vme_reg com_top ch_reg com_cntl ch_reg com_cntl ch_reg com_cntl INT_reg cc_opt- RMT_reg com_cntl _vme com_if _vme TOS LINK TOS LINK TOS LINK CH1 CH2 CH12

12 Background OPT-CC: master mode OPT-VME system OPT-CC also available in the relay-mode. max. 132 slave boards can be controlled. realized by switching control I/F. communication procedure with the remote slave board is implemented in the device driver for the master board. The device driver is responsible for the highlevel communication procedures including the remote slave control. OPT-CC: relay mode slave board

13 Background OPT-CC: master mode OPT-VME system OPT-CC also available in the relay-mode. max. 132 slave boards can be controlled. realized by switching control I/F. communication procedure with the remote slave board is implemented in the device driver for the master board. The device driver is responsible for the high-level communication procedures including the remote slave control. OPT-CC: relay mode slave board

14 Platform Consideration VME Passed over 30 years, become out-of-date. Two major issues; Lack of bandwidth. Discontinued the de-fact standard bus-bridge chip Tsi148. à This has been a big problem for VME users. considering the next-generation alternative platform.

15 Platform Consideration MTCA.4 Decided to introduce MTCA.4 as a high-end platform. Analog-based old SR LLRF system controlled by VME is planed to be replaced with MTCA.4-based digital LLRF system.

16 Platform Consideration MTCA.4 Decided to introduce MTCA.4 as a high-end platform. Analog-based old SR LLRF system controlled by VME is planed to be replaced with MTCA.4-based digital LLRF system. Linux PLC (Programmable Logic Controller) one of the candidate to cover a low-end side. e.g. e-rt3 (FA-M3) by Yokogawa Electric Co. already applied as front-end computers in both SPring-8 and SACLA.

17 Background Developed the new master module of the OPT-VME system based on the e-rt3 platform. To effectively utilize the resources of large amount of OPT-VME slave board (~400). RIO slave boards (~1,400) are also integrated by replacing OPT-VME based compatible slave boards. Considering alternative platform portability such as a PCI Express (MTCA.4)

18 Development of the new master module OPT-PLC e-rt3-based new master module for the OPT-VME system. SoC Xilinx Zynq 7015 : XC7Z015-1CLG485C Memory 1GB DDR3-SDRAM 128MB QSPI Flash LAN 1 port (RJ-45 Connector) MicroSD 1 port (Micro-SD socket) UART 1 port (Micro-USB connector) High-Speed Serial I/F 4 pairs x 6.25GBps in a 70pins stacking connector (Molex ) JTAG 1 port Power +5V±5% 100mm 83mm 58.11mm

19 OPT-PLC module Design Policies 1. Equip with as many optical channels as possible. 2. Separate an I/O unit from a logic control unit. 3. Control the module using the e-rt3 general-purpose device driver. 4. Control the module from a sequence CPU in addition to a Linux CPU.

20 OPT-PLC module Design Policies 1. Equip with as many optical channels as possible. 2. Separate an I/O unit from a logic control unit. 3. Control the module using à the Hardware e-rt3 general-purpose Implementation device driver. 4. Control the module from a sequence CPU in addition to a Linux CPU.

21 Hardware Implementation Consists of three PCBs. Separate two I/O boards from the control logic board. Connected using 70 pins stacking connector each other. PCB is a little small to mount the FMC. Equipped with 5 optical channels. control logic board I/O boards

22 OPT-PLC module Design Policies 1. Equip with as many optical channels as possible. 2. Separate an I/O unit from a logic control unit. 3. Control the module using the e-rt3 general-purpose device 4. driver. à Implementation of Software & FPGA logic Control the module from a sequence CPU in addition to a Linux CPU. Keyword : SoC

23 OPT-PLC module Design Policies 1. Equip with as many optical channels as possible. 2. Separate an I/O unit from a logic control unit. 3. Control the module using the e-rt3 general-purpose device 4. driver. à Implementation of Software & FPGA logic Control the module from a sequence CPU in addition to a Linux CPU. Keyword : SoC

24 e-rt3 General-Purpose Device Driver supplied and supported by Yokogawa Electric Co. primitive device driver to handle memory access and interrupt.

25 e-rt3 General-Purpose Device Driver supplied and supported Background by Yokogawa Electric Co. primitive device driver to handle memory access and interrupt. OPT-VME system OPT-CC also available in the relay-mode. max. 132 slave boards can be controlled. realized by switching control I/F. communication procedure with the remote slave board is implemented in the device driver for the master board. The device driver is responsible for the high-level communication procedures including the remote slave control. OPT-CC: master mode OPT-CC: relay mode slave board

26 e-rt3 General-Purpose Device Driver supplied and supported Background by Yokogawa Electric Co. primitive device driver to handle memory access and interrupt. OPT-VME system OPT-CC also available in the relay-mode. max. 132 slave boards can be controlled. realized by switching control I/F. communication procedure with the remote slave board is implemented in the device driver for the master board. The device driver is responsible for the high-level communication procedures including the remote slave control. OPT-CC: master mode OPT-CC: relay mode How do we implement this high-level communication procedures? slave board

27 Software Implementation Adopt SoC (Xilinx Zynq 7000) Implement the high-level communication procedures as application software running on ARM Linux in SoC. VME CPU Board (Solaris) Linux CPU module ARM processor in Zynq SoC User User User Application Application Application software software software User User User Application Application Application software software software Communication procedure procedure process process x5 entire system control process API functions for OPT-VMEs ioctl( fd, request, args ) device driver for OPT-VME master Communication Procedures API functions for OPT-VMEs OPT-PLC interface functions e-rt3 general-purpose device driver DPRAM Descriptor Area request args. device driver

28 Software Implementation Adopt SoC (Xilinx Zynq 7000) Implement the high-level communication procedures as application software running on ARM Linux in SoC. VME CPU Board (Solaris) Linux CPU module ARM processor in Zynq SoC User User User Application Application Application software software software User User User Application Application Application software software software Communication procedure procedure process process x5 entire system control process API functions for OPT-VMEs ioctl( fd, request, args ) device driver for OPT-VME master Communication Procedures API functions for OPT-VMEs OPT-PLC interface functions e-rt3 general-purpose device driver DPRAM Descriptor Area request args. device driver

29 Software Implementation Adopt SoC (Xilinx Zynq 7000) Implement the high-level communication procedures as application software running on ARM Linux in SoC. VME CPU Board (Solaris) Linux CPU module ARM processor in Zynq SoC User User User Application Application Application software software software User User User Application Application Application software software software Communication procedure procedure process process x5 entire system control process API functions for OPT-VMEs ioctl( fd, request, args ) device driver for OPT-VME master Communication Procedures API functions for OPT-VMEs OPT-PLC interface functions e-rt3 general-purpose device driver DPRAM Descriptor Area request args. device driver

30 Software Implementation Adopt SoC (Xilinx Zynq 7000) Implement the high-level communication procedures as application software running on ARM Linux in SoC. VME CPU Board (Solaris) Linux CPU module ARM processor in Zynq SoC User User User Application Application Application software software software User User User Application Application Application software software software Communication procedure procedure process process x5 entire system control process API functions for OPT-VMEs ioctl( fd, request, args ) device driver for OPT-VME master Communication Procedures API functions for OPT-VMEs OPT-PLC interface functions e-rt3 general-purpose device driver DPRAM Descriptor Area request args. device driver

31 Software Implementation As a result the device driver of platform side is simplified, Adopt SoC (Xilinx Zynq 7000) the module portability to other platform is enhanced. Implement the high-level communication procedures as application software running on ARM Linux in SoC. VME CPU Board (Solaris) Linux CPU module ARM processor in Zynq SoC User User User Application Application Application software software software User User User Application Application Application software software software Communication procedure procedure process process x5 entire system control process API functions for OPT-VMEs ioctl( fd, request, args ) device driver for OPT-VME master Communication Procedures API functions for OPT-VMEs OPT-PLC interface functions e-rt3 general-purpose device driver DPRAM Descriptor Area request args. device driver

32 Implementation of FPGA Logic PLC bus PLC- GATA ARRAY PL BLOCK PLC- AVALON I/F 32MHz plc-ifm plclocal armlocal AXI BRAM Controller PS BLOCK Dual ARM- Cortex-A9 QuadSPI GigE USART SDIO EEPROM(QSPI) GigE PHY USART-to-USB USART-to-USB RJ-45 Micro-USB Micro-SD IRQ DPRAM (Descriptor) IRQ DDR3 Controller DDR SDRAM3 (1GB) common_reg information_reg iorelay_reg int_cntlm swtichled_led watchdog_m semaphore_reg LED DIP S/W ROTARY S/W 100MHz ledcntl_m existcommon_reg ch_reg opt_datbuffm com_cnt ch_reg opt_datbuffm com_cnt ch_reg opt_datbuffm com_cnt ch_reg opt_datbuffm 80MHz com_cnt CH1 CH2 CH3 CH4 CH5 ch_reg opt_datbuffm com_cnt

33 Implementation of FPGA Logic PLC bus PLC- GATA ARRAY PL BLOCK PLC- AVALON I/F 32MHz plc-ifm plclocal armlocal AXI BRAM Controller PS BLOCK Dual ARM- Cortex-A9 QuadSPI GigE USART SDIO EEPROM(QSPI) GigE PHY USART-to-USB USART-to-USB RJ-45 Micro-USB Micro-SD IRQ DPRAM (Descriptor) IRQ DDR3 Controller DDR SDRAM3 (1GB) common_reg information_reg iorelay_reg int_cntlm swtichled_led watchdog_m semaphore_reg LED DIP S/W ROTARY S/W 100MHz ledcntl_m existcommon_reg ch_reg opt_datbuffm com_cnt ch_reg opt_datbuffm com_cnt ch_reg opt_datbuffm com_cnt ch_reg opt_datbuffm 80MHz com_cnt CH1 CH2 CH3 CH4 CH5 ch_reg opt_datbuffm com_cnt

34 Implementation of FPGA Logic PLC bus PLC- GATA ARRAY PL BLOCK PLC- AVALON I/F 32MHz plc-ifm plclocal armlocal AXI BRAM Controller PS BLOCK Dual ARM- Cortex-A9 QuadSPI GigE USART SDIO EEPROM(QSPI) GigE PHY USART-to-USB USART-to-USB RJ-45 Micro-USB Micro-SD IRQ DPRAM (Descriptor) IRQ DDR3 Controller DDR SDRAM3 (1GB) common_reg information_reg iorelay_reg int_cntlm swtichled_led watchdog_m semaphore_reg LED DIP S/W ROTARY S/W 100MHz ledcntl_m existcommon_reg ch_reg opt_datbuffm com_cnt ch_reg opt_datbuffm com_cnt ch_reg opt_datbuffm com_cnt ch_reg opt_datbuffm 80MHz com_cnt CH1 CH2 CH3 CH4 CH5 ch_reg opt_datbuffm com_cnt

35 Implementation of FPGA Logic PLC bus PLC- GATA ARRAY PL BLOCK PLC- AVALON I/F 32MHz plc-ifm plclocal armlocal AXI BRAM Controller PS BLOCK Dual ARM- Cortex-A9 QuadSPI GigE USART SDIO EEPROM(QSPI) GigE PHY USART-to-USB USART-to-USB RJ-45 Micro-USB Micro-SD We can port the FPGA logic to an alternative bus by replacing this part. LED IRQ information_reg ledcntl_m DPRAM (Descriptor) IRQ common_reg DDR3 Controller DDR SDRAM3 (1GB) iorelay_reg int_cntlm swtichled_led watchdog_m semaphore_reg DIP S/W ROTARY S/W 100MHz existcommon_reg ch_reg opt_datbuffm com_cnt ch_reg opt_datbuffm com_cnt ch_reg opt_datbuffm com_cnt ch_reg opt_datbuffm 80MHz com_cnt CH1 CH2 CH3 CH4 CH5 ch_reg opt_datbuffm com_cnt

36 Summary We have successfully ported the VME-based optical-link remote I/O module to the e-rt3 platform. The developed module OPT-PLC is equipped with Zynq 7000 SoC to build the communication procedures as the application S/W on the ARM Linux. the interface with the PLC bus is simplified and the e-rt3 general-purpose device driver is available. We can port the developed FPGA logic to an alternative bus e.g. the PCI express by replacing the PLC bus interface block in the PL part. The interface simplification enhances portability.

37 Thank you for your attention.

Avnet Zynq Mini Module Plus Embedded Design

Avnet Zynq Mini Module Plus Embedded Design Avnet Zynq Mini Module Plus Embedded Design Version 1.0 May 2014 1 Introduction This document describes a Zynq standalone OS embedded design implemented and tested on the Avnet Zynq Mini Module Plus. 2

More information

MYD-C7Z010/20 Development Board

MYD-C7Z010/20 Development Board MYD-C7Z010/20 Development Board MYC-C7Z010/20 CPU Module as Controller Board Two 0.8mm pitch 140-pin Connectors for Board-to-Board Connections 667MHz Xilinx XC7Z010/20 Dual-core ARM Cortex-A9 Processor

More information

MYC-C7Z010/20 CPU Module

MYC-C7Z010/20 CPU Module MYC-C7Z010/20 CPU Module - 667MHz Xilinx XC7Z010/20 Dual-core ARM Cortex-A9 Processor with Xilinx 7-series FPGA logic - 1GB DDR3 SDRAM (2 x 512MB, 32-bit), 4GB emmc, 32MB QSPI Flash - On-board Gigabit

More information

S2C K7 Prodigy Logic Module Series

S2C K7 Prodigy Logic Module Series S2C K7 Prodigy Logic Module Series Low-Cost Fifth Generation Rapid FPGA-based Prototyping Hardware The S2C K7 Prodigy Logic Module is equipped with one Xilinx Kintex-7 XC7K410T or XC7K325T FPGA device

More information

Zynq-7000 All Programmable SoC Product Overview

Zynq-7000 All Programmable SoC Product Overview Zynq-7000 All Programmable SoC Product Overview The SW, HW and IO Programmable Platform August 2012 Copyright 2012 2009 Xilinx Introducing the Zynq -7000 All Programmable SoC Breakthrough Processing Platform

More information

Copyright 2016 Xilinx

Copyright 2016 Xilinx Zynq Architecture Zynq Vivado 2015.4 Version This material exempt per Department of Commerce license exception TSU Objectives After completing this module, you will be able to: Identify the basic building

More information

UltraZed -EV Starter Kit Getting Started Version 1.3

UltraZed -EV Starter Kit Getting Started Version 1.3 UltraZed -EV Starter Kit Getting Started Version 1.3 Page 1 Copyright 2018 Avnet, Inc. AVNET, Reach Further, and the AV logo are registered trademarks of Avnet, Inc. All other brands are the property of

More information

VXS-610 Dual FPGA and PowerPC VXS Multiprocessor

VXS-610 Dual FPGA and PowerPC VXS Multiprocessor VXS-610 Dual FPGA and PowerPC VXS Multiprocessor Two Xilinx Virtex -5 FPGAs for high performance processing On-board PowerPC CPU for standalone operation, communications management and user applications

More information

Zynq Architecture, PS (ARM) and PL

Zynq Architecture, PS (ARM) and PL , PS (ARM) and PL Joint ICTP-IAEA School on Hybrid Reconfigurable Devices for Scientific Instrumentation Trieste, 1-5 June 2015 Fernando Rincón Fernando.rincon@uclm.es 1 Contents Zynq All Programmable

More information

SoC Platforms and CPU Cores

SoC Platforms and CPU Cores SoC Platforms and CPU Cores COE838: Systems on Chip Design http://www.ee.ryerson.ca/~courses/coe838/ Dr. Gul N. Khan http://www.ee.ryerson.ca/~gnkhan Electrical and Computer Engineering Ryerson University

More information

Simplify System Complexity

Simplify System Complexity Simplify System Complexity With the new high-performance CompactRIO controller Fanie Coetzer Field Sales Engineer Northern South Africa 2 3 New control system CompactPCI MMI/Sequencing/Logging FieldPoint

More information

Requirement ZYNQ SOC Development Board: Z-Turn by MYiR ZYNQ-7020 (XC7Z020-1CLG400C) Vivado and Xilinx SDK TF Card Reader (Micro SD) Windows 7

Requirement ZYNQ SOC Development Board: Z-Turn by MYiR ZYNQ-7020 (XC7Z020-1CLG400C) Vivado and Xilinx SDK TF Card Reader (Micro SD) Windows 7 Project Description The ARM CPU is configured to perform read and write operations on the Block Memory. The Block Memory is created in the PL side of the ZYNQ device. The ARM CPU is configured as Master

More information

VXS-621 FPGA & PowerPC VXS Multiprocessor

VXS-621 FPGA & PowerPC VXS Multiprocessor VXS-621 FPGA & PowerPC VXS Multiprocessor Xilinx Virtex -5 FPGA for high performance processing On-board PowerPC CPU for standalone operation, communications management and user applications Two PMC/XMC

More information

Copyright 2014 Xilinx

Copyright 2014 Xilinx IP Integrator and Embedded System Design Flow Zynq Vivado 2014.2 Version This material exempt per Department of Commerce license exception TSU Objectives After completing this module, you will be able

More information

Design Choices for FPGA-based SoCs When Adding a SATA Storage }

Design Choices for FPGA-based SoCs When Adding a SATA Storage } U4 U7 U7 Q D U5 Q D Design Choices for FPGA-based SoCs When Adding a SATA Storage } Lorenz Kolb & Endric Schubert, Missing Link Electronics Rudolf Usselmann, ASICS World Services Motivation for SATA Storage

More information

Designing with ALTERA SoC Hardware

Designing with ALTERA SoC Hardware Designing with ALTERA SoC Hardware Course Description This course provides all theoretical and practical know-how to design ALTERA SoC devices under Quartus II software. The course combines 60% theory

More information

TAKES CONTROL. Managing and monitoring the whole CoaxData network from a single device COAXBOX (REF )

TAKES CONTROL. Managing and monitoring the whole CoaxData network from a single device COAXBOX (REF ) TAKES CONTROL Managing and monitoring the whole CoaxData network from a single device COAXBOX (REF.769330) Equipped with the software required for CoaxData network management through a web inteface CoaxData

More information

New! New! New! New! New!

New! New! New! New! New! New! New! New! New! New! Model 5950 Features Supports Xilinx Zynq UltraScale+ RFSoC FPGAs 18 GB of DDR4 SDRAM On-board GPS receiver PCI Express (Gen. 1, 2 and 3) interface up to x8 LVDS connections to

More information

BlazePPS (Blaze Packet Processing System) CSEE W4840 Project Design

BlazePPS (Blaze Packet Processing System) CSEE W4840 Project Design BlazePPS (Blaze Packet Processing System) CSEE W4840 Project Design Valeh Valiollahpour Amiri (vv2252) Christopher Campbell (cc3769) Yuanpei Zhang (yz2727) Sheng Qian ( sq2168) March 26, 2015 I) Hardware

More information

MYD-JA5D2X Development Board

MYD-JA5D2X Development Board MYD-JA5D2X Development Board MYC-JA5D2X CPU Module as Controller Board 500MHz Atmel SAMA5D26/27 ARM Cortex-A5 Processor 256MB DDR3 SDRAM, 256MB Nand Flash, 4MB Data FLASH, 64KB EEPROM Serial ports, USB,

More information

«Real Time Embedded systems» Cyclone V SOC - FPGA

«Real Time Embedded systems» Cyclone V SOC - FPGA «Real Time Embedded systems» Cyclone V SOC - FPGA Ref: http://www.altera.com rene.beuchat@epfl.ch LAP/ISIM/IC/EPFL Chargé de cours rene.beuchat@hesge.ch LSN/hepia Prof. HES 1 SOC + FPGA (ex. Cyclone V,

More information

Get Started SUPPORT WARRANTY. Visit the i.mx community at

Get Started SUPPORT WARRANTY.   Visit the i.mx community at SUPPORT Visit the i.mx community at www.imxcommunity.org. WARRANTY Visit www.nxp.com/warranty for complete warranty information. Get Started Download installation software and documentation under Getting

More information

Figure 1: The logicraft-cc Platform - Free USB firmware

Figure 1: The logicraft-cc Platform - Free USB firmware logicraft-cc Companion Chip Platform January 31, 2011 Data Sheet Version: v2.10 Xylon d.o.o. Fallerovo setaliste 22 10000 Zagreb, Croatia Phone: +385 1 368 00 26 Fax: +385 1 365 51 67 E-mail: support@logicbricks.com

More information

NanoMind Z7000. Datasheet On-board CPU and FPGA for space applications

NanoMind Z7000. Datasheet On-board CPU and FPGA for space applications NanoMind Z7000 Datasheet On-board CPU and FPGA for space applications 1 Table of Contents 1 TABLE OF CONTENTS... 2 2 OVERVIEW... 3 2.1 HIGHLIGHTED FEATURES... 3 2.2 BLOCK DIAGRAM... 4 2.3 FUNCTIONAL DESCRIPTION...

More information

EyeCheck Smart Cameras

EyeCheck Smart Cameras EyeCheck Smart Cameras 2 3 EyeCheck 9xx & 1xxx series Technical data Memory: DDR RAM 128 MB FLASH 128 MB Interfaces: Ethernet (LAN) RS422, RS232 (not EC900, EC910, EC1000, EC1010) EtherNet / IP PROFINET

More information

«Real Time Embedded systems» Multi Masters Systems

«Real Time Embedded systems» Multi Masters Systems «Real Time Embedded systems» Multi Masters Systems rene.beuchat@epfl.ch LAP/ISIM/IC/EPFL Chargé de cours rene.beuchat@hesge.ch LSN/hepia Prof. HES 1 Multi Master on Chip On a System On Chip, Master can

More information

MYD-C437X-PRU Development Board

MYD-C437X-PRU Development Board MYD-C437X-PRU Development Board MYC-C437X CPU Module as Controller Board Two 0.8mm pitch 100-pin Connectors for Board-to-Board Connections Up to 1GHz TI AM437x Series ARM Cortex-A9 Processors 512MB DDR3

More information

PRELIMINARY COMPEX SYSTEMS

PRELIMINARY COMPEX SYSTEMS Multi-function IPQ8074 Embedded Board with 2.2GHz CPU 2x USB 3.0 / Supports / 5x Gigabit LAN / 2x Mini PCIe Slot Model: AP.HK01 Specifications Chipset Reference Design System Memory NAND Flash NOR Flash

More information

Parallella Linux - quickstart guide. Antmicro Ltd

Parallella Linux - quickstart guide. Antmicro Ltd Parallella Linux - quickstart guide Antmicro Ltd June 13, 2016 Contents 1 Introduction 1 1.1 Xilinx tools.......................................... 1 1.2 Version information.....................................

More information

AT-501 Cortex-A5 System On Module Product Brief

AT-501 Cortex-A5 System On Module Product Brief AT-501 Cortex-A5 System On Module Product Brief 1. Scope The following document provides a brief description of the AT-501 System on Module (SOM) its features and ordering options. For more details please

More information

SABRE Board for Smart Devices

SABRE Board for Smart Devices Quick Start Guide SABRE Board for Smart Devices Based on the i.mx 6SoloX Applications Processor FREEDOM DEVELOPMENT PLATFORM Quick Start Guide ABOUT THE SABRE BOARD FOR SMART DEVICES BASED ON THE I.MX

More information

Embedded LLRF Controller with Channel Access on MicroTCA Backplane Interconnect

Embedded LLRF Controller with Channel Access on MicroTCA Backplane Interconnect < kazuro.furukawa @ kek.jp > with Channel Access on MicroTCA Backplane Interconnect K. Furukawa, K. Akai, A. Akiyama, T. Kobayashi, S. Michizono, T. Miura, K. Nakanishi, J. Odagiri (KEK) H. Deguchi, K.

More information

EX-9686U/A-L(A9) Hardware User Manual

EX-9686U/A-L(A9) Hardware User Manual EX-9686U/A-L(A9) Hardware User Manual Release Notes Version Release Date Notes 1.00 November, 2013 Initial Release 2.00 January, 2014 The 2 nd release Disclaimer This documentation is provided for use

More information

Qsys and IP Core Integration

Qsys and IP Core Integration Qsys and IP Core Integration Stephen A. Edwards (after David Lariviere) Columbia University Spring 2016 IP Cores Altera s IP Core Integration Tools Connecting IP Cores IP Cores Cyclone V SoC: A Mix of

More information

Strategies for Deploying RFSoC Technology for SIGINT, DRFM and Radar Applications. Rodger Hosking Pentek, Inc. WInnForum Webinar November 8, 2018

Strategies for Deploying RFSoC Technology for SIGINT, DRFM and Radar Applications. Rodger Hosking Pentek, Inc. WInnForum Webinar November 8, 2018 Strategies for Deploying RFSoC Technology for SIGINT, DRFM and Radar Applications Rodger Hosking Pentek, Inc. WInnForum Webinar November 8, 2018 1 Topics Xilinx RFSoC Overview Impact of Latency on Applications

More information

MIL-STD-1553 (T4240/T4160/T4080) 12/8/4 2 PMC/XMC 2.0 WWDT, ETR, RTC, 4 GB DDR3

MIL-STD-1553 (T4240/T4160/T4080) 12/8/4 2 PMC/XMC 2.0 WWDT, ETR, RTC, 4 GB DDR3 Rugged 6U VME Single-Slot SBC Freescale QorIQ Multicore SOC 1/8/4 e6500 Dual Thread Cores (T440/T4160/T4080) Altivec Unit Secure Boot and Trust Architecture.0 4 GB DDR3 with ECC 56 MB NOR Flash Memory

More information

COM-RZN1D - Hardware Manual

COM-RZN1D - Hardware Manual COM-RZN1D - Hardware Manual Hardware Manual 4 / 01.10.2018 emtrion GmbH Copyright 2018 emtrion GmbH All rights reserved. This documentation may not be photocopied or recorded on any electronic media without

More information

SMT166-FMC User Guide

SMT166-FMC User Guide Sundance Multiprocessor Technology Limited Product Specification Unit / Module Description: Unit / Module Number: Document Issue Number: Issue Date: Original Author: SMT166-FMC User Guide Revision History

More information

SBC3100 (Cortex-A72) Single Board Computer

SBC3100 (Cortex-A72) Single Board Computer (Cortex-A72) Single Board Computer Ultra High Performance SBC with RK3399 (Cortex-A72 x2 + Cortex-A53 x4) @ 2Ghz : Single Board Computer H310: Input (receiver) Module : Output (display) Module D120: 4xCOM

More information

Intel Galileo gen 2 Board

Intel Galileo gen 2 Board Intel Galileo gen 2 Board The Arduino Intel Galileo board is a microcontroller board based on the Intel Quark SoC X1000, a 32- bit Intel Pentium -class system on a chip (SoC). It is the first board based

More information

Ettus Research Update

Ettus Research Update Ettus Research Update Matt Ettus Ettus Research GRCon13 Outline 1 Introduction 2 Recent New Products 3 Third Generation Introduction Who am I? Core GNU Radio contributor since 2001 Designed

More information

Machine Vision Camera Interfaces. Korean Vision Show April 2012

Machine Vision Camera Interfaces. Korean Vision Show April 2012 Machine Vision Camera Interfaces Korean Vision Show April 2012 Vision Interfaces Page 1 Machine Vision Hardware Interface Standards PCI, CPCI V2.2, PCIe V2.x USB2, USB3 Vision IEEE1394 (no development

More information

TE EE-S Starter Kit

TE EE-S Starter Kit TE0808-04-09-1EE-S Starter Kit Order number: TE0808-04-09-1EE-S Product information "TE0808-04-09-1EE-S Starter Kit" The Trenz Electronic Starter Kit TE0808-04-09-1EE-S consists of a TE0808-04-09EG-1EE

More information

PRELIMINARY COMPEX SYSTEMS

PRELIMINARY COMPEX SYSTEMS Multi-function IPQ8074 Embedded Board with 2.2GHz CPU 2x USB 3.0 / Supports / 5x Gigabit LAN / 2x Mini PCIe Slot Model: HK01 Specifications Chipset Reference Design System Memory NAND Flash NOR Flash Wireless

More information

Recent ASIC Developments by NEC

Recent ASIC Developments by NEC 20th, Feb. 2008 Recent ASIC Developments by NEC Hiroki Hihara NEC TOSHIBA Space Systems, Ltd. 1 Space Cube Architecture - a mutual subset of T-Engine architecture (1) from Palm-top size reference model

More information

MATLAB/Simulink 기반의프로그래머블 SoC 설계및검증

MATLAB/Simulink 기반의프로그래머블 SoC 설계및검증 MATLAB/Simulink 기반의프로그래머블 SoC 설계및검증 이웅재부장 Application Engineering Group 2014 The MathWorks, Inc. 1 Agenda Introduction ZYNQ Design Process Model-Based Design Workflow Prototyping and Verification Processor

More information

ZC706 Built-In Self Test Flash Application April 2015

ZC706 Built-In Self Test Flash Application April 2015 ZC706 Built-In Self Test Flash Application April 2015 XTP242 Revision History Date Version Description 04/30/15 11.0 Recompiled for 2015.1. 11/24/14 10.0 Recompiled for 2014.4. 10/08/14 9.0 Recompiled

More information

Hardware Specification. Figure 1-2 ZYNQ-7000 Device Family 2 / 9

Hardware Specification. Figure 1-2 ZYNQ-7000 Device Family 2 / 9 Z-turn Board 667MHz Xilinx XC7Z010/20 Dual-core ARM Cortex-A9 Processor with Xilinx 7-series FPGA logic 1GB DDR3 SDRAM (2 x 512MB, 32-bit), 16MB SPI Flash USB_UART, USB2.0 OTG, 1 x 10/100/1000Mbps Ethernet,

More information

Simplify System Complexity

Simplify System Complexity 1 2 Simplify System Complexity With the new high-performance CompactRIO controller Arun Veeramani Senior Program Manager National Instruments NI CompactRIO The Worlds Only Software Designed Controller

More information

LEON4: Fourth Generation of the LEON Processor

LEON4: Fourth Generation of the LEON Processor LEON4: Fourth Generation of the LEON Processor Magnus Själander, Sandi Habinc, and Jiri Gaisler Aeroflex Gaisler, Kungsgatan 12, SE-411 19 Göteborg, Sweden Tel +46 31 775 8650, Email: {magnus, sandi, jiri}@gaisler.com

More information

MYC-C7Z010/20 CPU Module

MYC-C7Z010/20 CPU Module MYC-C7Z010/20 CPU Module - 667MHz Xilinx XC7Z010/20 Dual-core ARM Cortex-A9 Processor with Xilinx 7-series FPGA logic - 1GB DDR3 SDRAM (2 x 512MB, 32-bit), 4GB emmc, 32MB QSPI Flash - On-board Gigabit

More information

On-board PCs for interfacing front-end electronics

On-board PCs for interfacing front-end electronics On-board PCs for interfacing front-end electronics JCOP team meeting April 10, 2002 Niko Neufeld CERN/EP 1 Controlling Boards The traditional approach Ethernet Parallel Bus (VME, Fastbus, ) Control Station

More information

Modular & reconfigurable common PCB-platform of FPGA based LLRF control system for TESLA Test Facility

Modular & reconfigurable common PCB-platform of FPGA based LLRF control system for TESLA Test Facility TESLA Report 2005-04 Modular & reconfigurable common PCB-platform of FPGA based LLRF control system for TESLA Test Facility Krzysztof T. Pozniak, Ryszard S. Romaniuk Institute of Electronic Systems, Nowowiejska

More information

Specification Manual

Specification Manual Document 010-0100002 Document version C Specification Manual SCADA Platform Griffin I'Net, Inc. Page 1 System Hardware Specifications General Specifications -40 to 75 degc ambient temperature range NEMA

More information

TUNA NVM-H2 NVRAM Emulation. Board. User Guide. Version

TUNA NVM-H2 NVRAM Emulation. Board. User Guide. Version TUNA NVM-H2 NVRAM Emulation Board User Guide Version 1.0 2014-11-19 Revision History Date Version Revision 11/19/2014 1.0 Initial Release Table of Contents Overview... 4 NVM-H2 Board Feature... 4 Board

More information

PicoZed SDR Development Kit Getting Started Guide Version 1.4

PicoZed SDR Development Kit Getting Started Guide Version 1.4 PicoZed SDR Development Kit Getting Started Guide Version 1.4 Page 1 Copyright 2017 Avnet, Inc. AVNET, Reach Further, and the AV logo are registered trademarks of Avnet, Inc. All other brands are the property

More information

Matrix-700 Linux-Ready Cortex-A5 Industry IoT Gateway Hardware Guide

Matrix-700 Linux-Ready Cortex-A5 Industry IoT Gateway Hardware Guide Matrix-700 Linux-Ready Cortex-A5 Industry IoT Gateway Hardware Guide Version: 1.12 2018 Jan. Copyright Artila Electronics Co., Ltd. All Rights Reserved. Matrix-700 Hardware Guide Trademarks The Artila

More information

Intelop. *As new IP blocks become available, please contact the factory for the latest updated info.

Intelop. *As new IP blocks become available, please contact the factory for the latest updated info. A FPGA based development platform as part of an EDK is available to target intelop provided IPs or other standard IPs. The platform with Virtex-4 FX12 Evaluation Kit provides a complete hardware environment

More information

The e-rt3 Plus Real-time-OS-based Controller with Excellent Usability

The e-rt3 Plus Real-time-OS-based Controller with Excellent Usability The Real-time-OS-based Controller with Excellent Usability Takashi Hayashi *1 Satoru Ikeda *2 Masao Horita *3 Hideyuki Ishinaka *3 The released in December 2015 is the latest model of the e-rt3 series

More information

Quick Start Guide. TWR-VF65GS10 For Vybrid Controller Solutions Based on ARM Cortex -A5 and Cortex-M4 Processors with the DS-5 Toolchain TOWER SYSTEM

Quick Start Guide. TWR-VF65GS10 For Vybrid Controller Solutions Based on ARM Cortex -A5 and Cortex-M4 Processors with the DS-5 Toolchain TOWER SYSTEM TWR-VF65GS10 For Vybrid Controller Solutions Based on ARM Cortex -A5 and Cortex-M4 Processors with the DS-5 Toolchain TOWER SYSTEM Get to Know the TWR-VF65GS10 Dual Quad SPI K20 JTAG Header UART Selection

More information

Introduction CHAPTER 1

Introduction CHAPTER 1 CHAPTER 1 Introduction The ROBO-667 all-in-one single board computer is designed to fit a high performance Pentium-III based CPU and compatible for high-end computer system with PCI/ISA Bus architecture.

More information

Ettus Research: Future Directions

Ettus Research: Future Directions Ettus Research: Future Directions Manuel Uhm Director of Marketing, Ettus Research Chair of the BoD, Wireless Innovation Forum manuel.uhm@ettus.com 408-610-6368 What s in a Title? RFNoC/Vivado HLS Challenge

More information

UCT Software-Defined Radio Research Group

UCT Software-Defined Radio Research Group UCT Software-Defined Radio Research Group UCT SDRRG Team UCT Faculty: Alan Langman Mike Inggs Simon Winberg PhD Students: Brandon Hamilton MSc Students: Bruce Raw Gordon Inggs Simon Scott Joseph Wamicha

More information

SoC FPGAs. Your User-Customizable System on Chip Altera Corporation Public

SoC FPGAs. Your User-Customizable System on Chip Altera Corporation Public SoC FPGAs Your User-Customizable System on Chip Embedded Developers Needs Low High Increase system performance Reduce system power Reduce board size Reduce system cost 2 Providing the Best of Both Worlds

More information

Santa Fe (MAXREFDES5#) MicroZed Quick Start Guide

Santa Fe (MAXREFDES5#) MicroZed Quick Start Guide Santa Fe (MAXREFDES5#) MicroZed Quick Start Guide Rev 0; 5/14 Maxim Integrated cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim Integrated product.

More information

MYC-C437X CPU Module

MYC-C437X CPU Module MYC-C437X CPU Module - Up to 1GHz TI AM437x Series ARM Cortex-A9 Processors - 512MB DDR3 SDRAM, 4GB emmc Flash, 32KB EEPROM - Gigabit Ethernet PHY - Power Management IC - Two 0.8mm pitch 100-pin Board-to-Board

More information

TABLE OF CONTENTS 1. INTRODUCTION 1.1. PREFACE KEY FEATURES PERFORMANCE LIST BLOCK DIAGRAM...

TABLE OF CONTENTS 1. INTRODUCTION 1.1. PREFACE KEY FEATURES PERFORMANCE LIST BLOCK DIAGRAM... Table of Contents TABLE OF CONTENTS 1. INTRODUCTION 1.1. PREFACE... 1-1 1.2. KEY FEATURES... 1-1 1.3. PERFORMANCE LIST... 1-3 1.4. BLOCK DIAGRAM... 1-4 1.5. INTRODUCE THE PCI - BUS... 1-5 1.6. FEATURES...

More information

New! New! New! New! New!

New! New! New! New! New! New! New! New! New! New! Model 5950 Features Supports Xilinx Zynq UltraScale+ RFSoC FPGAs 18 GB of DDR4 SDRAM On-board GPS receiver PCI Express (Gen. 1, 2 and 3) interface up to x8 LVDS connections to

More information

Integrating FPGAs with Nengo. Xuan Choo, Ben Morcos Nengo Summer School 2018 (Jun 11, 2018)

Integrating FPGAs with Nengo. Xuan Choo, Ben Morcos Nengo Summer School 2018 (Jun 11, 2018) Integrating FPGAs with Nengo Xuan Choo, Ben Morcos Nengo Summer School 2018 (Jun 11, 2018) FPGA Basics What is an FPGA? FPGA Basics What is an FPGA? Field programmable gate array FPGA Basics What is an

More information

ARM Cortex-A9 ARM v7-a. A programmer s perspective Part1

ARM Cortex-A9 ARM v7-a. A programmer s perspective Part1 ARM Cortex-A9 ARM v7-a A programmer s perspective Part1 ARM: Advanced RISC Machine First appeared in 1985 as Acorn RISC Machine from Acorn Computers in Manchester England Limited success outcompeted by

More information

. Micro SD Card Socket. SMARC 2.0 Compliant

. Micro SD Card Socket. SMARC 2.0 Compliant MSC SM2S-IMX6 NXP i.mx6 ARM Cortex -A9 Description The design of the MSC SM2S-IMX6 module is based on NXP s i.mx 6 processors offering quad-, dual- and single-core ARM Cortex -A9 compute performance at

More information

Ten (or so) Small Computers

Ten (or so) Small Computers Ten (or so) Small Computers by Jon "maddog" Hall Executive Director Linux International and President, Project Cauã 1 of 50 Who Am I? Half Electrical Engineer, Half Business, Half Computer Software In

More information

PCI-X Bus PCI Express Bus Variants for Portable Computers Variants for Industrial Systems

PCI-X Bus PCI Express Bus Variants for Portable Computers Variants for Industrial Systems PCI Bus Variants PCI-X Bus PCI Express Bus Variants for Portable Computers Variants for Industrial Systems 1 Variants for Portable Computers Mini PCI PCMCIA Standards CardBus ExpressCard 2 Specifications

More information

Embest SOC8200 Single Board Computer

Embest SOC8200 Single Board Computer Embest SOC8200 Single Board Computer TI's AM3517 ARM Cortex A8 Microprocessors 600MHz ARM Cortex-A8 Core NEON SIMD Coprocessor POWERVR SGX Graphics Accelerator (AM3517 only) 16KB I-Cache, 16KB D-Cache,

More information

Fujitsu System Applications Support. Fujitsu Microelectronics America, Inc. 02/02

Fujitsu System Applications Support. Fujitsu Microelectronics America, Inc. 02/02 Fujitsu System Applications Support 1 Overview System Applications Support SOC Application Development Lab Multimedia VoIP Wireless Bluetooth Processors, DSP and Peripherals ARM Reference Platform 2 SOC

More information

Designing with ALTERA SoC

Designing with ALTERA SoC Designing with ALTERA SoC תיאורהקורס קורסזהמספקאתכלהידע התיאורטיוהמעשילתכנוןרכיביSoC שלחברתALTERA תחתסביבת הפיתוחII.Quartus הקורסמשלב 60% תיאוריהו- 40% עבודה מעשית עללוחותפיתוח.SoC הקורסמתחילבסקירתמשפחותרכבי

More information

Scintillator Data Acquisition System

Scintillator Data Acquisition System Scintillator Data Acquisition System Applications in the CALICE AHCAL and ScECAL > AHCAL DAQ Overview > Hardware > LDA > Software > Plan Aliakbar Ebrahimi - DESY AHCAL Testbeam Preparation Hamburg, July

More information

OnRISC Alekto 2 Hardware Manual

OnRISC Alekto 2 Hardware Manual OnRISC Alekto 2 Hardware Manual Edition: September 2013 Tel: +49 40 528 401 0 Fax: +49 40 528 401 99 Web: www.visionsystems.de Support: service@visionsystems.de The software described in this manual is

More information

XMC-RFSOC-A. XMC Module Xilinx Zynq UltraScale+ RFSOC. Overview. Key Features. Typical Applications. Advanced Information Subject To Change

XMC-RFSOC-A. XMC Module Xilinx Zynq UltraScale+ RFSOC. Overview. Key Features. Typical Applications. Advanced Information Subject To Change Advanced Information Subject To Change XMC-RFSOC-A XMC Module Xilinx Zynq UltraScale+ RFSOC Overview PanaTeQ s XMC-RFSOC-A is a XMC module based on the Zynq UltraScale+ RFSoC device from Xilinx. The Zynq

More information

0B specifications 1B

0B specifications 1B 0B 1Bspecifications fit-pc 4 fit-pc4 Specifications2 Overview Using AMD's latest G-Series 'Jaguar' Quad Core System-on-Chip (SoC), Fit PC4 is the next generation to be introduced within the already popular

More information

pcduino V3B XC4350 User Manual

pcduino V3B XC4350 User Manual pcduino V3B XC4350 User Manual 1 User Manual Contents Board Overview...2 System Features...3 Single-Board Computer Configuration......3 Pin Assignments...4 Single-Board Computer Setup...6 Required Hardware...6

More information

cpci-ry02 (4x50 Matrix) User s Manual

cpci-ry02 (4x50 Matrix) User s Manual cpci-ry02 (4x50 Matrix) User s Manual Windows, Windows2000, Windows NT and Windows XP are trademarks of Microsoft. We acknowledge that the trademarks or service names of all other organizations mentioned

More information

Open Platform for Developing and Testing Smart Grid Automation Systems. Igor Alvarado National Instruments Corp.

Open Platform for Developing and Testing Smart Grid Automation Systems. Igor Alvarado National Instruments Corp. Open Platform for Developing and Testing Smart Grid Automation Systems Igor Alvarado National Instruments Corp. Panel 1: State of the Art: Modeling, Simulation, Testing and Calibration Facilities April

More information

OK335x Products Guide. Contents

OK335x Products Guide. Contents Contents Contents... 2 Version history... 3 Chapter One General Introduction... 4 1.1 Products Overview... 4 1.2 Application Fields... 5 Chapter Two OK335xD Single Board Computer... 6 2.1 Product Introduction...

More information

RunBMC - A Modular BMC Mezzanine Card BUV - Bring Up Vehicle For BMC Mezzanine. Eric Shobe & Jared Mednick Hardware Engineer - Salesforce

RunBMC - A Modular BMC Mezzanine Card BUV - Bring Up Vehicle For BMC Mezzanine. Eric Shobe & Jared Mednick Hardware Engineer - Salesforce RunBMC - A Modular BMC Mezzanine Card BUV - Bring Up Vehicle For BMC Mezzanine Eric Shobe & Jared Mednick Hardware Engineer - Salesforce RunBMC A Modular BMC Mezzanine Eric Shobe & Jared Mednick, HW at

More information

Hello, and welcome to this presentation of the STM32L4 System Configuration Controller.

Hello, and welcome to this presentation of the STM32L4 System Configuration Controller. Hello, and welcome to this presentation of the STM32L4 System Configuration Controller. 1 Please note that this presentation has been written for STM32L47x/48x devices. The key differences with other devices

More information

Module 1. Introduction. Version 2 EE IIT, Kharagpur 1

Module 1. Introduction. Version 2 EE IIT, Kharagpur 1 Module 1 Introduction Version 2 EE IIT, Kharagpur 1 Lesson 3 Embedded Systems Components Part I Version 2 EE IIT, Kharagpur 2 Structural Layout with Example Instructional Objectives After going through

More information

Hugo Cunha. Senior Firmware Developer Globaltronics

Hugo Cunha. Senior Firmware Developer Globaltronics Hugo Cunha Senior Firmware Developer Globaltronics NB-IoT Product Acceleration Platforms 2018 Speaker Hugo Cunha Project Developper Agenda About us NB IoT Platforms The WIIPIIDO The Gateway FE 1 About

More information

RAID prototype system introduction. SATA-IP RAID prototype system for Xilinx FPGA. 3 September 2018 Design Gateway Page 1.

RAID prototype system introduction. SATA-IP RAID prototype system for Xilinx FPGA. 3 September 2018 Design Gateway Page 1. RAID prototype system introduction Ver1.3E - RAID prototype system for Xilinx FPGA 3 September 2018 Design Gateway Page 1 System Outline RAID prototype for the latest Xilinx FPGA Use RAID adapter board

More information

PXIe FPGA board SMT G Parker

PXIe FPGA board SMT G Parker Form : QCF51 Date : 6 July 2006 PXIe FPGA board SMT700 1.5 20 th November 2009 G Parker Sundance Multiprocessor Technology Ltd, Chiltern House, Waterside, Chesham, Bucks. HP5 1PS. This document is the

More information

MYD-Y6ULX Development Board

MYD-Y6ULX Development Board MYD-Y6ULX Development Board MYC-Y6ULX CPU Module as Controller Board 528Hz NXP i.mx 6UL/6ULL ARM Cortex-A7 Processors 1.0mm pitch 140-pin Stamp Hole Expansion Interface for Board-to-Board Connections 256MB

More information

Introduction CHAPTER 1

Introduction CHAPTER 1 CHAPTER 1 Introduction The ACTI-788 all-in-one single board computer is designed to fit a high performance Celeron based CPU and compatible for high-end computer system application with PCI/ISA bus architecture.

More information

Compute Node Design for DAQ and Trigger Subsystem in Giessen. Justus Liebig University in Giessen

Compute Node Design for DAQ and Trigger Subsystem in Giessen. Justus Liebig University in Giessen Compute Node Design for DAQ and Trigger Subsystem in Giessen Justus Liebig University in Giessen Outline Design goals Current work in Giessen Hardware Software Future work Justus Liebig University in Giessen,

More information

A Closer Look at the Epiphany IV 28nm 64 core Coprocessor. Andreas Olofsson PEGPUM 2013

A Closer Look at the Epiphany IV 28nm 64 core Coprocessor. Andreas Olofsson PEGPUM 2013 A Closer Look at the Epiphany IV 28nm 64 core Coprocessor Andreas Olofsson PEGPUM 2013 1 Adapteva Achieves 3 World Firsts 1. First processor company to reach 50 GFLOPS/W 3. First semiconductor company

More information

XMC-ZU1. XMC Module Xilinx Zynq UltraScale+ MPSoC. Overview. Key Features. Typical Applications

XMC-ZU1. XMC Module Xilinx Zynq UltraScale+ MPSoC. Overview. Key Features. Typical Applications XMC-ZU1 XMC Module Xilinx Zynq UltraScale+ MPSoC Overview PanaTeQ s XMC-ZU1 is a XMC module based on the Zynq UltraScale+ MultiProcessor SoC device from Xilinx. The Zynq UltraScale+ integrates a Quad-core

More information

Maximizing heterogeneous system performance with ARM interconnect and CCIX

Maximizing heterogeneous system performance with ARM interconnect and CCIX Maximizing heterogeneous system performance with ARM interconnect and CCIX Neil Parris, Director of product marketing Systems and software group, ARM Teratec June 2017 Intelligent flexible cloud to enable

More information

Introduction To Computer Hardware. Hafijur Rahman

Introduction To Computer Hardware. Hafijur Rahman Introduction To Computer Hardware Lecture 2 Hafijur Rahman What is a Computer? A computer is an electronic device, which can input, process, and output data. input processing output A computer is a machine

More information

MPGD dedicated HV system. MLAB ICTP Miramare (TS) MPGD-dedicated HV system TASK 6. These slides and its contents are for INTERNAL use only

MPGD dedicated HV system. MLAB ICTP Miramare (TS) MPGD-dedicated HV system TASK 6. These slides and its contents are for INTERNAL use only MPGD-dedicated HV system TASK 6 MPGD dedicated HV system TASK COORDINATOR: PARTICIPANTS: S. Levorato INFN Trieste MLAB ICTP Miramare (TS) These slides and its contents are for INTERNAL use only July 2018

More information

PRODUCT PORTFOLIO INREVIUM

PRODUCT PORTFOLIO INREVIUM 2017 PRODUCT PORTFOLIO INREVIUM 0 P a g e Inrevium Product Portfolio Contents Contents... 1 Base Boards... 2 Virtex UltraScale High Density Scalable ASIC Prototyping Platform... 2 Kintex UltraScale 8K4K

More information

MYD-SAMA5D3X Development Board

MYD-SAMA5D3X Development Board MYD-SAMA5D3X Development Board MYC-SAMA5D3X CPU Module as Controller Board DDR2 SO-DIMM 200-pin Signals Consistent with Atmel's Official Board 536MHz Atmel SAMA5D3 Series ARM Cortex-A5 Processors 512MB

More information