SELECTIVE READ-OUT PROCESSOR OUTLINE. I. Mandjavidze, M. Mur MOTIVATION AND GOALS TRIGGER TOWERS AND OFF-DETECTOR READ-OUT SEGMENTATION

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1 SLIV R-OU PROSSOR FOR H MS LROMGI LORIMR : I. Mandjavidze, M. Mur Saclay, Gif-sur-Yvette X, France Irakli.Mandjavidze@cea.fr, Michel.Mur@cea.fr Saclay MS Group Meeting OULI MOIVIO GOLS RIGGR OWRS OFF-OR R-OU SGMIO SLIV R-OU ORGIZIO PLIG OLLORIO Saclay, March 6th, 2003

2 Selective Read-out Processor for the MS lectromagnetic alorimeter : Saclay MS Group Meeting MS Q apabilities otal event size : 1 Mbyte MOIVIO GOLS llowed average L event size : 100 Kbyte (raw data + trigger primitives + format overhead) ata throughput : 60 Gbyte/s Raw data volume of L per event : Mbyte umber of read-out channels : umber of samples per channel : 7-10 umber of bytes per samples : 2 L raw event size exceeds total MS event size t 100 kq L1 rigger rate L data bandwidth Gbyte/s exceeds Q throughput Selective Read-out : efine zones of interest on event by event basis Read all data from channels within the zones of interest Zero suppress the rest of channels chieve the necessary reduction factor of ~20 Irakli.Mandjavidze@cea.fr, Michel.Mur@cea.fr 2 / 21 Saclay, March 6th, 2003

3 Selective Read-out Processor for the MS lectromagnetic alorimeter : Saclay MS Group Meeting RIGGR OWRS OFF-OR R-OU SGMIO L1 calorimeter trigger operates on rigger owers η Selective read-out algorithms are also based on s s and read-out segmentation in barrel rystal Pseudo Strip rigger ower () Super Module (SM) Half arrel ϕ η= ϕ= rystals x ~ Pseudo Strips 5x5=25 rystals x ~ x4=68s x ~0.349 ϕ=20 18 SMs = 1224 s x 2π primitives are generated for L1 trigger by s (rigger oncentrator ard) 1 serves entire Super Module 36 s rystal data is read-out and sent to Q by s (ata oncentrator ard) 1 serves entire Super Module 36 s Irakli.Mandjavidze@cea.fr, Michel.Mur@cea.fr 3 / 21 Saclay, March 6th, 2003

4 Selective Read-out Processor for the MS lectromagnetic alorimeter : Saclay MS Group Meeting RIGGR OWRS OFF-OR R-OU SGMIO (O.) s and read-out segmentation in end-cap In quadrant 1 Super rystal Partial S rigger ower Mapping of other quadrants is obtained by successive 90 o rotation of quadrant 1 rigger ower segmentation follows η-ϕ coordinates Read-out segmentation follows x-y coordinates read-out unit - Super rystal - corresponds to a group of 5x5=25 crystals omplicated relationship between Ss and s omplicated end-cap mapping of s and s Irakli.Mandjavidze@cea.fr, Michel.Mur@cea.fr 4 / 21 Saclay, March 6th, 2003

5 Selective Read-out Processor for the MS lectromagnetic alorimeter : Saclay MS Group Meeting MPPIGS I P Initial mapping in 45 φ sectors urrent mapping in 40 φ sectors η regions: η regions: s 8 s 5 s per 36 s 9 s 4 s per etter correspondence between s and s Simpler organisation of the O electronics Irakli.Mandjavidze@cea.fr, Michel.Mur@cea.fr 5 / 21 Saclay, March 6th, 2003

6 Selective Read-out Processor for the MS lectromagnetic alorimeter : Saclay MS Group Meeting RYSL, S,, MPPIG S Partial S Inner s cover η region [18, 21] Outer s cover η region [22, 28] Irakli.Mandjavidze@cea.fr, Michel.Mur@cea.fr 6 / 21 Saclay, March 6th, 2003

7 Selective Read-out Processor for the MS lectromagnetic alorimeter : Saclay MS Group Meeting SLIV R-OU LGORIHM Possible lassification of rigger owers High Low High Low High Low enter eighbours (in 3x3 or 5x5 region) Single (if not a neighbour) Suppressed (if not a neighbour) Possible Read-out lgorithms Scheme Scheme High hreshold (GeV) Low hreshold (GeV) entre ZS (0σ) ll ata ction eighbour ZS (0σ) in 3x3 ll ata in 3x3 or 5x5 Single ZS (0σ) ll ata Suppressed o data ZS (3.5σ) Irakli.Mandjavidze@cea.fr, Michel.Mur@cea.fr 7 / 21 Saclay, March 6th, 2003

8 Selective Read-out Processor for the MS lectromagnetic alorimeter : Saclay MS Group Meeting H SLIV R-OU SYSM FOR H MS L 40 MHz L front-ends rigger primitives generator boards s First level trigger ll data Level 1 ccept 100 kq ll ata for accepted events rigger ower lassification Flags 150 Mbyte/s Selective Read-out Processor Read-Out buffers s Selective read-out flags SRP algorithm boards 150 Mbyte/s s Latency 3-5 µs vent uilding System Selected data for accepted events SRP haracteristics 108 inputs from 108 s 54 outputs to 54 s Input / Output bandwidth of ~150 Mbyte/s 100 kq asynchronous operation Processing latency budget ~3-5 µs VM cards of custom FPG based hardware Irakli.Mandjavidze@cea.fr, Michel.Mur@cea.fr 8 / 21 Saclay, March 6th, 2003

9 Selective Read-out Processor for the MS lectromagnetic alorimeter : Saclay MS Group Meeting URR SLI MPPIG OF LGORIHM ORS, S S ach serves 12 s and up to 12 s η regions: η regions: s per ndap 36 s per ndap 4 per 3 s per arrel 12 s and 12 s per 3 s per ndap 12 s and 3 s per s s in s s in s s and s in arrel Irakli.Mandjavidze@cea.fr, Michel.Mur@cea.fr 9 / 21 Saclay, March 6th, 2003

10 Selective Read-out Processor for the MS lectromagnetic alorimeter : Saclay MS Group Meeting xchange of Information among SRP lgorithm oards he 3x3 or 5x5 windows slide across η-φ grid he windows cross lgorithm oard boundaries Left s arrel s Right s η regions (13, 19) 6 (12, 18) φ sectors of 20 o 5 (11, 17) 4 (10, 26) 3 (9, 15) 2 (8, 14) 1 (7, 13) 18 (6, 12) he s must exchange information about s on their edges Irakli.Mandjavidze@cea.fr, Michel.Mur@cea.fr 10 / 21 Saclay, March 6th, 2003

11 Selective Read-out Processor for the MS lectromagnetic alorimeter : Saclay MS Group Meeting IFORMIO XHG HLS W LGORIHM ORS Left s arrel s Right s ach arrel communicates with its 8 neighbours ach ndap communicates with its 5 neighbours Irakli.Mandjavidze@cea.fr, Michel.Mur@cea.fr 11 / 21 Saclay, March 6th, 2003

12 Selective Read-out Processor for the MS lectromagnetic alorimeter : Saclay MS Group Meeting POSSIL ORGIZIO OF SRP I H S OF 40 Φ SOR S SRP an be housed in a single VM rate S Left ndcap arrel R P S I 3 arrel s : 12 inputs 12 outputs 8 bi-directional communication channels with s 6 ndap s : 12 inputs 3 outputs 5 bi-directional communication channels with s - S interface board (/SI) SRP controller board (SRP) Right ndcap Irakli.Mandjavidze@cea.fr, Michel.Mur@cea.fr 12 / 21 Saclay, March 6th, 2003

13 Selective Read-out Processor for the MS lectromagnetic alorimeter : Saclay MS Group Meeting XUIO HR WIHI H LGORIHM OR L1 ccept tcc: ab: neib: dcc: S flags R I V #tcc < 12 #neib < 5;8 #neib < 5;8 X H G Send flags Receive flags X H G #dcc < 3;12 L G O S SR flags R I V Irakli.Mandjavidze@cea.fr, Michel.Mur@cea.fr 13 / 21 Saclay, March 6th, 2003

14 Selective Read-out Processor for the MS lectromagnetic alorimeter : Saclay MS Group Meeting OMMUIIO HLS OF SRP I I I I I I I I I I I I I O O O O O O O O O O O O O Inter rate ommunications with s and s Unidirectional sends flags to only one of SRP communication lines Intra rate ommunications among s idirectional n exchange flags with up to 8 s 27 communication lines receives SR flags from only one 54 - communication lines Serial optical physical layer Irakli.Mandjavidze@cea.fr, Michel.Mur@cea.fr 14 / 21 Saclay, March 6th, 2003

15 Selective Read-out Processor for the MS lectromagnetic alorimeter : Saclay MS Group Meeting SRP OMMUIIO HLS From s and to s Passive Optical ross-onnect Parallel optic technology: 12-channel x and Rx optical modules at Gbit/s Passive optical expanders connecting individual channels to s and s Passive optical cross-connect for all-to-all connectivity Irakli.Mandjavidze@cea.fr, Michel.Mur@cea.fr 15 / 21 Saclay, March 6th, 2003

16 Selective Read-out Processor for the MS lectromagnetic alorimeter : Saclay MS Group Meeting SRP OMMUIIO HLS: - - HLS On oard Logic x/rx Individual fibres Passive distribution module 12-fibre assemblies On lgorithm oard Rx On oard Logic x/rx Optical ransceivers x Logic Parallel Optic MPO Rx and x Pairs Irakli.Mandjavidze@cea.fr, Michel.Mur@cea.fr 16 / 21 Saclay, March 6th, 2003

17 Selective Read-out Processor for the MS lectromagnetic alorimeter : Saclay MS Group Meeting SRP OMMUIIO HLS : - HLS SRP x Passive Optical ross-connect Rx SRP 12-channel MP / MPO connector Irakli.Mandjavidze@cea.fr, Michel.Mur@cea.fr 17 / 21 Saclay, March 6th, 2003

18 Selective Read-out Processor for the MS lectromagnetic alorimeter : Saclay MS Group Meeting SMPL LYOU OF Use multi-gbit/s serial I/O technology of modern FPG devices Option a: High nd Single hip esign Option b: Middle Range ouble hip esign P1 J0 P2 P1 J0 P2 VM VM X2VP70-5 FF RI/O 996 I/O Xilinx VIIPro Xilinx VIIPro X2VP40-5 FF1517: 12 RI/O, 804 I/O FF1152: 12 RI/O, 692 I/O Rx x Xilinx VIIPro Rx x 12-channel MPO modules Rx x Rx x 12-channel MPO modules Xilinx Virtex II Pro X2VP70 device in FF1704 package with 20 Rocket I/O transceivers 12 Rocket I/Os for / unidirectional connections 8 Rocket I/Os for bidirectional connections ~ Gbit/s per channel Irakli.Mandjavidze@cea.fr, Michel.Mur@cea.fr 18 / 21 Saclay, March 6th, 2003

19 Selective Read-out Processor for the MS lectromagnetic alorimeter : Saclay MS Group Meeting SLIV R-OU LGORIHM I HRWR Initial studies of classification logic using a simplified algorithm 2-bit flags 3x3 sliding windows arrel region ssumes all data from s and neighbour s received eeds 20-cycle deep pipeline per Super Module arrel Super Modules are treated in parallel 250 ns to classify arrel s assuming 80 MHz clock In barrel it is straightforward to derive selective read-out flags after classification etter understanding of selection algorithm is necessary 5 x 5 versus 3 x 3 windows 3-bit versus 2-bit classification arrel versus ndap fficiency learly involvement from physicists is necessary Irakli.Mandjavidze@cea.fr, Michel.Mur@cea.fr 19 / 21 Saclay, March 6th, 2003

20 Selective Read-out Processor for the MS lectromagnetic alorimeter : Saclay MS Group Meeting PLIG Study, propose and validate communication channels - on going Unidirectional - and - links i-directional - links Study selective read-out algorithms - in collaboration with physicists lgorithms types, details Implementation in hardware Refine SRP system design lgorithm boards - on going -S interface and system integration - Prototype studies Use existing evaluation kits for FPGs and optical devices ventually one prototype stage before final design Rough calendar Validation of communication channels - budget of 10k requested Understanding of algorithms and their implementation in hardware Prototype studies and system integration tests Production and installation Irakli.Mandjavidze@cea.fr, Michel.Mur@cea.fr 20 / 21 Saclay, March 6th, 2003

21 Selective Read-out Processor for the MS lectromagnetic alorimeter : Saclay MS Group Meeting rigger oncentration ards LLR, cole Polytechnique Group leader - Ph. usson 8 persons ata oncentration ards LIP, Portugal Group leader - J. Varela 4 persons lock and ontrol System R R. enetta, K. Kloukinas Selective Read-out Processor Saclay M. Mur, I. Mandjavidze Project Manager - J.-L. Faure L OFF-OR OLLORIO eputies - R. enetta, Ph. usson, J. Varela Irakli.Mandjavidze@cea.fr, Michel.Mur@cea.fr 21 / 21 Saclay, March 6th, 2003