MICROPROCESSOR 8085 AND ITS INTERFACING SUNIL MATHUR. Second Edition A 1 ALE AD 0 - AD 7. Latch. Keyboard data V CC 8 P A D D 0 7 STB STB G G A

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1 Second Edition MICROPROCESSOR 8085 AND ITS INTERFACING ALE AD 0 - AD 7 LE Latch A 1 A 1 A 0 A 0 A 2 A7 D D 0 7 P A Keyboard data V CC WR RD IO/M 1 2 G2B G G A A 3:8 B Decoder 5 C 3 Gnd IOR IOW Control signal generator RD WR STB IBF STB IBF A 7 A 6 A G2B G G A Reset out A 4 A 3 A 2 A 3:8 Decoder B 5 C Chip select logic CS Reset SUNIL MATHUR

2 Microprocessor 8085 and Its Interfacing

4 Microprocessor 8085 and Its Interfacing Second Edition SUNIL MATHUR Assistant Professor Maharaja Agrasen Institute of Technology Delhi New Delhi

5 MICROPROCESSOR 8085 AND ITS INTERFACING, Second Edition Sunil Mathur 2011 by PHI Learning Private Limited, New Delhi. All rights reserved. No part of this book may be reproduced in any form, by mimeograph or any other means, without permission in writing from the publisher. ISBN The export rights of this book are vested solely with the publisher. Second Printing (Second Edition) L L L September, 2011 Published by Asoke K. Ghosh, PHI Learning Private Limited, M-97, Connaught Circus, New Delhi and Printed by Rajkamal Electric Press, Plot No. 2, Phase IV, HSIDC, Kundli , Sonepat, Haryana.

6 To the memory of my beloved father Late Sh. Raj Singh Mathur

8 Contents Preface Preface to the First Edition Acknowledgements xxi xxiii xxv Part I 1. Number System 3 18 Introduction Analog and Digital Signals Analog Signal Digital Signals The Difference between Analog and Digital System Number Systems Decimal Number System Binary Number System Hexadecimal System Two s Complement Representation of Binary Numbers Binary Codes Numeric Codes Alphanumeric Codes Type of Operations Logical Operations Arithmetic Operations 15 Exercises 15 Multiple Choice Questions 16 vii

9 viii Contents 2. Architecture and Organization of Microcomputer Introduction Computer Analog Computer Digital Computer Five Generations of Computers First Generation ( ): Vacuum Tubes Second Generation ( ): Transistors Third Generation ( ): Integrated Circuits Fourth Generation (1971 Present): Microprocessors Fifth Generation (Present and Beyond): Artificial Intelligence Computer Sizes and Power Supercomputer and Mainframe Minicomputer Workstation Personal Computer Computer Languages Low Level Language High Level Language Evolution of Microprocessor Functional Block Diagram of a Microcomputer Microprocessor I/O Interface RAM ROM Bus System 30 Exercises 31 Multiple Choice Questions 32 3 Architecture and Organization of Microprocessor Introduction Microcomputer System Arithmetic and Logic Unit Register Unit Control Unit Memory System Bus Microprocessor Operations Microprocessor Initiated Operations Internal Data Operations Peripheral or Externally Initiated Operations Functional Description Internal Architecture of Register Unit Control Unit Arithmetic and Logical Unit System Bus 46

10 Pin description Group 1: Power Supply and Frequency Signals Group 2: Higher Order Address Bus (Output) (A 8 A 15 ) Group 3: Multiplexed Address/Data Bus (AD 0 AD 7 ) Group 4: Control and Status Signal Group 5: Serial IO Signal Group 6: Externally or Peripheral Initiated Signals Demultiplexing of Ad 0 Ad Generation of Control Signals How a Program is Executed 54 Exercises 55 Multiple Choice Questions 56 Contents ix 4. Instruction Set of 8085 Microprocessor Introduction Instruction Format Instruction Word Size Opcode Format Addressing Modes of MP Immediate Addressing Register Addressing Direct Addressing Register Indirect Addressing Implicit Addressing Timing Effects of Addressing Modes Instruction Set Classification Data Transfer (Copy) Operations Arithmetic Operations Logical Operations Branching Operations Machine-control Operations Data Transfer Instructions Arithmetic Instructions Logical Instructions Branching Instructions Machine Control Instructions Complete Instruction Opcodes 104 Exercises 107 Multiple Choice Questions Instruction Timing and Operation of 8085 Microprocessor Introduction Instruction Cycle Basic State Transitions Introduction to Machine Cycles T-state Machine Cycle Instruction Cycle 115

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MICROPROCESSOR Architecture, Programming and Interfacing SUNIL MATHUR. Assistant Professor Maharaja Agrasen Institute of Technology Delhi

MICROPROCESSOR Architecture, Programming and Interfacing SUNIL MATHUR. Assistant Professor Maharaja Agrasen Institute of Technology Delhi MICROPROCESSOR 8086 Architecture, Programming and Interfacing SUNIL MATHUR Assistant Professor Maharaja Agrasen Institute of Technology Delhi New Delhi-110001 2011 MICROPROCESSOR 8086: Architecture, Programming