Leverage Vybrid's asymmetrical multicore architecture for real-time applications by Stefan Agner

Transcription

1 Leverage Vybrid's asymmetrical multicore architecture for real-time applications 2014 by Stefan Agner

2 Vybrid Family of ARM processors suitable for embedded devices VF3XX Single core no DDR VF5XX Single core DDR VF6XX Multi core DDR This presentation is focused on the VF6xx family

3 About me Software Engineer Linux and Open Source enthusiast Developer of Quadrocopter project based on ARM7-TDMI/Cortex M4 (NG UAVP) Embedded Developer at Leister Worked with HCS12, ColdFire and ARM9 (Linux)

4 More about me 2013-today Embedded Development Engineer at Toradex ARM computer on modules NVIDIA Tegra, Freescale Vybrid and i.mx6 Colibri VF61/VF50 use Freescale Vybrid SoC

5 Agenda The Vybrid approach Multi-Core Communication Future Video Demo

6 A typical challenge We need things done in real-time, but we also want a fancy user interface or web interface

7 The traditional approach (1) Two separate chips Application processor running full-featured OS Microcontroller running RTOS/Firmware Communication Channel Over serial link and some interrupt lines Communication overhead Dual-Port RAM Expensive, limited RAM available

8 The traditional approach (2) Use real-time capabilities of main OS Linux with Preempt RT Linux with RTAI WinCE Others Compromises when it comes to minimal latencies

9 Vybrid approach One chip two (asymetric) cores Both cores connected to main interconnect All memory shared All peripherals shared Additional communication infrastructure

10 Vybrid's asymetric cores Cortex-A5 Application processor ARMv7-A 500MHz NEON GIC interrupt controller Cortex-M4 32-Bit Microcontroller ARMv7-ME 166MHz SIMD extensions NVIC interrupt controller Modified Harvard architecture

11 Asymetric cores: Is this new? NVIDIA Tegra 2/3 Dual/Quad-core Cortex-A9 ARM7-TDMI Microcontroller at 275MHz Boot Processor Audio-/Video Processor (AVP) Texas Instruments AM335x (BeagleBone) Cortex-A8 at 1GHz 2x32-Bit RISC Architecture at 200 MHz Programmable Realtime Unit (SubSystem) Access to some peripherals (Ethernet/UART)

12 No New is that Vybrid's secondary core is designed to be programmed by the user

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14 Cortex-A5 Operating system Linux Huge driver base Kernel mode/user-mode separtion Huge application base Free & open Kernel by Timesys Some mainline support available Windows Embedded Compact

15 Cortex-M4 Firmware RTOS Minimal/deterministic latencies Strong integration between application and OS Application code has control over scheduler Hardare access can be performed from application code Bare-Metal Custom firmware from scratch

16 Communication Infrastructure Memory CPU to CPU interrupts 4 interrupts to the other CPU Hardware semaphores (SEMA4) 16 Gates Notification by interrupts

17 Advantages Shared memory, fast communciation Shared devices, can be used by both cores No additional microcontroller required Firmware update is easy to deploy from primary Core

18 Disadvantages Shared memory, almost no protection against corruption from the other core Shared devices, should only be used by one core at a time Limited power, one core at 500MHz Limited features, e.g. no 3D acceleration Probably hard to certify

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20 Endpoints Each endpoint is identified by a core, node and port triplet Cortex-A5 is Core 0, Cortex-M4 is Core 1 On Linux each user-mode process can be a node Each node can use different ports

21 Messages Applications can send a receive messages (blocking/non-blocking read) Stored in SRAM 1K in size Can contain pointers Maximum number of messages and endpoints can be configured at build time

22 API Initialization/Info mcc_initialize mcc_destroy mcc_get_info Endpoint management mcc_create_endpoint mcc_destroy_endpoint Communication mcc_send mcc_receive_copy/mcc_receive_nocopy mcc_msgs_available mcc_free_buffer

23 Implementation Linux: MCC is implemented using a kernel-mode driver a user-mode library (API, GPL!) MQX/eCos: MCC is a component in the OS WEC: planned (by Toradex) The M4 core can be booted from Linux or from U-Boot

24 The Good, the bad and the ugly The Good ARM and documented The Bad MCC API Licensing (GPL library) The Ugly Cores can not reset each other

25 Future

26 Freescale i.mx6 SoloX Announced April 2014, available Q Cortex-A9 and Cortex-M4 3D GPU Initial support will land in Linux 3.16 (already in RC)

27 Freescale i.mx7 i.mx7 will be Vybrids Source:

28 Video

29 XY Pen Plotter Demo Memory map ecos MCC Firmware Msgs (64KiB) (64KiB) Linux Linux (240MiB) (240MiB) graphics graphics (16MiB) (16MiB) SRAM DDR3 RAM

30 Demo

31 Questions