PDK (Platform Development Kit) Getting Started. Automotive Processors 4 th Dec 2017

Transcription

1 PDK (Platform Development Kit) Getting Started Automotive Processors 4 th Dec

2 Agenda PDK Overview PDK Software Architecture PDK Directory structure PDK Pre-requisite and Build instructions Running Examples Important Links 2

3 PDK Overview (1/2) Platform Development Kit (PDK) is a single scalable software driver package to offer streamlined development across different TDA processors Provides peripheral programming interface - Easy to use SW interface Provides software portability across devices for a given peripheral Provides stand-alone examples to demonstrate the capabilities of the peripherals Product is designed to scale for each SoC. Single package is used to support more than one SoC. The product packaging/folder takes care of scalability for new IPs of new SoCs. MISRA-C compliant 3

4 PDK Overview (2/2) All required libraries and drivers provided are OS agnostic with few additional TI-RTOS drivers. Can be used stand-alone Not a middleware complete solution Supports following devices TDA2xx TDA2Ex TDA3xx TDA2Px 4

5 PDK Software Architecture PDK Software Architecture CSL Libraries: UART, I2C GPIO, Mailbox, Spinlock, EDMA, GPMC, McASP, McSPI, OCMC, QSPI, SBL, MMU, Timer, MMCSD, WDTIMER, PCIe Driver libraries: I2C, QSPI, FAT, NOR, VPS (VIP/DSS/VPE) SD, NOR and QSPI bootmodes UART console utility 5

6 Software Modules Modules Chip Support Library (CSL) Description CSL constitutes a set of well-defined APIs that abstract low-level details of the underlying SoC device so that a user can configure, control (start/stop, etc.) and have read/write access to peripherals without having to worry about register bit-field details. Refer to CSL User guide for details Power Management (PM) Secondary Boot loader (SBL) Power Management (PM) in Advanced Driver Assist Systems (ADAS) requires setting the right power and clock configurations which allow any IP to consume optimal power. Refer to Introduction to ADAS Power Management software for detailed presentation Secondary Bootloader (SBL) initializes the execution environment for multi-core RTOS applications, sets-up the AD PLL clock to values, powers on the I/O Peripherals, initializes the DDR, loads the application image into DDR & brings the slave cores out of reset. Refer to SBL user guide provided with for details 6

7 Software Modules Modules Video Processing SubSystem Driver (VPS) BIOS Serial Drivers (BSP LLD) ADAS Specific Libraries Description VPS Drivers allow users to make use of all video hardware features. A user can use the drivers in many different ways like multi-channel capture, memory to memory processing, display and so on. VPS module contains drivers for VIP, DSS, VPE, CAL, ISS, SIMCOP IP. Refer to VPS user guide for details BSP LLD has the drivers for I2C, UART and McSPI modules based on the sysbios operating system. The drivers are implemented in the GIO models of the sysbios. Refer to BSPLLD user guide for details This is group of libraries helpful for development of the automotive use cases. This contains libraries for security, firewall, IPC and diagnostics of IP. Examples, Utility and tools 7

8 Software Modules CSL Module Chip Support Library contains APIs to configure and access peripherals Simple, consistent and intuitive to use APIs Logical group of register reads and writes to get a functional layer for a given IP Stateless functions; blocking and runs to completion System Configuration Code: Provides functions specific to SoC level System Configuration. Provides the following functionalities: Start-up Code Interrupt-vector initialization Low level CPU specific code May involve assembly code and hence can be tools specific Sub module to further abstract and group the functionality. 8

9 Software Modules CSL Module Chip Support Library can be further split into following sub modules Arch SoC Sub Modules Description This sub module contains the core specific functionality and initialization code for the system and cores. The interrupt controller API s to configure and enable/disable the interrupt is also part of this sub module. Source code is available under csl/arch folder. SoC specific defines are abstraction under this sub module. SoC specific base address, macros and cross bar configuration code is available under this sub module. Source code is available under csl/soc folder. IP Specific Code API to use the functionality of different IP s is available as part of this sub module. Source code is available under csl/src/ip folder. 9

10 Software Modules PM PM Module Provides API to configure Power domain and Clock domain Set power state for different modules Set clock rate for different module Supports Dynamic Power Management Supports Software Thermal Management 10

11 Software Modules PM PM Module types Master Standby Valid for Initiators to the Interconnect When Master does not want clocks configure IP level SYSCONFIG MIDLEMODE or STANDBYMODE Slave Idle Valid for modules which respond to requests. Configure PRCM register CLKCTRL. MODULEMODE. Configure IP level SYSCONFIG SIDLEMODE or IDLEMODE PM Module can be further split into PRCM Database: Abstracts the SOC specific PRCM details. PMLIB: Library which can be used by application to initialize the system PMHAL: Contains board specific PMIC functions 11

12 Software Modules SBL SBL Initializes the execution environment for multi-core application Configure the Voltage rails (AVS Class 0) Initialize the Interrupt Controller Setup the ADPLL values Power on I/O peripherals Power on slave cores Configure required PADs Initialize DDR Load the multicore application image into DDR Bring slave cores out of Reset Boot Modes: QSPI, QSPI_SD, NOR and MMCSD application images 12

13 Software Modules ADAS Libraries Diagnostic Library Contains set of software function to diagnosing the health of various modules and interfaces of the device. Supports ECC, CRC, ADC, CAN and SPI modules. Initializes the modules the verify the functionality in different configurations IPC Lite Library OS agnostic library to provide two way communication between hosts Built on top of mailbox Supports 32bit or 64bit value to be transferred Supports event multiplexing 13

14 Software Modules ADAS Libraries Firewall Provides set of function to configure the system to prevent unauthorized access to the modules Supports L3 and L4 interconnect Security Provides no-os platform support for security specific features Required to work with TDA3xx GP prime variant of devices Provide code for AES128-CBC and SHA256 encryptions 14

15 Software Modules VPS VPS Module Provides set of API s to allow users to make use of all video hardware features like multi-channel capture, memory to memory processing, display and so on. VPS drivers are based on FVID2 interface VPS consists of following modules Video Input Port (VIP) API s for video capture functions for the device Video Processing Engine (VPE) API s for video operations such as color space conversion, deinterlacing, scaling and chroma up-sampling features Display Sub System (DSS) API s for LCD outputs on three parallel interfaces (DPI1, DPI2, and DPI3) and HDMI FVID2 API s for the video capture, video display and video processing (M2M drivers)applications on top of BIOS operating system Imaging sub system (ISS) including CAL 15

16 Software Partition VPS Diver Stack Application (TI RTOS) FVID2 API Generic Video Driver (Capture, Display or Processing) Interface Layer VPS Drivers Resource Management Queue Management Core Interaction Application (Bare metal) VPS Lib Core1 Core2 HAL1 HAL2 HAL1 HAL2 Hardware Peripheral 1 Peripheral 2

17 Software Modules VPS Architecture The Video Driver stack on SysBIOS consists of: OS-independent layers OS-dependent layers OS-independent layers The goal of the OS-independent layers is to enable maximum reuse across multiple software and functions: As part of OS-specific driver software To create independent test cases for verification & validation of the IP (AVV & DV) To create simple tools/utilities for programming the IP OS-Independent layers consists of CSL (Chip Select Layer)» Abstracts individual IPs and provides interfaces to program the IPs: Core layer:» Shields the driver layer from specifics of CSLs and descriptor configuration 17

18 Software Modules VPS Architecture OS-Dependent Layers The OS-dependent layers shall provide drivers and interfaces to applications by making use of the OS-specific features such as synchronization, queuing interrupt handling etc.: Drivers: VIP, VPE, ISS and DSS drivers shall utilize OS features and provide a user-friendly interface to applications for usage of the hardware. The responsibilities include: Queuing of input requests De-queuing of completed requests Allocation and freeing of resources (if applicable) Interfaces FVID2 interface: Generic interface for using the drivers Platform interface: SoC specific functionality Board interface: Board-specific functionality Decoder/Encoder interfaces: Interfaces to use different decoders or encoders 18

19 Software Modules BSP LLD BSP LLD Drives based on the sysbios operating system Implemented in the GIO models of the sysbios Polled, Interrupt and DMA mode of transfers are supported Supports I2C: UART: McSPI: 19

20 Software Modules BSP LLD (I2C) BSP LLD I2C supports following features Compliant with Philips I2C specification version 2.1 Supports a standard mode (up to 100 kbps) and fast mode (up to 400 kbps) 7-bit and 10-bit device addressing modes User configurable FIFOs (8, 16, 32, 64 bytes) for buffered read or write User programmable multislave channel User programmable clock generation Multimaster transmitter/slave receiver/transmitter mode 20

21 Software Modules BSP LLD (UART) BSP LLD UART supports data transfer using polled, Interrupt and EDMA. Each UART can be used for configuration and data exchange with a number of external peripheral devices or interprocessor communication between devices Features 16C750 compatibility 64-byte FIFO buffer for receiver and 64-byte FIFO for transmitter Programmable interrupt trigger levels for FIFOs Supports configurable Buad rate from 2400 to bits/sec Supports Configurable data length, parity, stop bits. 21

22 Software Modules BSP LLD (McSPI) BSP LLD McSPI supports both master and slave mode. BSP LLD McSPI supports data transfer using polled, Interrupt and EDMA. McSPI Features Wide selection of SPI word lengths, ranging from 4 to 32 bits Up to four master channels, or single channel in slave mode Programmable timing control between chip select and external clock generation Programmable FIFO trigger levels for both Tx and Rx. Supports all 4 modes of SPI operation. Master multichannel mode: Full duplex/half duplex Transmit-only/receive-only/transmit-and-receive modes Flexible input/output (I/O) port controls per channel Programmable clock granularity SPI configuration per channel. This means, clock definition, polarity enabling and word width 22

23 Software Modules Examples, Utility and tools Examples Examples are available as part of package under the corresponding modules to showcase the flow and usage of various IP s, modules and libraries Utility and tools Software modules contains the utility wrapper functions to help user configure and user basic common functionality where ever required. E.g. UartConsole contains wrapper functions which use UART APIs to interface with the user through the serial console. Tools contains the scripts and executable abstracting few steps that can be used by user. E.g. Nor flash Writer is used to write data or erase the NOR flash Few commonly used utilities/tools are listed here 23

24 Software Modules Examples, Utility and tools Tools/Utilities mflash Multicore Image generator QSPI/Nor flash writer UART console Description mflash tool is used provide a way to flash the binary images to QSPI Flash memory using the UART interface. Tool is packages/ti/boot/sbl_auto/tools/mflash These are the scripts provided by the TI to generate the multicore app images using individual core binaries. Tool is packages/ti/boot/sbl_auto\tools/multicoreimagegen_xxxx.bat QSPI or NOR flash writer are required to flash the SBL AppImage in QSPI/NOR flash. Tool is Packages/ti/boot/sbl_auto/qspiflash/examples Packages/ti/boot/sbl_auto/norflash/examples This utility provide standard easy to use API to configure, read and write data on the UART interface. Packages/ti/csl/example/utils/uart_console 24

25 Directory Structure Uses simple and intuitive directory structure Provides scope to accommodate new SoCs in the same directory structure Build folder contains all the make rules for building PDK Each module/library has Include folder containing the corresponding header files Drivers and libraries are separated from low level driver, categorized and under single directory. Examples and sample applications are part of corresponding module 25

26 Directory Structure brief description (1/2) docs - Contains various collateral like test reports, MISRAC and static analysis reports binary - Generated executable and object files are placed in this directory build - Contains the Makefile required to build libraries and examples boot/sbl_auto - This contains the TDA secondary bootloader csl - Contains the Chip Support Library register (CSL-RL) and functional (CSL- FL) API source files for supported peripherals. diag - This folder contains APIs for diagnostics of Safety IPs ( ADC, CRC, McSPI, DCAN & ECC (EMIF, OCMC & IPU)). 26

27 Directory Structure brief description (2/2) drv - Contains the TI RTOS driver and libraries for various modules bsp_lld: Contains the driver and libraries for I2C, McSPI and UART. driver. fw_l3l4: This folder contains the driver to configure L3 and L4 firewall. ipc_lite: This module is built on top for mailbox CSL-FL to abstract functionality of mailboxes and makes it usable in software stack with or without operating system. pm: The power management (PM) software enables optimal power consumption and thermal management scalable across TDA2xx, TDA2Px, TDA2Ex, TDA2Ex_17x17 and TDA3xx. stw_lld: Contains the drivers/libraries for fatlib, i2clld, uart console modules. vps: Contains all the driver implementations for video peripherals - VIP, VPE, ISS, CAL and DSS. 27

28 PDK Pre-requisite Code Composer Studio (v or above) Chip Support Package (CSP) PDK package PDK package is available as part of Processor SDK. PDK package will be available at vision_sdk_xx_yy_zz/ti_components/d rivers/pdk Flash tools: NOR Flash Writer Development Board TDA2xx CPU Board TDA2Px CPU Board TDA2Ex CPU Board TDA3xx CPU Board Emulator XDS560v2 XDS200 SD Card QSPI Flash Writer 28

29 PDK Build Dependencies: TI Compiler TMS470 TI Compiler C6000 TI Compiler ARP32 Linaro GCC tool chain for A15 BIOS/XDC EDMA LLD Build: Supports Makefile based build PDK will be automatically build while building Vision SDK. PDK can be build independently also and command s the should be issued from <pdk>/packages/ti/build folder Following steps application for building PDK independently Makerules for different cores are specified in packages/ti/build/makerules Environment variables are specified in packages/ti/build/makerules/env.mk gmake allcore BOARD=<BOARD> builds all the components gmake <example/module> BOARD=<BOARD> builds specific module or example <BOARD> can be tda3xx-evm, tda2xx-evm, tda2ex-evm or tda2px-evm Refer to 29

30 Running Examples (1/2) Examples can be run either in Debug mode using CCS or SD boot mode using SD card or QSPI/NOR boot mode using on-board flash. Refer to SBL user-guide for more details about flashing SBL, appimage, preparing SD etc. Application Logs For application logs user will need the terminal emulator like Tera Term. Open Tera Term and connect to the COM port. Set the Baud rate to Some applications will print the logs on the CCS console. Depending on the boot mode, set the SYSBOOT switch as per the SBL user guide. SD boot mode Copy the MLO file from <pdk>\packages\ti\binary\sbl\sd\<opp>\<tdaxxx-evm> to sd card. Copy the Application Image to SD card. Insert the card and Reset the board. 30

31 Running Examples (2/2) Debug boot mode Set the boot mode to Debug. Launch the CCS and target configuration for the device. Connect to the core Load and run the binaries. QSPI/NOR boot mode Launch CCS and connect to EVM. Use the QSPI/NOR Flash writer to write the SBL image <pdk>\packages\ti\binary\sbl\<qspi/nor>\<opp>\<tdaxxx-evm> into flash. Use the QSPI/NOR Flash writer to write the Application Image into flash. Steps to use the QSPI/NOR flash writer are available at SBL user guide. Set the boot mode to QSPI/NOR and reset the board the run the application 31

32 Important links PDK Software Developer Guide: STW/BSP to PDK Migration Guide: VPS User Guide: VPS training: Available at <PDK>/packages/ti/drv/vps/docs/training/ PM User Guide: SBL User Guide: Available at <PDK>/packages/ti/boot/sbl_auto/docs/SBL_UserGuide.pdf Application Notes: 32

33 Thank you 33