Inspection of imprint templates Sematech Lithography Workshop May, 2008

Transcription

1 Inspection of imprint templates Sematech Lithography Workshop May, 2008 Mark McCord, Tony DiBiase, Bo Magyulan Ian McMackin*, Joe Perez*, Doug Resnick* *

2 Outline Electron beam inspection of templates Optical inspection of templates Electron beam inspection of imprinted wafers EBI die-database inspection Challenges and summary 2

3 Direct e-beam inspection of templates Currently, templates used for imprinting silicon wafers are bare quartz Difficult charging issues Low-current CD-SEM can get limited imaging High-current e-beam inspection gets severe charging, loss of contrast Potential solutions Temporary charge dissipative overlayer: metal, carbon, conductive polymer How to guarantee that no additional defects are added by strip process? Permanent charge dissipative underlayer: Indium tin oxide Release issue (does release layer bond to charge dissipative layer?) Cleaning issue (no aggressive clean steps allowed) In-situ discharge techniques UV light, gas (environmental-sem) 3

4 Template to Carrier Adapter for es3x Template adapter for es32 es32 Based on modified version of 300mm wafer chuck Enables manual loading of 65mm templates into e-beam inspection tool 4

5 Material requirements for e-beam inspection Bare quartz template Poor contrast Severe charging effects ITO (Indium Tin Oxide) underlayer Contrast OK No charging effects Grain issue Requires ground contact 5

6 Gas Jet Charge control on quartz-only template Without gas jet charge control With gas jet charge control Areas of uncontrolled charging Carbon deposition from previous scans grating 6

7 Limitations of charge control technology for direct template inspection Conductive under-layer (ITO) Non-standard process Cleaning issue (can t use aggressive chemistry) Electrical contact Gas jet: Electron detection efficiency Electron detection speed UV light Poor adsorption by quartz Intensity limitation Photo-emission causes contrast degradation Conductive over-coating Removal step could cause added defectivity Poor contrast Quartz-only template has no material contrast, poor edge contrast due to relatively low resolution beam 7

8 Optical inspection of templates Use KLA-Tencor 576 reticle inspection tool Special manual adapter is used to hold 65mm template Inspect bare quartz using either reflected or transmitted light 8

9 Quartz Detection Limits Relative to Actual Size Images taken of imprinted features Shrinking Contact 0.018um Pobability of Detection (24 samples/point) Quartz Inspection Reflected Mode (Plates 1 & 2) 100% 80% 60% 40% 20% 2D Mouse Bite 0.059um Line shortening =0.028um 0% Measured Defect Size (nm) Shrinking Contact 1D Extension 2D Extension Line End Shortening 1D MouseBite 2D MouseBite 1D Ext = 0.028um 2D Ext = 0.036um 1D Mouse Bite 0.043um 9

10 Program Defect Inspection Results Minimum defect size at 90% capture rate Defect Type Reflected mode Cr (data size nm) Reflected mode quartz (data size nm) Reflected mode quartz (actual defect size nm) Shrinking contact D mouse bite D mouse bite D Extension Line End Shortening D extension Quartz inspection results are similar to chrome binary inspection Detection capability well below 90nm pixel size 10

11 Projected sensitivity of potential future technology Minimum defect size at 90% capture rate based on simple scaling theory of λ/na Defect Type Reflected mode quartz (actual defect size nm) Projected sensitivity based on 193 immersion technology Shrinking contact D mouse bite D mouse bite D Extension Line End Shortening D extension While significant improvements are possible, results fall far short of roadmap requirements! (wafer requirements are ~1/3 min half pitch) 11

12 E-beam inspection of imprinted wafers Al-coated resist Uncoated resist 12

13 Off-line inspection of Al-coated imprinted wafer: 280nm contact array E-beam swath image Defect inspection map Base threshold=25 gray levels; defect threshold=39 G.L. 13

14 High-res review images of defects on Alcoated wafer 20nm 20nm 14

15 Static (frame) images on resist Why do CD-SEMs get good contrast on resist, while EBI is struggling? High current density combined with lower resolution destroys edge contrast! 125 na 75 na 25 na 10 na 0.3 na 15

16 Improved inspection contrast on as-imprinted wafers By optimizing landing energy, contrast was much improved on as-imprinted wafer However, higher landing energy will cause more resist damage and shrinkage New condition: 1750eV 25nA 1x average 16 Previous condition: 300eV 25nA 4x average

17 Resist defects: high-res review 17

18 First inspection results on Tomcat test wafer DOIs Captured: Small physicals Care areas Summary: Many small physicals caught on M1 structures Few defects caught on CT structures Noticed glitches on CT structures which resulted in high false M1 CT Defects 18 Smallest defects were ~40nm

19 2 nd round inspection results on Tomcat test wafer As-imprinted wafer Cleaner starting template Inspected first and last dies on wafer edge roughness defects dominated inspection results nm ES32 Total Defect Density Count Density cm - 2 Wafer Defect Map Total M CT w/clustering 19

20 Comparison of KT-eS32 and KT-2132 inspections Edge-roughness defects: Predominately random and occurring in sizes of 10 to 175 nm. Found only on the bottom edge of horizontal lines False defects Particles defects found by e-beam did not contribute to repeating defectivity Three template pattern defects were found repeating imprint defects One contaminated contact was detected repeating plug KT-eS32 KT-2132 Type Density cm -2 Density cm -2 Edge roughness 30 0 Particle Template Plug 1 1 Repeating Template Defects Found only by es32 20

21 Comparison of e-beam vs optical sensitivity Rough comparison shows e-beam is ~2X finer Not strict apples-apples comparison Different wafers, different pixel sizes, different throughput tools are not exact same generation EBI Optical Quartz Inspection Reflected Mode (Plates 1 & 2) 100% Pobability of Detection (24 samples/point) 80% 60% 40% 20% 0% Measured Defect Size (nm) Shrinking Contact 1D Extension 2D Extension Line End Shortening 1D MouseBite 2D MouseBite 21

22 Die:database inspection Ultimately would be a requirement for any single-die template NGR sells tool today Throughput and charge control enhancements needed for template (or wafer) inspection Preliminary study shows encouraging results for eventual bare template inspection 22

23 Imprint template die:database inspection: study using es3x Convolve with PSF Convolve with PSF; enhance edges dswgdssub GDS data dswrend1 Render imprint template Align, set contrast, gray level A Render ebeam inspection image gla gl gl dswpatch Patch from EB template inspection 200nm features 23 Bf Rendered GDS Programmed defect cl Difference image Difference image histogram

24 E-beam Technology roadmap Technology challenge Tool development Limitations Wafer inspection Need < ½ design rule sensitivity; Use standard tool, improve existing performance; piggyback on existing roadmap Multi-chip die required for reticle defect detection May miss certain systematic defects Mask inspection (with discharge layer) Sensitivity plus Automated substrate handling Unique tool but share major subsystems with wafer inspector Removing discharge layer from reticle could add defects Non-removable layer may be incompatible with cleaning process or release layer Mask inspection (without discharge layer) Sensitivity, substrate handling, charge control R&D program to retire charge control risk Charge control process may limit inspection throughput Wafer die:database inspection Database rendering and alignment Modify standard tool with more powerful image processing and S/W Full-loop layers may have pattern noise from previous layers 24

25 Conclusions Direct template inspection by EBI does not look feasible without a significant materials/tool development effort Template inspection can be performed by optical techniques but may not be extendible to future design rules Wafers can be inspected by EBI with ~20nm resolution as a proxy for direct template inspection D:DB inspection by EBI has been shown to be feasible but will require further development Thanks to NIST ATP #70NANB4H3012 for financial support of this program 25