OPTIONS. Low Power Data Retention Mode. PIN ASSIGNMENT (Top View) I/O 16 I/O 17 I/O 18 I/O 19 I/O17 I/O18 I/O19. Vss I/O20 I/O21 I/O22 I/O23
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1 512K x 32 SRAM SRAM MEMORY ARRAY AVAILABLE AS MILITARY SPECIFICATIONS SMD & (Military Pinout) MIL-STD-883 FEATURES Operation with single 5V supply Vastly improved Icc Specs High speed: 12, 15, 17, 20, 25, 35, 45 & 55ns Low power CMOS GENERAL DESCRIPTION Built in decoupling caps for low noise Organized as 512Kx32, byte selectable TTL Compatible Inputs and Outputs The and A are 16 Megabit CMOS SRAM Modules organized as 512Kx32 bits. These devices achieve high speed access, low power consumption and high reliability by employing advanced CMOS memory technology. This military temperature grade product is ideally suited for military applications. A0 A1 A2 A3 A4 A5 CS3\ GND CS4\ WE1\ A6 A7 A8 A9 A10 Vcc OPTIONS PIN ASSIGNMENT (Top View) Operating Temp. Ranges Markings Full Military (-55 o C to +125 o C) Q & 883 Military (-55 o C to +125 o C) XT Industrial (-40 o C to +85 o C) IT SRAM & A Timing Markings Timing Markings 12ns ns ns ns ns ns ns ns -55 Package Ceramic Quad Flatpack Pin Grid Array Low Power Data Retention Mode I/O 16 A18 A17 CS4\ CS3\ CS2\ CS1\ Vcc OE\ WE\ A16 A15 A14 I/O 15 Markings Q, Q1, Q2, BQFP P Pinout Markings Military (no indicator) Commercial A* L I/O17 I/O18 I/O19 Vss I/O20 I/O21 I/O22 I/O23 Vcc I/O24 I/O25 I/O26 I/O27 Vss I/O28 I/O29 I/O I/O 14 I/O 13 I/O 12 Vss I/O 11 I/O 10 I/O 9 I/O 8 Vcc I/O 7 I/O 6 I/O 5 I/O 4 Vss I/O 3 I/O 2 I/O 1 68 Lead CQFP Commercial Pinout Option (Q with Pinout A) I/O 31 A6 A5 A4 A3 A2 A1 A0 Vcc A13 A12 A11 A10 A9 A8 A7 I/O 0 *(available with Q package only) 68 Lead CQFP (Q, Q1, Q2) Military SMD Pinout Option I/O 0 I/O 1 I/O 2 I/O 3 I/O 4 I/O 5 I/O 6 I/O 7 GND I/O 8 I/O 9 I/O 10 I/O 11 I/O 12 I/O 13 I/O 14 I/O I/O 16 I/O 17 I/O 18 I/O 19 I/O 20 I/O 21 I/O 22 I/O 23 GND I/O 24 I/O 25 I/O 26 I/O 27 I/O 28 I/O 29 I/O 30 I/O Vcc A11 A12 A13 A14 A15 A16 CS1\ OE\ CS2\ A17 WE2\ WE3\ WE4\ A Lead CQFP (BQFP) Military SMD Pinout Option I/O 0 I/O 1 I/O 2 I/O 3 I/O 4 I/O 5 I/O 6 I/O 7 GND I/O 8 I/O 9 I/O 10 I/O 11 I/O 12 I/O 13 I/O 14 I/O I/O 16 I/O 17 I/O 18 I/O 19 I/O 20 I/O 21 I/O 22 I/O 23 GND I/O 24 I/O 25 I/O 26 I/O 27 I/O 28 I/O 29 I/O 30 I/O 31 Vcc A11 A12 A13 A14 A15 A16 CS2\ OE\ CS4\ A17 A A0 A1 A2 A3 A4 A5 CS1\ GND CS3\ WE\ A6 A7 A8 A9 A10 Vcc 66 Lead PGA (P) Military SMD Pinout & A 1
2 & A CS CS CS CS CS4\ CS\4 CS3\ CS\3 CS2\ CS\2 CS1\ CS\1 WE\ OE\ A0 - A18 M0 M1 512K x 8 M2 512K x 8 M3 512K x 8 512K x 8 I/O 24 - I/O 31 I/O 16 - I/O 23 I/O 8 - I/O 15 I/O 0 - I/O 7 MILITARY PINOUT/BLOCK DIAGRAM COMMERCIAL PINOUT/BLOCK DIAGRAM CS & A 2
3 & A ABSOLUTE MAXIMUM RATINGS* Voltage of Vcc Supply Relative to Vss...-.5V to +7V Storage Temperature C to +150 C Short Circuit Output Current(per I/O)...20mA Voltage on Any Pin Relative to Vss...-.5V to Vcc+1V Maximum Junction Temperature** C *Stresses greater than those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only and functional operation on the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. **Junction temperature depends upon package type, cycle time, loading, ambient temperature and airflow. See the Application Information section at the end of this datasheet for more information. ELECTRICAL CHARACTERISTICS AND RECOMMENDED DC OPERATING CONDITIONS (-55 o C < T A < 125 o C and -40 o C to +85 o C; Vcc = 5V +10%) (-55 C < T A < 125 C and -40 C to +85 C; Vcc = 5V +10%) DESCRIPTION CONDITIONS SYMBOL MIN MAX UNITS NOTES Input High (logic 1) Voltage V IH 2.2 V CC +.5 V 1 Input Low (logic 1) Voltage V IL V 1,2 Input Leakage Current ADD,OE I LI µa 0V<V IN <V CC Input Leakage Current WE, CE I LI µa Output(s) Disabled Output Leakage Current I/O ILO µa 0V<V OUT <V CC Output High Voltage I OH = 4.0mA V OH 2.4 V 1 Output Low Voltage I OL = 8.0mA V OL 0.4 V 1 Supply Voltage V CC V 1 MAX DESCRIPTION CONDITIONS SYMBOL UNITS NOTES Power Supply Current: Operating CS\<VIL; VCC = MAX f = MAX = 1/ trc (MIN) Outputs Open Icc ma 3,13 Power Supply Current: Standby CS\>VIH; VCC = MAX f = MAX = 1/ trc (MIN) Outputs Open I SBT ma 3, 13 VIN = VCC - 0.2V, or CMOS Standby VSS +0.2V I SBT ma VCC=Max; f = 0Hz & A 3
4 & A CAPACITAE (V IN = 0V, f = 1MHz, T A = 25 o C )1 SYMBOL PARAMETER MAX UNITS C ADD A0 - A18 Capacitance 50 pf C OE OE\ Capacitance 50 pf C WE, C CS WE\ and CS\ Capacitance 20 pf C IO I/O 0- I/O 31 Capacitance 20 pf C WE ("A" version) WE\ Capacitance 50 pf NOTE: 1. This parameter is sampled. AC TEST CONDITIONS Test Specifications Input pulse levels...vss to 3V Input rise and fall times...5ns Input timing reference levels...1.5v Output reference levels...1.5v Output load...see Figure 1 Device Under Test Ceff = 50pf Current Source I OL Vz = 1.5V (Bipolar Supply) Current Source I OH Figure 1 NOTES: Vz is programmable from -2V to + 7V. I OL and I OH programmable from 0 to 16 ma. Vz is typically the midpoint of V OH and V OL. I OL and I OH are adjusted to simulate a typical resistive load circuit. Figure 1 & A 4
5 & A ELECTRICAL CHARACTERISTICS AND RECOMMENDED AC OPERATING CONDITIONS (NOTE 5) (-55 o C<T A < 125 o C and -40 o C to +85 o C; V CC = 5V +10%) DESCRIPTION READ CYCLE READ cycle time Address access time Chip select access time Output hold from address change Chip select to output in Low-Z Chip select to output in High-Z Output enable access time Output enable to output in Low-Z Output disable to output in High-Z WRITE CYCLE WRITE cycle time Chip select to end of write Address valid to end of write Address setup time Address hold from end of write WRITE pulse width WRITE pulse width Data setup time Data hold time Write disable to output in Low-z Write enable to output in High-Z SYMBOL UNITS MIN MAX MIN MAX MIN MAX MIN MAX MIN MAX MIN MAX MIN MAX MIN MAX NOTES t RC ns t AA ns t ACS ns t OH ns t LZCS ns 4,6,7 t HZCS ns 4,6,7 t AOE ns t LZOE ns 4,6 t HZOE ns 4,6 t WC ns t CW ns t AW ns t AS ns t AH ns t WP ns t WP ns t DS ns t DH ns t LZWE ns 4,6,7 t HZWE ns 4,6,7 & A 5
6 & A READ CYCLE NO. 1 t RC ADDRESS t OH t AA DATA I/O PREVIOUS DATA VALID DATA VALID READ CYCLE NO. 2 ADDRESS t RC CS\ OE\ DATA I/O t AA t ACS tlzcs t t AOE LZOE HIGH IMPEDAE t HZCS t HZOE DATA VALID & A 6
7 & A WRITE CYCLE NO. 1 (Chip Select Controlled) t WC ADDRESS CS\ t AW tcw t AH t AS t WP1 1 WE\ DATA I/O t HZWE t LZWE t DS t DH DATA VALID WRITE CYCLE NO. 2 (Write Enable Controlled) t WC ADDRESS t AW CS\ t AS t CW t AH WE\ t WP2 1 DATA I/O t DS t DH DATA VALID & A 7
8 NOTES 1. All voltages referenced to V SS (GND) V for pulse width <20ns. 3. ICC is dependent on output loading and cycle rates. The specified value applies with the outputs 1 unloaded, and f= HZ. t RC(MIN) 4. This parameter guaranteed but not tested. 5. Test conditions as specified with output loading as shown in Fig. 1 unless otherwise noted. 6. t HZCS, t HZOE and t HZWE are specified with C L = 5pF as in Fig. 2. Transition is measured +/- 200 mv typical from steady state voltage, allowing for actual tester RC time constant. 7. At any given temperature and voltage condition, SRAM & A t HZCS, is less than t LZCS, and t HZWE is less than t LZWE. 8. WE\ is HIGH for READ cycle. 9. Device is continuously selected. Chip selects and output enable are held in their active state. 10. Address valid prior to or coincident with latest occurring chip enable. 11. t RC = READ cycle time. 12. Chip enable (CS\) and write enable (WE\) can initiate and terminate a WRITE cycle. 13. I CC is for 32 bit mode. LOW POWER CHARACTERISTICS (L Version Only) DESCRIPTION CONDITIONS SYMBOL MIN MAX UNITS NOTES V CC for Retention Data V DR 2 V Data Retention Current All Vcc + 0.2V V CC = 2V I CCDR 10 ma or Vss + 0.2V, CS\ = Vcc + 0.2V V CC = 3V I CCDR 12 ma Chip Deselect to Data Retention Time t CDR 0 ns 4 Operation Recovery Time t R t RC ns 4, 11 LOW V CC DATA RETENTION WAVEFORM DATA RETENTION MODE V CC 4.5V 4.5V V DR >2V t CDR t R CS\ 1-4 V DR & A 8
9 & A MECHANICAL DEFINITIONS* Micross Case #702 (Package Designator Q) SMD , Case Outline M 4 x D2 4 x D1 D DETAIL A R b 1 o - 7 o L1 B e SEE DETAIL A A1 A A2 E SMD SPECIFICATIONS SYMBOL MIN MAX A A A B REF b D BSC D D E e BSC R L *All measurements are in inches. & A 9
10 & A MECHANICAL DEFINITIONS* Micross Package Designator Q2 D2 D1 D 1 b e D3 PACKAGE SPECIFICATION Symbol PACKAGE MinSPECIFICATION Max Symbol A Min.200 Max A1 A B A b b REF.017 D B.800 BSC.010 REF D1 D BSC D2 D e D2 R D BSC TYP L1 e bsc Dimensions R are in inches..010 TYP L Dimensions in inches R L1 B A1 A *All measurements are in inches. & A 10
11 & A MECHANICAL DEFINITIONS* Micross Case #904 (Package Designator P ) SMD , Case Outline T Pin 56 4 x D D1 D2 A A1 Pin 1 (identified by square pad) φb1 E1 e φb Pin 66 e Pin 11 L SMD SPECIFICATIONS SYMBOL MIN MAX A A φb φb D D1/E1 D2 e TYP TYP TYP L *All measurements are in inches. & A 11
12 MECHANICAL DEFINITIONS* Micross Case (Package Designator Q1) SMD , Case Outline A SRAM & A SMD SPECIFICATIONS SYMBOL MIN MAX A A b B TYP c D/E D1/E D2/E2 e BSC BSC L R TYP *All measurements are in inches. & A 12
13 & A MECHANICAL DEFINITIONS* Micross Case (Package Designator BQFP) SMD , Case Outline N Symbol Millimeters Inches Min Max Min Max A A A b C D/E D1/E D2/E e e j k L S & A 13
14 ORDERING INFORMATION SRAM & A Device Number Package Type Speed (ns) Power Option Process Q, Q1, Q2, P or BQFP 12, 15, 17, 20, 25, 35, 45 or 55 L (Low Power) Blank (Std power) /* Examples: Q 15/Q P 17L/Q P 25/XT Q1 55/IT BQFP 55/883C *Available Processes IT = Industrial Temperature Range XT = Military Temperature Range Q & 883C = Full Military Processing 40 0 C to C 55 0 C to C 55 0 C to C & A 14
15 & A MICROSS TO DSCC PART NUMBER CROSS REFEREE Package Designator Q Package Designator Q1 Package Designator P Micross Part# SMD Part# Micross Part# SMD Part# Micross Part# SMD Part# Q 12/Q HMA Q1 12/883C HAA P 12/Q HTA Q 12/Q HMC Q1 12/883C HAC P 12/Q HTC Q 12L/Q HMA Q1 12L/ HAA P 12L/Q HTA Q 12L/Q HMC Q1 12L/ HAC P 12L/Q HTC Q 15/Q HMA Q1 15/883C HAA P 15/Q HTA Q 15/Q HMC Q1 15/883C HAC P 15/Q HTC Q 15L/Q HMA Q1 15L/ HAA P 15L/Q HTA Q 15L/Q HMC Q1 15L/ HAC P 15L/Q HTC Q 17/Q HMA Q1 17/883C HAA P 17/Q HTA Q 17/Q HMC Q1 17/883C HAC P 17/Q HTC Q 17L/Q HMA Q1 17L/ HAA P 17L/Q HTA Q 17L/Q HMC Q1 17L/ HAC P 17L/Q HTC Q 20/Q HMA Q1 20/883C HAA P 20/Q HTA Q 20/Q HMC Q1 20/883C HAC P 20/Q HTC Q 20L/Q HMA Q1 20L/ HAA P 20L/Q HTA Q 20L/Q HMC Q1 20L/ HAC P 20L/Q HTC Q 25/Q HMA Q1 25/883C HAA P 25/Q HTA Q 25/Q HMC Q1 25/883C HAC P 25/Q HTC Q 25L/Q HMA Q1 25L/ HAA P 25L/Q HTA Q 25L/Q HMC Q1 25L/ HAC P 25L/Q HTC Q 35/Q HMA Q1 35/883C HAA P 35/Q HTA Q 35/Q HMC Q1 35/883C HAC P 35/Q HTC Q 35L/Q HMA Q1 35L/ HAA P 35L/Q HTA Q 35L/Q HMC Q1 35L/ HAC P 35L/Q HTC Q 45/Q HMA HMA Q1 45/883C HAA HAA P 45/Q HTA HTA Q 45/Q HMC Q1 45/883C HAC P 45/Q HTC Q 45L/Q HMA Q1 45L/ HAA P 45L/Q HTA Q 45L/Q HMC Q1 45L/ HAC P 45L/Q HTC Q 55/Q HMA Q1 55/883C HAA P 55/Q HTA Q 55/Q HMC Q1 55/883C HAC P 55/Q HTC Q 55L/Q HMA Q1 55L/ HAA P 55L/Q HTA Q 55L/Q HMC Q1 55L/ HAC P 55L/Q HTC Package Designator BQFP Micross Part# BQFP 20/883C BQFP 25/883C BQFP 25/883C BQFP 35/883C BQFP 35/883C BQFP 45/883C BQFP 45/883C BQFP 55/883C SMD Part# H H H H H H H H & A 15
16 DOCUMENT TITLE 512K x 32 SRAM MEMORY ARRAY SRAM & A Rev # History Release Date Status 6.5 Updated Features, Temp Range & April 2010 Release General Description - Page 1, Updated Order Chart - Page 13, Removed Space Processing - Page Updated Ordering Table, Page 14 June 2010 Release Updated DSCC Cross Reference, Page 15 Added SMD , Page 1 Added BQFP Package, Page 1 and added BQFP drawing on page 13 (BQFP package is listed on SMD ) 6.7 Updated Q2 Spec, Page 10 July 2010 Release 6.8 Page 3 Changes: June 2011 Release From To I CC (ma) I SBT1 (ma) I SBT2 (ma) V I CCDR (ma) V I CCDR (ma) Removed note from page 8 "-12 &-15 have a 32mA limit". & A 16
17 & A Rev # History Release Date Status 6.9 Added 68 Lead CQFP (BQFP) August 2013 Release Military SMD Pinout Option & A 17
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32-megabit DataFlash + 4-megabit SRAM Stack Memory AT45BR3214B
Features 32-Mbit DataFlash and 4-Mbit SRAM Single 62-ball (8 mm x 12 mm x 1.2 mm) CBGA Package 2.7V to 3.3V Operating Voltage DataFlash Single 2.7V to 3.3V Supply Serial Peripheral Interface (SPI) Compatible
64K (8K x 8) Battery-Voltage Parallel EEPROM with Page Write and Software Data Protection AT28BV64B
Features Single 2.7V to 3.6V Supply Hardware and Software Data Protection Low Power Dissipation 15mA Active Current 20µA CMOS Standby Current Fast Read Access Time 200ns Automatic Page Write Operation
S-2900A. Rev.1.1. CMOS 512-bit SERIAL E 2 PROM
Rev.1.1 CMOS 512-bit SERIAL E 2 PROM S-29A The S-29A is a wide operating voltage range, low power consumption 512-bit E 2 PROM. The organization is 64-word 8-bit, and can be read or written serially. It
Battery-Voltage. 16K (2K x 8) Parallel EEPROMs AT28BV16. Features. Description. Pin Configurations
Features 2.7 to 3.6V Supply Full Read and Write Operation Low Power Dissipation 8 ma Active Current 50 µa CMOS Standby Current Read Access Time - 250 ns Byte Write - 3 ms Direct Microprocessor Control
1-Megabit (128K x 8) Low Voltage Paged Parallel EEPROMs
Features Single 3.3V ± 10% Supply Fast Read Access Time - 200 ns Automatic Page Write Operation Internal Address and Data Latches for 128 Bytes Internal Control Timer Fast Write Cycle Time Page Write Cycle
FEATURES. Single Power Supply Operation - Low voltage range: 2.70 V V
FEATURES Single Power Supply Operation - Low voltage range: 2.70 V - 3.60 V - IS39LV040: 512K x 8 (4 Mbit) - IS39LV010: 128K x 8 (1 Mbit) - IS39LV512: 64K x 8 (512 Kbit) - 70 ns access time - Uniform 4
256K (32K x 8) Paged Parallel EEPROMs AT28C256. Features. Description
Features Fast Read Access Time - 150 ns Automatic Page Write Operation Internal Address and Data Latches for 64 Bytes Internal Control Timer Fast Write Cycle Times Page Write Cycle Time: 3 ms or 10 ms
FM16W08 64Kb Wide Voltage Bytewide F-RAM
Pre-Production FM16W08 64Kb Wide Voltage Bytewide F-RAM Features 64Kbit Ferroelectric Nonvolatile RAM Organized as 8,192 x 8 bits High Endurance 100 Trillion (10 14 ) Read/Writes 38 year Data Retention
PYA28C K x 8 EEPROM FEATURES DESCRIPTION. Access Times of 120, 150, 200, and 250ns. Software Data Protection. Single 5V±10% Power Supply
PYA28C010 128K x 8 EEPROM FEATURES Access Times of 120, 150, 200, and 250ns Single 5V±10% Power Supply Simple Byte and Page Write Low Power CMOS: - 60 ma Active Current - 500 µa Standby Current Fast Write
Rev. No. History Issue Date Remark
Preliminary 512K X 8 OTP CMOS EPROM Document Title 512K X 8 OTP CMOS EPROM Revision History Rev. No. History Issue Date Remark 0.0 Initial issue June 17, 1998 Preliminary 1.0 Change CE from VIL to VIH
512KX8 CMOS S-RAM (Monolithic)
512KX8 CMOS S-RAM (Monolithic) Features Access Times: 55, 70, 85 and 100ns Package Option: 32-Pin Ceramic DIP, JEDEC Approved Pinout 36-Lead Ceramic SOJ JEDEC Approved Revolutionary Pinout 32-Lead Ceramic
DS1258Y/AB 128k x 16 Nonvolatile SRAM
www.maxim-ic.com FEATURES 10-Year Minimum Data Retention in the Absence of External Power Data is Automatically Protected During a Power Loss Separate Upper Byte and Lower Byte Chip- Select Inputs Unlimited
ICE27C Megabit(128KX8) OTP EPROM
1- Megabit(128KX8) OTP EPROM Description The is a low-power, high-performance 1M(1,048,576) bit one-time programmable read only memory (OTP EPROM) organized as 128K by 8 bits. It is single 5V power supply
256K (32K x 8) 3-volt Only Flash Memory
Features Single Supply Voltage, Range 3V to 3.6V 3-Volt Only Read and Write Operation Software Protected Programming Low Power Dissipation 15 ma Active Current 40 µa CMOS Standby Current Fast Read Access
16-Mbit (1 M words 16 bit / 2 M words 8 bit) Static RAM with Error-Correcting Code (ECC)
16-Mbit (1 M words 16 bit / 2 M words 8 bit) Static RAM with Error-Correcting Code (ECC) 16-Mbit (1 M words 16 bit / 2 M words 8 bit) Static RAM with Error-Correcting Code (ECC) Features Ultra-low standby
AT28C K (32K x 8) Paged CMOS E 2 PROM. Features. Description. Pin Configurations
AT28C256 Features Fast Read Access Time - 150 ns Automatic Page Write Operation Internal Address and Data Latches for 64-Bytes Internal Control Timer Fast Write Cycle Times Page Write Cycle Time: 3 ms
8-megabit 2.5-volt or 2.7-volt DataFlash AT45DB081D
Features Single 2.5V or 2.7V to 3.6V Supply RapidS Serial Interface: 66 MHz Maximum Clock Frequency SPI Compatible Modes 0 and 3 User Configurable Page Size 256 Bytes per Page 264 Bytes per Page Page Size
3.3 Volt, Byte Alterable E 2 PROM
1M X28LV010 128K x 8 Bit 3.3 Volt, Byte Alterable E 2 PROM FEATURES Access Time: 70, 90, 120, 150ns Simple Byte and Page Write Single 3.3V±10% supply No external high voltages or V PP control circuits
256K (32K x 8) High-speed Parallel EEPROM AT28HC256
Features Fast Read Access Time 70 ns Automatic Page Write Operation Internal Address and Data Latches for 64 Bytes Internal Control Timer Fast Write Cycle Times Page Write Cycle Time: 3 ms or 10 ms Maximum
4-Megabit 2.7-volt Only Serial DataFlash AT45DB041. Features. Description. Pin Configurations
Features Single 2.7V - 3.6V Supply Serial Interface Architecture Page Program Operation Single Cycle Reprogram (Erase and Program) 2048 Pages (264 Bytes/Page) Main Memory Two 264-Byte SRAM Data Buffers
1 Megabit Serial Flash EEPROM SST45LF010
EEPROM FEATURES: Single.0-.V Read and Write Operations Serial Interface Architecture SPI Compatible: Mode 0 and Mode Byte Serial Read with Single Command Superior Reliability Endurance: 00,000 Cycles (typical)
256K X28HC256 32K x 8 Bit
256K X28HC256 32K x 8 Bit 5 Volt, Byte Alterable EEPROM FEATURES Access time: 70ns Simple byte and page write Single 5V supply No external high voltages or V PP control circuits Self-timed No erase before
16-Mbit (512 K words 32 bits) Static RAM with Error-Correcting Code (ECC)
16-Mbit (512 K words 32 bits) Static RAM with Error-Correcting Code (ECC) 16-Mbit (512 K words 32 bits) Static RAM with Error-Correcting Code (ECC) Features High speed t AA = 10 ns/15 ns Embedded error-correcting
8-Mbit (512K words 16 bit) Static RAM with Error Correcting Code (ECC)
8-Mbit (512K words 16 bit) Static RAM with Error Correcting Code (ECC) 8-Mbit (512K words 16 bit) Static RAM with Error Correcting Code (ECC) Features Ultra-low standby current Typical standby current:
Battery-Voltage. 256K (32K x 8) Parallel EEPROMs AT28BV256. Features. Description. Pin Configurations
Features Single 2.7V - 3.6V Supply Fast Read Access Time - 200 ns Automatic Page Write Operation Internal Address and Data Latches for 64 Bytes Internal Control Timer Fast Write Cycle Times Page Write
FM18L08 256Kb Bytewide FRAM Memory
256Kb Bytewide FRAM Memory Features 256K bit Ferroelectric Nonvolatile RAM Organized as 32,768 x 8 bits 45 year Data Retention Unlimited Read/Write Cycles NoDelay Writes Advanced High-Reliability Ferroelectric
256 (32K x 8) High-speed Parallel EEPROM AT28HC256
Features Fast Read Access Time 70 ns Automatic Page Write Operation Internal Address and Data Latches for 64 Bytes Internal Control Timer Fast Write Cycle Times Page Write Cycle Time: 3 ms or 10 ms Maximum
79C Megabit (512k x 8-bit) EEPROM MCM FEATURES DESCRIPTION: 79C0408. Logic Diagram
79C48 4 Megabit (512k x 8-bit) EEPROM MCM CE 1 CE 2 CE 3 CE 4 RES R/B WE OE 79C48 A -16 128K x 8 128K x 8 128K x 8 128K x 8 I/O -7 Logic Diagram FEATURES Four 128k x 8-bit EEPROMs MCM RAD-PAK radiation-hardened
FM1608B 64Kb Bytewide 5V F-RAM Memory
Pre-Production FM1608B 64Kb Bytewide 5V F-RAM Memory Features 64Kbit Ferroelectric Nonvolatile RAM Organized as 8,192 x 8 bits High Endurance 1 Trillion (10 12 ) Read/Writes 38 year Data Retention (@ +75
1-Megabit (128K x 8) 5-volt Only Flash Memory AT29C010A. Features. Description. Pin Configurations
Features Fast Read Access Time - 70 ns 5-Volt Only Reprogramming Sector Program Operation Single Cycle Reprogram (Erase and Program) 1024 Sectors (128 bytes/sector) Internal Address and Data Latches for
DS1217M Nonvolatile Read/Write Cartridge
DS1217M Nonvolatile Read/Write Cartridge www.maxim-ic.com GENERAL DESCRIPTION The DS1217M is a nonvolatile RAM designed for portable applications requiring a rugged and durable package. The nonvolatile
28LV Megabit (128K x 8-Bit) EEPROM. Memory DESCRIPTION: FEATURES: 28LV011. Logic Diagram
28LV11 1 Megabit (128K x 8-Bit) EEPROM V CC V SS High Voltage Generator I/O I/O7 RDY/Busy RES OE I/O Buffer and Input Latch CE WE Control Logic Timing RES 28LV11 A A6 Y Decoder Y Gating A7 Address Buffer
4-Megabit (512K x 8) 5-volt Only 256-Byte Sector Flash Memory AT29C040A. Features. Description. Pin Configurations
Features Fast Read Access Time - 120 ns 5-Volt Only Reprogramming Sector Program Operation Single Cycle Reprogram (Erase and Program) 2048 Sectors (256 bytes/sector) Internal Address and Data Latches for
AT28C16. 16K (2K x 8) CMOS E 2 PROM. Features. Description. Pin Configurations
Features Fast Read Access Time - 150 ns Fast Byte Write - 200 µs or 1 ms Self-Timed Byte Write Cycle Internal Address and Data Latches Internal Control Timer Automatic Clear Before Write Direct Microprocessor
4-Mbit (256K words 16 bit) Static RAM
4-Mbit (256K words 16 bit) Static RAM 4-Mbit (256K words 16 bit) Static RAM Features High speed t AA = 10 ns / 15 ns Low active and standby currents Active current: I CC = 38-mA typical Standby current:
24C08/24C16. Two-Wire Serial EEPROM. Preliminary datasheet 8K (1024 X 8)/16K (2048 X 8) General Description. Pin Configuration
Two-Wire Serial EEPROM Preliminary datasheet 8K (1024 X 8)/16K (2048 X 8) Low-voltage Operation 1.8 (VCC = 1.8V to 5.5V) Operating Ambient Temperature: -40 C to +85 C Internally Organized 1024 X 8 (8K),
DS1243Y 64K NV SRAM with Phantom Clock
19-6076; Rev 11/11 DS1243Y 64K NV SRAM with Phantom Clock FEATURES Real-Time Clock Keeps Track of Hundredths of Seconds, Seconds, Minutes, Hours, Days, Date of the Month, Months, and Years 8K x 8 NV SRAM
DS1345W 3.3V 1024k Nonvolatile SRAM with Battery Monitor
19-5587; Rev 10/10 www.maxim-ic.com FEATURES 10 years minimum data retention in the absence of external power Data is automatically protected during power loss Power supply monitor resets processor when
Am27C Megabit (256 K x 8-Bit) CMOS EPROM DISTINCTIVE CHARACTERISTICS GENERAL DESCRIPTION BLOCK DIAGRAM V CC V SS V PP
FINAL Am27C020 2 Megabit (256 K x 8-Bit) CMOS EPROM DISTINCTIVE CHARACTERISTICS Fast access time Speed options as fast as 55 ns Low power consumption 100 µa maximum CMOS standby current JEDEC-approved
AT49BV004(T) TSOP Top View Type 1 1. AT49BV4096A(T) TSOP Top View Type 1 A16 BYTE GND I/O7 I/O14 I/O6 I/O13 I/O5 I/O12 I/O4 VCC I/O11 I/O3 I/O10 I/O2
Features 2.7V to 3.6V Read/Write Operation Fast Read Access Time - 120 ns Internal Erase/Program Control Sector Architecture One 8K Words (16K bytes) Boot Block with Programming Lockout Two 4K Words (8K
DIP Top View VCC WE A17 NC A16 A15 A12 A14 A13 A8 A9 A11 A7 A6 A5 A4 A3 A2 A1 A0 I/O0 A10 CE I/O7 I/O6 I/O5 I/O4 I/O3 I/O1 I/O2 GND.
Features Fast Read Access Time - 70 ns 5-volt Only Reprogramming Sector Program Operation Single Cycle Reprogram (Erase and Program) 1024 Sectors (256 bytes/sector) Internal Address and Data Latches for
S-2900A. Rev CMOS 512-bit SERIAL E 2 PROM
Rev.1.11 CMOS 512-bit SERIAL E 2 PROM S-29A The S-29A is a wide operating voltage range, low power consumption 512-bit E 2 PROM. The organization is 64-word 8-bit, and can be read or written serially.
Rev. No. History Issue Date Remark
128K X 8 BIT LOW VOLTAGE CMOS SRAM ocument Title 128K X 8 BIT LOW VOLTAGE CMOS SRAM Revision History Rev. No. History Issue ate Remark 0.0 Initial issue February 19, 2002 Preliminary 0.1 Add 32L Pb-Free
SST 29EE V-only 1 Megabit Page Mode EEPROM
Data Sheet SST 29EE010 July 1996 5.1 Features: Single 5.0-Volt Read and Write Operations CMOS SuperFlash EEPROM Technology Endurance: 100,000 Cycles (typical) Greater than 100 years Data Retention Low
Am27C Megabit (128 K x 16-Bit) CMOS EPROM DISTINCTIVE CHARACTERISTICS GENERAL DESCRIPTION BLOCK DIAGRAM V CC V SS V PP
FINAL Am27C2048 2 Megabit (128 K x 16-Bit) CMOS EPROM DISTINCTIVE CHARACTERISTICS Fast access time Speed options as fast as 55 ns Low power consumption 100 µa maximum CMOS standby current JEDEC-approved
16-Mbit (1M words 16 bit) Static RAM
16-Mbit (1M words 16 bit) Static RAM 16-Mbit (1M words 16 bit) Static RAM Features High speed t AA = 10 ns/15 ns Low active power I CC = 90 ma at 100 MHz Low CMOS standby current I SB2 = 20 ma (typ) Operating
DatasheetArchive.com. Request For Quotation
DatasheetArchive.com Request For Quotation Order the parts you need from our real-time inventory database. Simply complete a request for quotation form with your part information and a sales representative
High Performance 4Kx4 Static RAM MIL-STD-883C
High Performance 4Kx4 Static RAM MIL-STD-883C FEATURES Full Military Temperature Operating Range (-55 0 C to + 125 0 C) MIL-STD-883C Processing 4Kx4 Bit Organisation 55 and 70 nsec-agce-ss-times Fully
Am27C Kilobit (8 K x 8-Bit) CMOS EPROM DISTINCTIVE CHARACTERISTICS GENERAL DESCRIPTION BLOCK DIAGRAM V CC V SS V PP
FINAL Am27C64 64 Kilobit (8 K x 8-Bit) CMOS EPROM DISTINCTIVE CHARACTERISTICS Fast access time Speed options as fast as 45 ns Low power consumption 20 µa typical CMOS standby current JEDEC-approved pinout
GT24C256 2-WIRE. 256K Bits. Serial EEPROM
GT24C256 2-WIRE 256K Bits Serial EEPROM Copyright 2013 Giantec Semiconductor Inc. (Giantec). All rights reserved. Giantec reserves the right to make changes to this specification and its products at any
Am27C Megabit (131,072 x 8-Bit) CMOS EPROM DISTINCTIVE CHARACTERISTICS GENERAL DESCRIPTION BLOCK DIAGRAM
FINAL 1 Megabit (131,072 x 8-Bit) CMOS EPROM DISTINCTIVE CHARACTERISTICS Fast access time 45 ns maximum access time Low power consumption 20 µa typical CMOS standby current JEDEC-approved pinout Single
1-megabit (64K x 16) 5-volt Only Flash Memory AT49F1024 AT49F1025
Features Single-voltage Operation 5V Read 5V Reprogramming Fast Read Access Time 35 ns Internal Program Control and Timer 8K Word Boot Block with Lockout Fast Erase Cycle Time 10 seconds Word-by-word Programming
CMOS Static RAM 1 Meg (128K x 8-Bit) Revolutionary Pinout
CMOS Static RAM 1 Meg (K x -Bit) Revolutionary Pinout IDT714 Features K x advanced high-speed CMOS static RAM JEDEC revolutionary pinout (center power/gnd) for reduced noise Equal access and cycle times
HM6264B Series. 64 k SRAM (8-kword 8-bit)
64 k SRAM (8-kword 8-bit) ADE-203-454B (Z) Rev. 2.0 Nov. 1997 Description The Hitachi HM6264B is 64k-bit static RAM organized 8-kword 8-bit. It realizes higher performance and low power consumption by
16-megabit 2.5-volt or 2.7-volt DataFlash AT45DB161D
Features Single 2.5V - 3.6V or 2.7V - 3.6V Supply RapidS Serial Interface: 66 MHz Maximum Clock Frequency SPI Compatible Modes 0 and 3 User Configurable Page Size 512 Bytes per Page 528 Bytes per Page