ACT S512K32 High Speed 16 Megabit SRAM Multichip Module

Size: px

Start display at page:

Download "ACT S512K32 High Speed 16 Megabit SRAM Multichip Module"

Annabel Montgomery
6 years ago
Views:

1 ACT S512K32 High Speed 16 Megabit SRAM Multichip Module Features 4 Low Power CMOS 512K x 8 SRAMs in one MCM Factory configured as 512K x 32; User configurable as 1M x 16 or 2M x 8 Input and Output TTL & CMOS Compatible Design Fast 17,20,25,35,45,55ns Access Times Full Commercial, Industrial and Military (-55 C to +125 C) Temperature Range MIL-PRF Compliant MCMs Available +5 V Power Supply Available in two Surface Mount Packages, and two PGA Type Package 68 Lead, Low Profile CQFP(F1), 1.56"SQ x.140"max 68 Lead, Dual-Cavity CQFP(F2), 0.88"SQ x.20"max (.18 max thickness available, contact factory for details) (Drops into the 68 Lead JEDEC.99"SQ CQFJ footprint) 68 Lead, Single-Cavity CQFP (F18),.94"SQ x.140"max (Drops into the 68 Lead JEDEC.99"SQ CQFJ footprint) 66 Pin, 1.38" x 1.38" x.245" PGA Type, Aeroflex code# "P1" 66 Pin, 1.09" x 1.09" x.185" PGA Type, With Shoulder, Aeroflex code# "P7" Internal Decoupling Capacitors DESC SMD# Released (F1,F2,F18,P1,P7) Block Diagram PGA Type Package (P1,P7) & CQFP (F2,F18) A0 A18 OE WE1 CE1 WE2 CE2 WE3 CE3 WE4 512Kx8 512Kx8 512Kx8 512Kx CE4 I/O0-7 I/O8-15 I/O16-23 I/O24-31 Pin Description I/O0-31 Data I/O A0 18 Address Inputs WE1 4 Write Enables CE1 4 Chip Enables OE Output Enable Vcc Power Supply GND Ground NC Not Connected CIRCUIT TECHNOLOGY General Description The ACT S512K32 is a High Speed, 16 megabit CMOS SRAM Multichip Module (MCM) designed for full temperature range industrial, military, or space, mass memory and fast cache applications. The MCM can be organized as a 512K x 32 bit, 1M x 16 bit or 2M x 8 bit device and is input and output TTL compatible. Writing is executed when the write enable (WE) and chip enable (CE) inputs are low and output enable (OE) input is high. Reading is accomplished when WE is high and CE and OE are both low. Access time grades of 17ns, 20ns, 25ns, 35ns, 45ns and 55ns maximum are standard high speed versions. The +5 Volt power supply version is standard and +3.3 Volt lower power model is a future optional product. Block Diagram CQFP(F1) WE OE A0 A18 CE1 CE2 CE3 512Kx8 512Kx8 512Kx8 512Kx CE4 I/O0-7 I/O8-15 I/O16-23 I/O24-31 Pin Description I/O0-31 Data I/O A0 18 Address Inputs WE Write Enable CE1 4 Chip Enables OE Output Enable Vcc Power Supply GND Ground NC Not Connected The products are designed for operation over the temperature range of -55 C to +125 C and under the full military environment. DESC Standard Military Drawing (SMD) numbers are released. The ACT-S512K32 is manufactured in Aeroflex s 80,000 square foot MIL-PRF certified facility in Plainview, N.Y. eroflex Circuit Technology - Advanced Multichip Modules SCD1660 REV D 5/21/01

2 Absolute Maximum Ratings Symbol Rating Range Units Tc Operating Temperature -55 to +125 C T STG Storage Temperature -65 to +150 C P D Maximum Package Power Dissipation 3.0 W Ø J-C Hottest Die, Max Thermal Resistance - Junction to Case 5 C/W V G Maximum Signal Voltage to Ground -0.5 to +7 V T L Maximum Lead Temperature (10 seconds) 300 C Normal Operating Conditions Symbol Parameter Minimum Maximum Units V CC Power Supply Voltage V V IH Input High Voltage +2.2 V CC V V IL Input Low Voltage V Capacitance (V IN = 0V, f = 1MHz, Tc = 25 C) Symbol Parameter Maximum Units CAD A0 A18 Capacitance 50 pf COE OE Capacitance 50 pf CWE CQFP (F1) Package 50 pf PGA (P1 & P7) and CQFP (F2 & F18) Packages 20 pf CCE Chip Enable Capacitance 20 pf CI/O I/O0 I/O31 Capacitance 20 pf This parameter is guaranteed by design but not tested DC Characteristics (VCC = 5.0V, VSS = 0V, Tc = -55 C to +125 C, unless otherwise indicated) Parameter Sym Conditions ALL Speeds Units Input Leakage Current I LI V CC = +5.5V, V IN =0orV CC - 10 µa Output Leakage Current I LO CE = V IH, OE = V IH, V OUT =0toV CC - 10 µa Operating Supply Current 32 Bit Mode Standby Current Operating Supply Current 32 Bit Mode I CC1 x32 CE = V IL, OE = V IH, V CC = +5.5V f = 5 MHz CMOS Compatible I SB1 CE = V CC, OE = V IH, V CC = +5.5V f = 5 MHz CMOS Compatible I CC2 x32 CE = V IL, OE = V IH, V CC = +5.5V f = 50 MHz CMOS Compatible ma - 80 ma ma Standby Current CE = V I CC, OE = V IH, V CC = +5.5V SB2 f = 50 MHz CMOS Compatible ma Output Low Voltage V OL I OL = 8 ma, V CC = +4.5V V Output High Voltage V OH I OH = -4.0 ma, V CC = +4.5V V 2

3 Read Cycle AC Characteristics (VCC = 5.0V, VSS = 0V, Tc = -55 C to +125 C) Parameter Sym Units Read Cycle Time t RC ns Address Access Time t AA ns Chip Enable Access Time t ACE ns Output Hold from Address Change t OH ns Output Enable to Output Valid t OE ns Chip Enable to Output in Low Z * t CLZ ns Output Enable to Output in Low Z * t OLZ ns Chip Deselect to Output in High Z * t CHZ ns Output Disable to Output in High Z * t OHZ ns * Parameters guaranteed by design but not tested Write Cycle Parameter Sym Units Write Cycle Time t WC ns Chip Enable to End of Write t CW ns Address Valid to End of Write t AW ns Data Valid to End of Write t DW ns Write Pulse Width t WP ns Address Setup Time t AS ns Output Active from End of Write * t OW ns Write to Output in High Z * t WHZ ns Data Hold from Write Time t DH ns Address Hold Time t AH ns * Parameters guaranteed by design but not tested Data Retention Electrical Characteristics (Special Order Only) (Tc = -55 C to +125 C) Parameter Sym Test Conditions All Speeds Min Max Units V CC for Data Retention V DR CE V CC 0.2V V Data Retention Current I CCDR1 V CC = 3V - 28 ma Truth Table Mode CE OE WE Data I/O Power Standby H X X High Z Standby (deselect/power down) Read L L H Data Out Active Output Disable L H H High Z Active (deselected) Write L X L Data In Active 3

4 Timing Diagrams Read Cycle Timing Diagrams Read Cycle 1 (CE = OE = VIL, WE = VIH) trc Write Cycle Timing Diagrams Write Cycle 1 (WE Controlled, OE = VIL) twc A0-18 A0-16 DI/O toh Previous Data Valid taa Data Valid CE taw tcw tah WE tas twhz twp tdw Data Valid tow DI/O tdh Read Cycle 2 (WE = VIH) trc Write Cycle 2 (CE Controlled, OE = VIH ) A0-18 twc CE OE taa tacs tclz toe tchz tohz A0-18 CE tas taw WE tcw twp tah DI/O tolz High Z Data Valid DI/O tdw Data Valid tdh UNDEFINED DON T CARE Note: Guaranteed by design, but not tested. AC Test Circuit Current Source IOL Parameter Typical Units Input Pulse Level V To Device Under Test CL = 50 pf VZ ~ 1.5 V (Bipolar Supply) Input Rise and Fall 5 ns Input and Output Timing Reference Level 1.5 V IOH Current Source Notes: 1) VZ is programmable from -2V to +7V. 2) IOL and IOH programmable from 0 to 16 ma. 3) Tester Impedance ZO =75Ω. 4) VZ is typically the midpoint of VOH and VOL. 5) IOL and IOH are adjusted to simulate a typical resistance load circuit. 6) ATE Tester includes jig capacitance. 4

5 Pin Numbers & Functions 66 Pins PGA-Type Pin # Function Pin # Function Pin # Function Pin # Function 1 I/O8 18 A12 35 I/O25 52 WE3 2 I/O9 19 Vcc 36 I/O26 53 CE3 3 I/O10 20 CE1 37 A6 54 GND 4 A13 21 NC 38 A7 55 I/O19 5 A14 22 I/O3 39 NC 56 I/O31 6 A15 23 I/O15 40 A8 57 I/O30 7 A16 24 I/O14 41 A9 58 I/O29 8 A17 25 I/O13 42 I/O16 59 I/O28 9 I/O0 26 I/O12 43 I/O17 60 A0 10 I/O1 27 OE 44 I/O18 61 A1 11 I/O2 28 A18 45 VCC 62 A2 12 WE2 29 WE1 46 CE4 63 I/O23 13 CE2 30 I/O7 47 WE4 64 I/O22 14 GND 31 I/O6 48 I/O27 65 I/O21 15 I/O11 32 I/O5 49 A3 66 I/O20 16 A10 33 I/O4 50 A4 17 A11 34 I/O24 51 A5 Package Outline PGA-Type "P1" Package Outline PGA-Type "P7 Side View (P1) DIA Pin 56 Bottom View (P1) SQ Pin 1 Side View (P7) Pin DIA Bottom View (P7) SQ Pin 1 Limited Availability.100 Use ''P7'' package for new designs MIN Pin Pin MIN Pin Pin 11 All dimensions in inches 5

6 Pin Numbers & Functions 68 Pins CQFP Pin # Function Pin # Function Pin # Function Pin # Function 1 GND 18 GND 35 OE 52 GND 2 CE1 19 I/O8 36 CE4 53 I/O23 3 A5 20 I/O9 37 A17 54 I/O22 4 A4 21 I/O10 38 A18 55 I/O21 5 A3 22 I/O11 39 NC 56 I/O20 6 A2 23 I/O12 40 NC 57 I/O19 7 A1 24 I/O13 41 NC 58 I/O18 8 A0 25 I/O14 42 NC 59 I/O17 9 NC 26 I/O15 43 NC 60 I/O16 10 I/O0 27 VCC 44 I/O31 61 VCC 11 I/O1 28 A11 45 I/O30 62 A10 12 I/O2 29 A12 46 I/O29 63 A9 13 I/O3 30 A13 47 I/O28 64 A8 14 I/O4 31 A14 48 I/O27 65 A7 15 I/O5 32 A15 49 I/O26 66 A6 16 I/O6 33 A16 50 I/O25 67 WE 17 I/O7 34 CE2 51 I/O24 68 CE3 Package Outline CQFP "F1" Pin REF Pin 9 Pin 61 Pin 10 Pin 60 Limited Availability Use ''F18'' package for new designs SQ 1.50 (4 Sides) Pin 26 Pin 44 Pin 27 Pin MIN (4 Sides).050 ± ± REF (16 at sides).010 ±.002 All dimensions in inches.060 REF 6

7 Pin Numbers & Functions 68 Pins Dual-Cavity CQFP Pin # Function Pin # Function Pin # Function Pin # Function 1 GND 18 GND 35 OE 52 GND 2 CE3 19 I/O8 36 CE2 53 I/O23 3 A5 20 I/O9 37 A17 54 I/O22 4 A4 21 I/O10 38 WE2 55 I/O21 5 A3 22 I/O11 39 WE3 56 I/O20 6 A2 23 I/O12 40 WE4 57 I/O19 7 A1 24 I/O13 41 A18 58 I/O18 8 A0 25 I/O14 42 NC 59 I/O17 9 NC 26 I/O15 43 NC 60 I/O16 10 I/O0 27 Vcc 44 I/O31 61 VCC 11 I/O1 28 A11 45 I/O30 62 A10 12 I/O2 29 A12 46 I/O29 63 A9 13 I/O3 30 A13 47 I/O28 64 A8 14 I/O4 31 A14 48 I/O27 65 A7 15 I/O5 32 A15 49 I/O26 66 A6 16 I/O6 33 A16 50 I/O25 67 WE1 17 I/O7 34 CE1 51 I/O24 68 CE4 Package Outline Dual-Cavity CQFP "F2" Top View Pin SQ ±.010 Pin SQ Pin 61 Limited Availability Use ''F18'' package for new designs Pin ±.002 * REF +3 / ± R REF Pin Pin ±.005 Detail A.010 ±.010 Pin REF Pin 43 See Detail A All dimensions in inches *.180 available, call factory for details 7

8 Pin Numbers & Functions 68 Pins Single-Cavity CQFP Pin # Function Pin # Function Pin # Function Pin # Function 1 GND 18 GND 35 OE 52 GND 2 CE3 19 I/O8 36 CE2 53 I/O23 3 A5 20 I/O9 37 A17 54 I/O22 4 A4 21 I/O10 38 WE2 55 I/O21 5 A3 22 I/O11 39 WE3 56 I/O20 6 A2 23 I/O12 40 WE4 57 I/O19 7 A1 24 I/O13 41 A18 58 I/O18 8 A0 25 I/O14 42 NC 59 I/O17 9 NC 26 I/O15 43 NC 60 I/O16 10 I/O0 27 Vcc 44 I/O31 61 VCC 11 I/O1 28 A11 45 I/O30 62 A10 12 I/O2 29 A12 46 I/O29 63 A9 13 I/O3 30 A13 47 I/O28 64 A8 14 I/O4 31 A14 48 I/O27 65 A7 15 I/O5 32 A15 49 I/O26 66 A6 16 I/O6 33 A16 50 I/O25 67 WE1 17 I/O7 34 CE1 51 I/O24 68 CE4 Package Outline CQFP Single Cavity "F18" Pin SQ ± SQ ±.009 Pin 1 Pin 61 Pin REF.015 ± ± MIN SQ REF Detail A Pin 26 Pin NOM Pin 44 Pin 43 All dimensions in inches See Detail A 8

9 CIRCUIT TECHNOLOGY Ordering Information Model Number DESC Part Number Speed Package ACT S512K32N 017F1Q HYC 17ns 1.56"sq CQFP ACT S512K32N 020F1Q HYC 20ns 1.56"sq CQFP ACT S512K32N 025F1Q HYC 25ns 1.56"sq CQFP ACT S512K32N 034F1Q HYC 35ns 1.56"sq CQFP ACT S512K32N 045F1Q HYC 45ns 1.56"sq CQFP ACT S512K32N 055F1Q HYC 55ns 1.56"sq CQFP ACT S512K32N 017F2Q HMC 17ns.88"sq CQFP ACT S512K32N 020F2Q HMC 20ns.88"sq CQFP ACT S512K32N 025F2Q HMC 25ns.88"sq CQFP ACT S512K32N 035F2Q HMC 35ns.88"sq CQFP ACT S512K32N 045F2Q HMC 45ns.88"sq CQFP ACT S512K32N 055F2Q HMC 55ns.88"sq CQFP ACT S512K32N 017F18Q H9C 17ns.94"sq CQFP ACT S512K32N 020F18Q H9C 20ns.94"sq CQFP ACT S512K32N 025F18Q H9C 25ns.94"sq CQFP ACT S512K32N 035F18Q H9C 35ns.94"sq CQFP ACT S512K32N 045F18Q H9C 45ns.94"sq CQFP ACT S512K32N 055F18Q H9C 55ns.94"sq CQFP ACT S512K32N 017P1Q HXC 17ns 1.38"sq PGA-Type ACT S512K32N 020P1Q HXC 20ns 1.38"sq PGA-Type ACT S512K32N 025P1Q HXC 25ns 1.38"sq PGA-Type ACT S512K32N 035P1Q HXC 35ns 1.38"sq PGA-Type ACT S512K32N 045P1Q HXC 45ns 1.38"sq PGA-Type ACT S512K32N 055P1Q HXC 55ns 1.38"sq PGA-Type ACT S512K32N 017P7Q HTC 17ns 1.09"sq PGA-Type ACT S512K32N 020P7Q HTC 20ns 1.09"sq PGA-Type ACT S512K32N 025P7Q HTC 25ns 1.09"sq PGA-Type ACT S512K32N 035P7Q HTC 35ns 1.09"sq PGA-Type ACT S512K32N 045P7Q HTC 45ns 1.09"sq PGA-Type ACT S512K32N 055P7Q HTC 55ns 1.09"sq PGA-Type Aeroflex Circuit Technology Memory Type S = SRAM Memory Depth, Locations Memory Width, Bits Pinout Options N = None Memory Speed, ns Specification subject to change without notice Aeroflex Circuit Technology 35 South Service Road Plainview New York Model Number Breakdown ACT S 512K 32 N 020 F18 Q Screening C = Commercial Temp, 0 C to +70 C I = Industrial Temp, -40 C to +85 C T = Military Temp, -55 C to +125 C M = Military Temp, -55 C to +125 C, Screened * Q = MIL-PRF Compliant/SMD * Screened to the individual test methods of MIL-STD-883 Package Type & Size Surface Mount Packages Thru-Hole Packages F1 = 1.56"SQ 68 Pin CQFP P1 = 1.385"SQ PGA 66 Pins F2 =.88"SQ 68 Pin Dual-Cavity CQFP P7 = 1.085"SQ PGA 66 Pins F18 =.94"SQ 68 Leads CQFP Single-Cavity Low Profile Telephone: (516) FAX: (516) Toll Free Inquiries: 1-(800)

ACT-S128K32 High Speed 4 Megabit SRAM Multichip Module

ACT-S128K32 High Speed 4 Megabit SRAM Multichip Module CT-S128K32 High Speed 4 Megabit SRM Multichip Module Features 4 Low Power CMOS 128K x 8 SRMs in one MCM Overall configuration as 128K x 32 Input and Output TTL Compatible 17, 20, 25, 35, 45 & 55ns ccess