Arab Open University. Computer Organization and Architecture - T103

Transcription

1 Arab Open University Computer Organization and Architecture - T103 Reference Book: Linda Null, Julia Lobur, The essentials of Computer Organization and Architecture, Jones & Bartlett, Third Edition, 2012.

2 T103 Chapter 1

3 REVIEW OF ESSENTIAL TERMS AND CONCEPTS 1. What is the difference between computer organization and computer architecture? 2. What is an ISA? 3. What is the importance of the Principle of Equivalence of Hardware and Software? 4. Name the three basic components of every computer. 5. To what power of 10 does the prefix giga- refer? What is the (approximate) equivalent power of 2? 6. To what power of 10 does the prefix micro- refer? What is the (approximate) equivalent power of 2? 7. What unit is typically used to measure the speed of a computer clock? 8. Name two types of computer memory. 9. What is the mission of the IEEE? 10. What is the full name of the organization that uses the initials ISO? Is ISO an acronym? 11. ANSI is the acronym used by which organization? 12. What is the name of the Swiss organization that devotes itself to matters concerning telephony, telecommunications, and data communications? AOU

4 REVIEW OF ESSENTIAL TERMS AND CONCEPTS 13. Name two driving factors in the development of computers. 14. What is it about the transistor that made it such a great improvement over the vacuum tube? 15. How does an integrated circuit differ from a transistor? 16. Explain the differences between SSI, MSI, LSI, and VLSI. 17. What technology spawned the development of microcomputers? Why? 18. State Moore s Law. Can it hold indefinitely? 19. How is Rock s Law related to Moore s Law? 20. Name and explain the seven commonly accepted layers of the Computer Level Hierarchy. How does this arrangement help us to understand computer systems? 21. What was it about the von Neumann architecture that distinguished it from its predecessors? 22. Name the characteristics present in a von Neumann architecture. 23. How does the fetch-decode-execute cycle work? AOU

5 EXERCISES 1. In what ways are hardware and software different? In what ways are they the same? 2. a) How many milliseconds (ms) are in 1 second? b) How many microseconds (µs) are in 1 second? c) How many nanoseconds (ns) are in 1 millisecond? d) How many microseconds are in 1 millisecond? e) How many nanoseconds are in 1 microsecond? f) How many kilobytes (KB) are in 1 gigabyte (GB)? g) How many kilobytes are in 1 megabyte (MB)? h) How many megabytes are in 1 gigabyte (GB)? i) How many bytes are in 20 megabytes? j) How many kilobytes are in 2 gigabytes? 3. By what order of magnitude is something that runs in nanoseconds faster than some- thing that runs in milliseconds? AOU

6 EXERCISES 4. Suppose a transistor on an integrated circuit chip were 2 microns in size. According to Moore s Law, how large would that transistor be in 2 years? How is Moore s law relevant to programmers? 5. In the Von-Newmann model, explain the purpose of the a) Processing unit b) Program counter 6. Explain why modern computers consist of multiple levels of virtual machines. 7. Explain what it means to fetch an instruction. 8. What are the limitations of Moore s Law? Why can t this law hold forever? Explain. AOU

7 T103 Chapter 2

8 REVIEW OF ESSENTIAL TERMS AND CONCEPTS 1. The word bit is a contraction for what two words? 2. Explain how the terms bit, byte, nibble, and word are related. 3. Why are binary and decimal called positional numbering systems? 4. What is a radix? 5. How many of the numbers to remember (in all bases) from Figure 2.1 can you remember? 6. What does overflow mean in the context of unsigned numbers? 7. Name the three ways in which signed integers can be represented in digital computers and explain the differences. 8. Which one of the three integer representations is used most often by digital computer systems? 9. What is overflow and how can it be detected? How does overflow in unsigned num- bers differ from overflow in signed numbers? 10. How does carry differ from overflow 11. What are the three component parts of a floating-point number? 12. What is a biased exponent, and what efficiencies can it provide? 13. What is normalization and why is it necessary? 14. Why is there always some degree of error in floating-point arithmetic when performed by a binary digital computer? AOU

9 EXERCISES 1. Perform the following base conversions using subtraction or division-remainder: a) = 3 b) = 5 c) = 7 d) = 9 2. Perform the following base conversions using subtraction or division-remainder: a) = 3 b) = 5 c) = 7 d) = 9 3. Convert the following decimal fractions to binary with a maximum of six places to the right of the binary point: a) b) c) d) AOU

10 EXERCISES 4. Convert the following decimal fractions to binary with a maximum of six places to the right of the binary point: a) b) c) d) Convert the hexadecimal number AC12 16 to binary 6. Represent the following decimal numbers in binary using 8-bit signed magnitude, one s complement, and two s complement: 7; 42 ; 119 ; Represent the following decimal numbers in binary using 8-bit signed magnitude one s complement, and two s complement representations: 60 ; -60 ; 20 ; What decimal value does the 8-bit binary number have if: a) It is interpreted as an unsigned number? b) It is on a computer using signed-magnitude representation? c) It is on a computer using one s complement representation? d) It is on a computer using two s complement representation? AOU

11 EXERCISES 9. Given the following two binary numbers: and a) Which of these two numbers is the larger unsigned binary number? b) Which of these two numbers is the larger when it is being interpreted on a computer using two s complement representation? c) Which of these two numbers is the smaller when it is being interpreted on a computer using signed magnitude representation? 10. Using a word of 3 bits, list all of the possible signed binary numbers and their decimal equivalents that are representable in: a) Signed magnitude b) One s complement c) Two s complement 11. Using a word of 4 bits, list all of the possible signed binary numbers and their decimal equivalents that are representable in: a) Signed magnitude b) One s complement c) Two s complement 12. Given a (very) tiny computer that has a word size of 6 bits, what are the smallest negative numbers and the largest positive numbers that this computer can represent in each of the following representations? a) One s complement b) Two s complement AOU

12 EXERCISES 13. Assume we are using the simple model for floating-point representation as given in this book (the representation uses a 14-bit format, 5 bits for the exponent with a bias of 16, a normalized mantissa of 8 bits, and a single sign bit for the number): a) Show how the computer would represent the numbers and 0.25 using this floating-point format. b) Show how the computer would add the two floating-point numbers in part a by changing one of the numbers so they are both expressed using the same power of 2. c) Show how the computer would represent the sum in part b using the given float- ing-point representation. What decimal value for the sum is the computer actually storing? Explain. 14. Why do we usually store floating-point numbers in normalized form? What is the advantage of using a bias as opposed to adding a sign bit to the exponent? AOU

13 T103 Chapter 3

14 REVIEW OF ESSENTIAL TERMS AND CONCEPTS 1. Why is an understanding of Boolean algebra important to computer scientists? 2. Which Boolean operation is referred to as a Boolean product? 3. Which Boolean operation is referred to as a Boolean sum? 4. Create truth tables for the Boolean operators OR, AND, and NOT. 5. What is the Boolean duality principle? 6. Why is it important for Boolean expressions to be minimized in the design of digi- tal circuits? 7. What is the relationship between transistors and gates? 8. Name the four basic logic gates. 9. What are the two universal gates described in this chapter? Why are these universal gates important? 10. Describe the operation of a ripple-carry adder. Why are ripple-carry adders not used in most computers today? 11. What do we call a circuit that takes several inputs and their respective values to select one specific output line? Name one important application for these devices. 12. What kind of circuit selects binary information from one of many input lines and directs it to a single output line? AOU

15 REVIEW OF ESSENTIAL TERMS AND CONCEPTS 13. How are sequential circuits different from combinational circuits? 14. What is the basic element of a sequential circuit? 15. What do we mean when we say that a sequential circuit is edge-triggered rather than level-triggered? 16. What is feedback? 17. How is a JK flip-flop related to an SR flip-flop? 18. Why are JK flip-flops often preferred to SR flip-flops? 19. Which flip-flop gives a true representation of computer memory? AOU

16 EXERCISES 1. Construct a truth table for the following: a) xyz + (xyz) b) x(yz + x y) 2. Construct a truth table for the following: a) xyz + xyz + xyz b) (x + y)(x + z)(x + z) 3. Using DeMorgan s Law, write an expression for the complement of F if F(x,y,z) = x(y + z). 4. Using DeMorgan s Law, write an expression for the complement of F if F(x,y,z) = xy + x z + yz. 5. Using DeMorgan s Law, write an expression for the complement of F if F(w,x,y,z) = xyz (yz + x) + (wyz + x ). AOU

17 EXERCISES 6. Use the Boolean identities to prove the following: a) The absorption laws b) DeMorgan s laws 7. Is the following distributive law valid or invalid? Prove your answer. x XOR (y AND z) = (x XOR y) AND (x XOR z) 8. Show that x = xy + xy a) Using truth tables b) Using Boolean identities 9. Show that xz = (x + y)(x + y)(x + z) a) Using truth tables b) Using Boolean identities AOU

18 EXERCISES 10. Simplify the following functional expressions using Boolean algebra and its identi- ties. List the identity used at each step. a) F(x,y,z) = x y + xyz + xyz b) F(w,x,y,z) = (xy + wz)(wx + y z ) c) F(x,y,z) = (x + y)(x + y) 11. Simplify the following functional expressions using Boolean algebra and its identi- ties. List the identity used at each step. a) x yz + xz b) ((x + y)(x + y) c) x x y 12. Simplify the following functional expressions using Boolean algebra and its identi- ties. List the identity used at each step. a) (ab + c + df)ef b) x + xy c) (xy + x z)(wx + yz ) AOU

19 EXERCISES 13. Simplify the following functional expressions using Boolean algebra and its identi- ties. List the identity used at each step. a) xy + xy b) x yz + xz c) wx + w(xy + yz ) 14. Use any method to prove the following either true or false: yz + xyz +x yz = xy + x z 15. Using the basic identities of Boolean algebra, show that: x(x + y) = xy 16. Using the basic identities of Boolean algebra, show that: x + x y = x + y 17. Using the basic identities of Boolean algebra, show that: xy + x z + yz = xy + x z AOU

20 EXERCISES 18. The truth table for a Boolean expression is shown below. Write the Boolean expression in sum-of-products form. x y z F AOU

21 EXERCISES 19. Draw the truth table and rewrite the expression below as the complemented sum of two products: xz + yz + x y 20. Given the Boolean function F(x,y,z) = x y + xyz a) Derive an algebraic expression for the complement of F. Express in sum-of-products form. b) Show that FF = 0. c) Show that F + F = Given the function F(xy,z) = xyz +x yz + xyz a) List the truth table for F. b) Draw the logic diagram using the original Boolean expression. c) Simplify the expression using Boolean algebra and identities. d) List the truth table for your answer in Part c. e) Draw the logic diagram for the simplified expression in Part c. 22. Construct the XOR operator using only AND, OR, and NOT gates. 23. Construct the XOR operator using only NAND gates. Hint: x XOR y = (x y)(xy) AOU

22 EXERCISES 24. Draw the combinational circuit that directly implements the following Boolean expression: F(x,y,z) = xz + (xy + z ) 25. Draw the combinational circuit that directly implements the following Boolean expression: F(x,y,z) = (xy XOR (y + z )) + x z 26. How many inputs does a decoder have if it has 32 outputs? 27. How many control bits does a multiplexer have if it has 16 inputs? 28. Draw a half-adder using only NAND gates. 29. Draw a full-adder using only NAND gates. 30. Describe how each of the following circuits works and indicate typical inputs and outputs. Also provide a carefully labeled black box diagram for each. a) Decoder b) Multiplexer AOU

23 EXERCISES 31. Find the expression and draw truth table that describes the following circuits: x y z F x y z F x y F z AOU

24 T103 Chapter 4

25 REVIEW OF ESSENTIAL TERMS AND CONCEPTS 1. What is the function of a CPU? 2. What purpose does a datapath serve? 3. What does the control unit do? 4. Where are registers located and what are the different types? 5. How does the ALU know which function to perform? 6. What is the difference between a point-to-point bus and a multipoint bus? 7. Why is a bus protocol important? 8. Explain the differences between data buses, address buses, and control buses. 9. Name three different types of buses and where you would find them. 10. Explain the difference between clock cycles and clock frequency. 11. What is the function of an I/O interface? 12. Explain the difference between memory-mapped I/O and instructionbased I/O. 13. What is the difference between a byte and a word? What distinguishes each? 14. Explain the difference between byte-addressable and wordaddressable. AOU

26 REVIEW OF ESSENTIAL TERMS AND CONCEPTS 15. How does a maskable interrupt differ from a nonmaskable interrupt? 16. Why is it that if MARIE has 4K words of main memory, addresses must have 12 bits? 17. Explain the functions of all of MARIE s registers. 18. What is an opcode? 19. Explain how each instruction in MARIE works. 20. How does a machine language differ from an assembly language? Is the conversion one-to-one (one assembly instruction equals one machine instruction)? 21. What is the significance of RTN? 22. Is a microoperation the same thing as a machine instruction? 23. How does a microoperation differ from a regular assembly language instruction? 24. Explain the steps of the fetch-decode-execute cycle. AOU

27 Exercises 1. What are the main functions of the CPU? 2. Explain what the CPU should do when an interrupt occurs. Include in your answer the method the CPU uses to detect an interrupt, how it is handled, and what happens when the interrupt has been serviced. 3. How many bits would you need to address a 2M x 32 memory if a) The memory is byte-addressable? b) The memory is word-addressable? 4. How many bits are required to address a 4M x 16 main memory if a) Main memory is byte-addressable? b) Main memory is word-addressable? 5. How many bits are required to address a 1M x 8 main memory if a) Main memory is byte-addressable? b) Main memory is word-addressable? AOU

28 Exercises 6. A digital computer has a memory unit with 24 bits per word. The instruction set consists of 150 different operations. All instructions have an operation code part (opcode) and an address part (allowing for only one address). Each instruction is stored in one word of memory. a) How many bits are needed for the opcode? b) How many bits are left for the address part of the instruction? c) What is the maximum allowable size for memory? What is the largest unsigned binary number that can be accommodated in one word of memory? 7. Assume a 2 20 byte memory: a) What are the lowest and highest addresses if memory is byteaddressable? b) What are the lowest and highest addresses if memory is wordaddressable, assuming a 16-bit word? c) What are the lowest and highest addresses if memory is wordaddressable, assuming a 32-bit word? AOU

29 Exercises 8. Explain the steps in the fetch-decode-execute cycle. Your explanation should include what is happening in the various registers. 9. Explain why, in MARIE, the MAR is only 12 bits wide while the AC is 16 bits wide. 10. List the hexadecimal code for the following program (hand assemble it). What does this code do in general? Hex Address Label Instruction 100 Load A 101 Add One 102 Jump S1 103 S2, Add One 104 Store A 105 Halt 106 S1, Add A 107 Jump S2 108 A, HEX One, HEX 0001 AOU

30 Exercises 11. Decipher the following MARIE machine language instructions (write the assembly language equivalent): ; ; Write the following code segment in MARIE s assembly language: if X > 1 then Y := X + X; X := 0; endif; Y := Y + 1; AOU

31 Exercises 13. Write the following code segment in MARIE assembly language: X := 1; while X < 10 do X := X + 1; endwhile; 14. Write the following code segment in MARIE assembly language: Sum := 0; for X := 1 to 10 do Sum := Sum + X; AOU

32 T103 Chapter 5

33 REVIEW OF ESSENTIAL TERMS AND CONCEPTS 1. Explain the difference between register-to-register, register-to-memory, and memory-to-memory instructions. 2. Several design decisions exist with regard to instruction sets. Name four and explain. 3. What is an expanding opcode? 4. If a byte-addressable machine with 32-bit words stores the hex value , indicate how this value would be stored on a little endian machine and on a big endian machine. Why does endian-ness matter? 5. We can design stack architectures, accumulator architectures, or general-purpose register architectures. Explain the differences between these choices and give some situations where one might be better than another. 6. How do memory-memory, register-memory, and load-store architectures differ? 7. How are they the same? 8. What are the pros and cons of fixed-length and variable-length instructions? Which is currently more popular? AOU

34 REVIEW OF ESSENTIAL TERMS AND CONCEPTS 10. How does an architecture based on zero operands ever get any data values from memory? 11. Which is likely to be longer (have more instructions): a program written for a zero- address architecture, a program written for a one-address architecture, or a program written for a two-address architecture? Why? 12. Name the seven types of data instructions and explain each. 13. What is an address mode? 14. Give examples of immediate, direct, register, indirect, register indirect, and indexed addressing. 15. How does indexed addressing differ from based addressing? AOU

35 Exercises 1. Assume you have a machine that uses 32-bit integers and you are storing the hex value 1234 at address 0: a) Show how this is stored on a big endian machine. b) Show how this is stored on a little endian machine. c) If you wanted to increase the hex value to , which byte assignment would be more efficient, big or little endian? Explain your answer. 2. Show how the following values would be stored by machines with 32-bit words, using little endian and then big endian format. Assume each value starts at address Draw a diagram of memory for each, placing the appropriate values in the correct (and labeled) memory locations. a) A1 16 b) A 16 c) AOU

36 Exercises 3. The first two bytes of a 2M x 16 main memory have the following hex values: Byte 0 is FE Byte 1 is 01 If these bytes hold a 16-bit two s complement integer, what is its actual decimal value if: a) memory is big endian? b) memory is little endian? 4. What kinds of problems do you think endian-ness can cause if you wished to transfer data from a big endian machine to a little endian machine? Explain. 5. A computer has 32-bit instructions and 12-bit addresses. Suppose there are address instructions. How many 1-address instructions can be formulated? Explain your answer. AOU

37 Exercises 6. a) In a computer instruction format, the instruction length is 11 bits and the size of an address field is 4 bits. Is it possible to have 5 2-address instructions 45 1-address instructions 32 0-address instructions using the format? Justify your answer. b) Assume that a computer architect has already designed 6 twoaddress and 24 zero-address instructions using the instruction format given in Problem 11. What is the maximum number of one-address instructions that can be added to the instruction set? 7. What is the difference between using direct and indirect addressing? Give an ex- ample. AOU

38 Exercises 8. Suppose we have the instruction Load Given that memory and register R1 contain the values below: Assuming R1 is implied in the indexed addressing mode, determine the actual value loaded into the accumulator and fill in the table below: AOU

39 Exercises 9. A digital computer has a memory unit with 24 bits per word. The instruction set consists of 150 different operations. All instructions have an operation code part (opcode) and an address part (allowing for only one address). Each instruction is stored in one word of memory. a) How many bits are needed for the opcode? b) How many bits are left for the address part of the instruction? c) What is the maximum allowable size for memory? d) What is the largest unsigned binary number that can be accommodated in one word of memory? 10. The memory unit of a computer has 256K words of 32 bits each. The computer has an instruction format with 4 fields: an opcode field; a mode field to specify 1 of 7 addressing modes; a register address field to specify 1 of 60 registers; and a memory address field. Assume an instruction is 32 bits long. Answer the following: a) How large must the mode field be? b) How large must the register field be? c) How large must the address field be? d) How large is the opcode field? AOU

40 T103 Chapter 6

41 REVIEW OF ESSENTIAL TERMS AND CONCEPTS 1. Which is faster, SRAM or DRAM? 2. What are the advantages of using DRAM for main memory? 3. Name three different applications where ROMs are often used. 4. Explain the concept of a memory hierarchy. Why did your authors choose to represent it as a pyramid? 5. Explain the concept of locality of reference and state its importance to memory systems. 6. What are the three forms of locality? 7. Which of L1 or L2 cache is faster? Which is smaller? Why is it smaller? 8. Cache is accessed by its, whereas main memory is accessed by its. AOU

42 REVIEW OF ESSENTIAL TERMS AND CONCEPTS 9. What are the three fields in a direct mapped cache address? How are they used to access a word located in cache? 10. How does associative memory differ from regular memory? Which is more expensive and why? 11. Explain how fully associative cache is different from direct mapped cache. 12. Explain how set associative cache combines the ideas of direct and fully associative cache. 13. Direct mapped cache is a special case of set associative cache where the set size is So fully associative cache is a special case of set associative cache where the set size is. 15. What are the three fields in a set associative cache address and how are they used to access a location in cache? AOU

43 Exercises 1. Suppose a computer using direct mapped cache has 2 20 words of main memory and a cache of 32 blocks, where each cache block contains 16 words. a) How many blocks of main memory are there? b) What is the format of a memory address as seen by the cache, that is, what are the sizes of the tag, block, and word fields? c) To which cache block will the memory reference 0DB63 16 map? 2. Suppose a computer using direct mapped cache has 2 32 words of main memory and a cache of 1024 blocks, where each cache block contains 32 words. a) How many blocks of main memory are there? b) What is the format of a memory address as seen by the cache, that is, what are the sizes of the tag, block, and word fields? c) To which cache block will the memory reference FA 16 map? AOU

44 Exercises 3. Suppose a computer using fully associative cache has 2 16 words of main memory and a cache of 64 blocks, where each cache block contains 32 words. a) How many blocks of main memory are there? b) What is the format of a memory address as seen by the cache, that is, what are the sizes of the tag and word fields? c) To which cache block will the memory reference F8C9 16 map? 4. Suppose a computer using fully associative cache has 2 24 words of main memory and a cache of 128 blocks, where each cache block contains 64 words. a) How many blocks of main memory are there? b) What is the format of a memory address as seen by the cache, that is, what are the sizes of the tag and word fields? c) To which cache block will the memory reference 01D map? 5. Assume a system s memory has 128M words. Blocks are 64 words in length and the cache consists of 32K blocks. Show the format for a main memory address assuming a 2-way set associative cache mapping scheme. Be sure to include the fields as well as their sizes. AOU

45 Exercises 6. A 2-way set associative cache consists of four sets. Main memory contains 2K blocks of eight words each. a) Show the main memory address format that allows us to map addresses from main memory to cache. Be sure to include the fields as well as their sizes. 7. Suppose a word-addressable computer using set associative cache has 2 16 words of main memory and a cache of 32 blocks, and each cache block contains 8 words. a) If this cache is 2-way set associative, what is the format of a memory address as seen by the cache, that is, what are the sizes of the tag, set, and offset fields? b) If this cache is 4-way set associative, what is the format of a memory address as seen by the cache? AOU

46 Exercises 8. Suppose a byte-addressable computer using set associative cache has 2 21 words of main memory and a cache of 64 blocks, where each cache block contains 4 words. a) If this cache is 2-way set associative, what is the format of a memory address as seen by the cache, that is, what are the sizes of the tag, set, and offset fields? b) If this cache is 4-way set associative, what is the format of a memory address as seen by the cache? 9. Consider a byte-addressable computer with 24-bit addresses, a cache capable of storing a total of 64KB of data, and blocks of 32 bytes. Show the format of a 24-bit memory address for: a) direct mapped b) associative c) 4-way set associative AOU