Combinational circuits

Transcription

1 omputer Architecture: A onstructive Approach Sequential ircuits Arvind omputer Science & Artificial Intelligence Lab. Massachusetts Institute of Technology Revised February 21, 212 (Slides from #16 onwards) L3-1 ombinational circuits A A 1 A n-1 Sel lg(n) Sel lg(n) O O 1 O. O.. A Mux emux.. O n-1 OpSelect A lg(n) eco oder. O O 1 O n-1 A B ALU - Add, Sub,... - And, Or, Xor, Not,... - GT, LT, E, Zero,... Result omp? Such circuits have no cycles (feedback) or state L3-2 1

2 A simple synchronous state element Edge-Triggered Flip-flop Metastability ata is sampled at the rising edge of the clock L3-3 Flip-flops with Write Enables EN EN dangerous! EN EN 1 ata is captured only if EN is on L3-4 2

3 Registers En Register: A group of flip-flops with a common clock and enable Register file: A group of registers with a common clock, input and output port(s) L3-5 Register Files lock WE ReadSel1 ReadSel2 WriteSel Writeata Register file 2R + 1W Readata1 Readata2 WSel Wata RSel1 WE register RSel2 Rata1 register 1 Rata2 No timing issues in reading a selected register L3-6 3

4 Register Files and Ports WE ReadSel1 ReadSel2 WriteSel Writeata ReadSel R/WSel Register file 2R + 1W WE Register file 1R + 1R/W Readata1 Readata2 Readata R/Wata Ports were expensive multiplex a port for read & write L3-7 We can build useful and compact circuits using registers Example: Multiplication by repeated addition L3-8 4

5 Multiplication by repeated addition b Multiplicand 111 (13) a Muliplier * 111 (11) (143) a2 a1 a m2 m1 m add4 add4 mi = (a[i]==)? : b; a3 m3 add4 L3-9 ombinational 32-bit multiply function Bit#(64) mul32(bit#(32) a, Bit#(32) b); Bit#(32) prod = ; Bit#(32) tp = ; for(integer i = ; i < 32; i = i+1) begin Bit#(32) m = (a[i]==)? : b; Bit#(33) sum = add32(m,tp,); prod[i] = sum[]; tp = truncatelsb(sum); end return {tp,prod}; endfunction L3-1 5

6 esign issues with combinational multiply Lot of hardware 32-bit multiply uses 31 addn circuits Long chains of gates 32-bit ripple carry adder has a 31 long chain of gates 32-bit multiply has 31 ripple carry adders in sequence! The speed of a combinational circuit is determined by its longest input-to-output path L3-11 Expressing a loop using registers function Bit#(64) mul32(bit#(32) a, Bit#(32) b); Bit#(32) prod = ; Bit#(32) tp = ; for(integer i = ; i < 32; i = i+1) begin Bit#(32) m = (a[i]==)? : b; Bit#(33) sum = add32(m,tp,); prod[i] = sum[]; tp = truncatelsb(sum); end return {tp,prod}; endfunction Need registers to hold a, b, tp prod and i Update the registers every cycle until we are done L3-12 6

7 Expressing a loop using registers for(integer i = ; i < 32; i = i+1) begin let s = f(s); end return s; f s +1 s i (init ) <32 L3-13 Sequential multiply Reg#(Bit#(32)) a <- mkregu(); Reg#(Bit#(32)) b <- mkregu(); Reg#(Bit#(32)) prod <-mkregu(); Reg#(Bit#(32)) tp <- mkregu(); Reg#(Bit#(6)) i <- mkreg(32); state elements rule mulstep if (i < 32); Bit#(32) m = (a[i]==)? : b; Bit#(33) sum = add32(m,tp,); prod[i] <= sum[]; tp <= sum[32:1]; i <= i+1; endrule So that the rule won t fire until i is set to some other value a rule to describe dynamic behavior L3-14 7

8 ynamic selection requires a mux i aa[i] >> a a[],a[1],a[2], L3-15 Replacing repeated selections by shifts Reg#(Bit#(32)) a <- mkregu(); Reg#(Bit#(32)) b <- mkregu(); Reg#(Bit#(32)) prod <-mkregu(); Reg#(Bit#(32)) tp <- mkregu(); Reg#(Bit#(6)) i <- mkreg(32); rule mulstep if (i < 32); Bit#(32) m = (a[]==)? : b; a <= a >> 1; Bit#(33) sum = add32(m,tp,); prod <= {sum[], (prod >> 1)[3:]}; tp <= sum[32:1]; i <= i+1; endrule L3-16 8

9 Sequential Multiply bin ain b +1 << i a tp s2 s2 s2 s2 == 32 31: & & add 32:1 31 prod << [3:] done = start_en s2 = start_en!done result (high) result (low) L3-17 Multiply Module implicit conditions Int#(32) Int#(32) en Int#(64) st tart result Multiply module interface Multiply; method Action start (Int#(32) a, Int#(32) b); method Int#(64) result(); endinterface Many dierent implementations can provide the same interface: module mkmultiply (Multiply) L3-18 9

10 External interface Multiply Module module mkmultiply32 (Multiply32); Reg#(Bit#(32)) a <- mkregu(); Reg#(Bit#(32)) b <- mkregu(); Reg#(Bit#(32)) prod <-mkregu(); Reg#(Bit#(32)) tp <- mkregu(); Reg#(Bit#(6)) i <- mkreg(32); rule mulstep if (i < 32); Bit#(32) m = (a[]==)? : b; Bit#(33) sum = add32(m,tp,); prod <= {sum[], (prod >> 1)[3:]}; tp <= sum[32:1]; a <= a >> 1; i <= i+1; State Internal behavior endrule method Action start(bit#(32) ain, Bit#(32) bin) if (i == 32); a <= ain; b <= bin; i <= ; tp <= ; prod <= ; endmethod method Bit#(64) result() if (i == 32); return {tp,prod}; endmethod endmodule February 15, 212 L3-19 Module: Method Interface ain bin en result start ult res +1 << ain bin b & & i a tp s2 s2 s2 s2 31: 32:1 add prod << 31 [3:] == 32 result (high) result (low) done OR s2 = start_en s2 = start_en!done L3-2 1

11 Polymorphic Multiply Module implicit conditions n n Int#(32) Int#(32) enab Tadd(n+n) Int#(64) #(Numeric type n) st tart result Multiply module n could be Int#(32), Int#(13),... interface Multiply; n n method Action start (Int#(32) a, Int#(32) b); TAdd#(n,n) method Int#(64) result(); endinterface The module can easily be made polymorphic January 11, L2-21 Sequential n-bit multiply module mkmultiplyn (MultiplyN); Reg#(Bit#(n)) a <- mkregu(); Reg#(Bit#(n)) b <- mkregu(); Reg#(Bit#(n)) prod <-mkregu(); Reg#(Bit#(n)) tp <- mkregu(); Reg#(Bit#(Add#(Tlog(n),1)) i <- mkreg(n); nv = valueof(n); rule mulstep if (i < nv); Bit#(n) m = (a[]==)? : b; Bit#(TAdd#(n,1)) sum = addn(m,tp,); prod <= {sum[], (prod >> 1)[(nv-2):]}; tp <= sum[n:1]; a <= a >> 1; i <= i+1; endrule method Action start(bit#(n) ain, Bit#(n) bin) if (i == nv); a <= ain; b <= bin; i <= ; tp <= ; prod <= ; endmethod method Bit#(TAdd#(n,n)) result() if (i == nv); return {tp,prod}; endmethod endmodule February 15, 212 L