Generation System Advanced Seminar on Compilation and Run-time Systems for Object-Oriented Languages. David Bélanger

Transcription

1 VCODE: A Fast Dynamic Code Generation System Advanced Seminar on Compilation and Run-time Systems for Object-Oriented Languages David Bélanger dbelan2@cs.mcgill.ca McGill University Montreal, QC VCODE: A Fast Dynamic Code Generation System p.1/39

2 References References [D.R. Engler and Kaashoek, 1995] D.R. Engler, W. H. and Kaashoek, M. (1995). C: A language for high-level, efficient, and machine-independent dynamic code generation. In Proceedings of the 22th annual symposium on principles of programming languages. [Engler, 1996a] Engler, D. (1996a). VCODE: A retargetable, extensible, very fast dynamic code generation system. In Proceedings of the SIGPLAN 1996 PLDI. [Engler, 1996b] Engler, D. (1996b). A vcode tutorial. [Engler and Proebsting, 1994] Engler, D. and Proebsting, T. (1994). DCG: An efficient, retargetable dynamic code generation system. In Proceedings of ASPLOS-VI, pages VCODE: A Fast Dynamic Code Generation System p.2/39

3 Overview Introduction System Overview Instruction Set Client/VCODE Interface Code Generation Limitations Results Conclusion and Further Work VCODE: A Fast Dynamic Code Generation System p.3/39

4 Introduction Dynamic Code Generation: generating code at run-time Applications: Speed up in interpreted languages (ex: JIT compilers for Java) Perform optimizations based on values known at run-time Specialized functions (ex: ) Difficult to implement, not much tools available Most code generation systems are either non-portable or language specific VCODE is portable, language independent and efficient. VCODE: A Fast Dynamic Code Generation System p.4/39

5 Previous Work Smalltalk-80 code generation system done by ParcPlace DCG (VCODE is simpler and about 35 times faster) C (tick C): Superset of C for dynamic code generation. Uses DCG as back-end. Method Inst. executed/instr. generated gcc + dynamic linking DCG 350 VCODE 6-10 Table 1: Approximate Code Generation Cost VCODE: A Fast Dynamic Code Generation System p.5/39

6 VCODE System Overview Consists of a set of C macros and functions Dynamic (at run-time) code generation Compilation unit: a function VCODE machine interface: idealized load-store RISC architecture Retargetable: Relatively simple to port to new architectures About 1 to 4 days required to port to a RISC architecture. Currently: MIPS, SPARC, Alpha VCODE: A Fast Dynamic Code Generation System p.6/39

7 VCODE System Overview Very fast: A single pass + patching in-place code generation No intermediate data structures 6 to 10 instructions per instruction High-level language translated can be any. VCODE: A Fast Dynamic Code Generation System p.7/39

8 Instruction Set Similar to RISC instructions Most instructions directly maps to a single assembly instruction. Examples: add, sub, and, j Register or immediate operands Instructions are typed VCODE: A Fast Dynamic Code Generation System p.8/39

9 VCODE Types Type C equivalent v void c signed char uc unsigned char s signed short us unsigned short i int u unsigned p void * l long ul unsigned long f float d double Table 2: VCODE types (from [Engler, 1996a]) VCODE: A Fast Dynamic Code Generation System p.9/39

10 Instruction Types Not all operations have a version for all types. Reg-Reg ops take only the wider types (int, long,...) Reduces number of VCODE instructions Most architectures do not support them Types may not all be distincts on some architectures. Example: i and l are both 32-bit integers on 32-bit architectures. Instructions to convert types: cvx2y Only for types i, u, l, ul, p, f, d Not all combinations available VCODE: A Fast Dynamic Code Generation System p.10/39

11 Instruction Naming Each VCODE instruction has a corresponding C macro/function. The macro/function name is constructed by: Adding the prefix v to the instruction name. Appending the type code (ex: i for integer) Appending i if it is the immediate version. Example: add integer immediate is macro v addii. VCODE: A Fast Dynamic Code Generation System p.11/39

12 Layers Instructions are divided in two groups: Core Layer: Fundamental instructions that must be implemented by each architecture supported. Includes basic instructions such as add, ld (load) and j (jump). Extension Layers: Sets of instructions that are expressed in terms of the core instructions. Ex: lt (less than), ntoh (network-to-host order), floor. Note: For efficiency reasons, instructions from the extension layer should be implemented directly if the hardware supports them. VCODE: A Fast Dynamic Code Generation System p.12/39

13 Core Instructions Standard Binary Operations (rd, rs1, {rs2 or imm a }) Inst. Types Notes add, sub i u l ul p f d mul, div i u l ul f d mod, and, or, i u l ul (rsh: sign bit propagated xor, lsh, rsh for signed types) Standard Unary Operations (rd, rs) Instructions Types Notes com, not i u l ul bit complement, logical not mov i u l ul p f d copy rs to rd neg i u l ul f d negation cvi2, cvu convert types cvl2, etc. a Note: Immediate cannot be of type f or d VCODE: A Fast Dynamic Code Generation System p.13/39

14 Core Instructions Memory Operations (rd, rs, offset a ) Instructions Types Notes ld c uc s us i u l ul p f d load st c uc s us i u l ul p f d store Return to Caller (rs) Instructions Types Notes ret v i u l ul p f d return value Instructions Types Notes Jumps (addr) j v p jump to imm, reg or label jal v p jump and link to imm, reg or label a Note: offset cannot be of type f or d. VCODE: A Fast Dynamic Code Generation System p.14/39

15 Core Instructions Branches (rs1, {rs2 or imm a }, label) Instructions Types Notes blt i u l ul p f d branch if less than ble i u l ul p f d branch if less than equal bgt i u l ul p f d branch if greater than bge i u l ul p f d branch if greater than equal beq i u l ul p f d branch if equal bne i u l ul p f d branch if not equal Nullary Operation Instructions Types Notes nop no operation a Note: imm cannot be of type f or d. VCODE: A Fast Dynamic Code Generation System p.15/39

16 Primary Extensions Binary Operations (rd, rs1, rs2 {or imm a }) lt, le, gt, ge, eq, ne nand, nor, nxor mulhi (high bits of product) Network Extensions (rd, rs) ntoh, hton, bswap (byteswap) Unary Operations (rd, rs) abs, sqrt, ceil, floor Etc. a Note: imm cannot be of type f or d VCODE: A Fast Dynamic Code Generation System p.16/39

17 Example 1 - hello.c #include <stdio.h> #include "vcode.h" /* This header file defines all vcode instr. */ int main(void) { static v_code insn[1000]; /* Memory to hold code in. */ /* Create a function to print standard greeting. */ v_lambda("hello-world", "", 0, V_NLEAF, insn, sizeof insn); /* Generate simple call to printf. */ v_scallv((v_vptr)printf, "%P", "hello, world\n"); v_end(0).v(); /* Compile & call */ return 0; } Example from [Engler, 1996b] VCODE: A Fast Dynamic Code Generation System p.17/39

18 v lambda v_lambda(char *name, char *fmt, v_reg_type *args, int leaf, v_code *ip, int nbytes); Ex: v_lambda("hello-world", "", 0, V_NLEAF, insn, sizeof insn); Initiate a new dynamically generated function. name: Function name. fmt: List of args as a type string. Ex: "%i". Note: VCODE type symbols used. args: Registers for arguments. leaf: V LEAF if a leaf procedure, V NLEAF otherwise. ip: Array where the instructions are stored. nbytes: Size of the instruction array. VCODE: A Fast Dynamic Code Generation System p.18/39

19 v scallv void v_scallv(v_vptr ptr, char *fmt,...); Ex: v_scallv((v_vptr)printf, "%P", "hello, world\n"); ptr: A function pointer to the function to call. (Note: Could be a dynamically generated function) fmt: Specify args types. Note: P used to specify immediate, p would be used to specify a register.... : The arguments. VCODE: A Fast Dynamic Code Generation System p.19/39

20 v end union v_fp v_end(int *nbytes); Ex: v_end(0); v end marks the termination of the function. nbytes: If non-null, the number of bytes used by the function is stored there. Returns a union of function pointers. One member for each VCODE type. v end(0).v(): Calls it. VCODE: A Fast Dynamic Code Generation System p.20/39

21 Example 2 - mkplus1 typedef int (*iptr)(int); iptr mkplus1(v_code *ip, int nbytes) { v_reg arg[1]; v_lambda("plus", "%i", arg, V_LEAF, ip, nbytes); v_addii(arg[0], arg[0], 1); /* ADD Integer Immediate */ v_reti(arg[0]); /* RETurn Integer */ return (iptr)v_end(0); } Example from [Engler, 1996b] Makes int plus1(int x) return x + 1; VCODE: A Fast Dynamic Code Generation System p.21/39

22 Delay Slot Scheduling For MIPS, code generated is: addiu a0, a0, 1 # increment j ra # return move v0, a0 # set return register # with result Note: Last instruction fills the delay slot. Note: Not the the most efficient. Could store result directly in v0. VCODE: A Fast Dynamic Code Generation System p.22/39

23 Client/VCODE Interface Client programs uses VCODE instructions via macro and function calls. Client is basically a compiler front-end. VCODE library is a fast code generation back-end. VCODE does no global optimizations, it is up to the client program to do them. VCODE has a very local view. Goal is to have fast code generation. Code is generated immediately (or almost) by macros/functions. VCODE: A Fast Dynamic Code Generation System p.23/39

24 Register Allocation Client can: Set priority to registers (allocated in that order) Set class of register 2 classes supported temporary perstistent across procedure calls (stored) Error returned if client request a register and none left. Client must take care of keeping variables on the stack. VCODE: A Fast Dynamic Code Generation System p.24/39

25 Example from Tutorial - Power /* Power: raise base to n-th power: n > 0; runtime constant n. */ v_fptr specialize_power(int n) { v_reg_type x, sum; v_lambda("power", "%d", &x, V_LEAF, malloc(512), 512); { int i; /* Allocate accumulator */ v_getreg(&sum, V_D, V_TEMP); v_movf(sum, x); /* initialize sum */ /* Specialize power to xˆn by unrolling the loop to multiply x n times: (x * x *... * x). */ for(i = 0; i < n - 1; i++) v_mulf(sum, sum, x); } v_retf(sum); /* return x ˆ n */ } return v_end(0).f; /* return pointer to result. */ VCODE: A Fast Dynamic Code Generation System p.25/39

26 Example from Tutorial - Branch int main(void) { static v_code insn[1000]; /* Memory to hold code in. */ v_vptr vp; v_reg_type x; v_lambda("branch", "%i", &x, V_NLEAF, insn, sizeof insn); { v_label_type true, end; true = v_genlabel(); /* allocate two labels */ end = v_genlabel(); /* test whether x is equal to 5 */ v_beqii(x, 5, true); v_scallv((v_vptr)printf, "%P", "Arg is not equal to 5\n"); v_jv(end); /* jump over else */ v_label(true); v_scallv((v_vptr)printf, "%P", "Arg is equal to 5\n"); v_label(end); v_retv(); } vp = v_end(0).v; vp(5); vp(6); /* test */ return 0; } VCODE: A Fast Dynamic Code Generation System p.26/39

27 Code Generation 1. Instruction Selection 2. Binary Code Emission 3. Jump Resolution Step 1 and 2 are done where VCODE instruction created for almost all instructions. Step 3 is done in v end. VCODE: A Fast Dynamic Code Generation System p.27/39

28 Challenges of in-place CG in-place : single pass + patching No global knowledge about function Unknown number of locals Unknown amount of space to save registers Unknown number of instructions Don t know if leaf procedure (if it wouldn t be specified) Four challenges VCODE: A Fast Dynamic Code Generation System p.28/39

29 C1 Unknown Activation Record Size Required to compute offsets To save/restore registers For locals on stack Possible Solution 1: Client tells that info at initialization Reduces flexibility (info required at that time) Reduce efficiency in that 2 passes required 1 pass by client to compute number of locals 1 pass to generate VCODE Possible Solution 2 (VCODE solution): Allocate space to save all registers Register offsets will be known Offsets of locals known as they get allocated Typical RISC (32 32-bit int registers and 32 FP registers): 64 words reserved. VCODE: A Fast Dynamic Code Generation System p.29/39

30 Activation Record 64 words reserved to save registers sp Space for locals will be allocated here VCODE: A Fast Dynamic Code Generation System p.30/39

31 C2 Saving Callee-saved Registers Problem: VCODE doesn t know how many registers (and which ones) need to be saved. Solution: Reserve space in the instruction stream to save all registers (function prologue). Done in v lambda. While generating code, put jumps to epilogue (label) on function exit points When done (i.e. in v end) Write epilogue (if needed) Patch forward jumps. Write prologue. Fill unused space with nops. Amount of space used: 64 words (assuming 32 ints, 32 floats) VCODE: A Fast Dynamic Code Generation System p.31/39

32 Instruction Stream Reserved for register save instructions (64 words) Reserved for register save instructions (64 words) add t0, a0, a1 add s0, a0, a0 j EPILOGUE j EPILOGUE After v_lambda During code generation VCODE: A Fast Dynamic Code Generation System p.32/39

33 C3 Leaf Procedure Note: Many optimizations may be done on them. Problem: Don t know for sure if it is a leaf until done generating code. Solution: Specify it at initialization (i.e. in v lambda) Error generated if leaf declared and attempt to do a call VCODE may add function calls internally Software division routine Implementation would simply ignore the hint VCODE: A Fast Dynamic Code Generation System p.33/39

34 C4 Floating Point Immediates Problem: On most architecture, FP instructions do not take immediate operands. Space needs to be allocated and reclaimed for them. Solution: Simply put them at the end of the function VCODE: A Fast Dynamic Code Generation System p.34/39

35 Improving Efficiency / More Control A client can: Dynamically change the register class Callee-saved Caller-saved Unavailable Specify an instruction for a branch delay slot. Correctly handled if underlying architecture has no delay slot. Loads: Macro that takes cycle count before value can be used, nops inserted if necessary VCODE: A Fast Dynamic Code Generation System p.35/39

36 Limitations No symbolic debugger Limited register Virtual registers will be added Usually not a problem to let client manage them No peephole optimizer No instruction scheduler Small issue: hardware scheduling VCODE: A Fast Dynamic Code Generation System p.36/39

37 Results Filter Notes Time (ms) MPF Widely used 35.0 PATHFINDER Was the fastest 19.0 DPF Implemented with VCODE 1.5 Table 3: Average time to filter TCP/IP packets VCODE: A Fast Dynamic Code Generation System p.37/39

38 Results Machine Method copy + checksum copy + checksum + byte swap DEC3100 separate / uncached separate C integrated ASH DEC5000 separate / uncached separate C integrated ASH Table 4: Cost of integrated and non-integrated memory operations. Times are in ms VCODE: A Fast Dynamic Code Generation System p.38/39

39 Conclusion and Further Work Possible to have both portability and efficiency. VCODE is an effective DCG for interpreters and specialized functions. Further Work Add simple optimizations (such as peepholes) Add support for unlimited virtual registers Implement a portable JIT for SableVM VCODE: A Fast Dynamic Code Generation System p.39/39