Kintex-7: Hardware Co-simulation and Design Using Simulink and Sysgen

Transcription

1 Kintex-7: Hardware Co-simulation and Design Using Simulink and Sysgen Version 1.2 April 19, 2013

2 Revision History Version Date Author Comments Version Date Author(s) Comments on Versions No Completed 1.0 4/15/2013 Richard Document created /18/2013 Richard Fixed and added links in Other Resources /19/2013 Richard Added info on cable drivers. Formatting. 2

3 Table of Contents Revision History... 2 Table of Contents Starting Simulink with Sysgen Creating a Simulink Model for Co-simulation Accessing Shared Memories from MATLAB Other Resources

4 1 Starting Simulink with Sysgen You will need to copy the cable driver plugin to your home directory before you can program and communicate with the Kintex-7 eval board (KC705): cp -r /home/rdorrance/.cse/. To run System Generator for ISE 14.3 with Simulink in MATLAB R2011a, you first need to source the Xilinx toolset: source /opt/xilinx/14.3/ise_ds/settings64.sh To launch System Generator type: sysgen This will launch MATLAB and run the necessary startup files. Once finished you should see: Installed System Generator dynamically. Using ISE enable System Generator. To launch Simulink from MATLAB: simulink 4

5 2 Creating a Simulink Model for Co-simulation First create a new Simulink model file (.mdl): File New Model (Ctrl + N) Save the file to a folder called tutorial and name it tut1.mdl. Next add the System Generator block to the model file from the library browser: Xilinx Blockset Basic Elements System Generator 5

6 Next double click the system generator block to open up the configuration menu. In the Compilation menu select: Compilation Hardware Co-Simulation KC705 JTAG Click the settings tab for the Compilation menu and change the clock frequency to 100MHz. 6

7 Now create the following model using Xilinx blocks. List of blocks used: Gateway In: This block is used to define the inputs to the Xilinx block system. It converts MATLAB doubles into either fixed or floating point values for a specified bit width. Gateway Out: This block is used to define the outputs of the Xilinx block system to Simulink. Shared Memory: A shared BRAM whose memory space is accessible by the host computer. You can specify the data type, memory size, latency, and read/write functionality of block. From Register: This is a shared software addressable register that is accessible by the host computer. Use this to specify data from the host computer to the FPGA. To Register: This is a shared software addressable register that is accessible by the host computer. Use this to specify data from the FPGA to the host computer. Constant: There are both Xilinx and MATLAB Simulink version of this block. This is used to specify a numerical constant. Terminator: Connect this block to unused output ports to prevent simulation/compilation errors. 7

8 For this demo, change the name of the shared memory to bram0 and the depth to 1024 under the Basic menu. Also check Specify explicit output type and select Floating-point in the Output menu. Change the name of the From Register to reg0 and its output type to Floating-point as well. Similarly, change the To Register s name to reg1 and the type to Floating-point. Next change addr to a fixed-point 10-bit unsigned number, din_bram to floating-point (single precision), and we to Boolean. Save and click the generate button in the System Generator block. This will generate a bit file (tut1_cw.bit), a simulink block for hardware co-simulation (tut1_hwcosim_lib.mdl shown below), and a hardware co-simulation configuration file (tut1_cw.hwc). 8

9 3 Accessing Shared Memories from MATLAB An example of how to use the MATLAB interface to run hardware con-simulations in shown in tut1_matlab_interface.m. % Specifies a hardware co-simulation project file. prj = 'netlist/tut1_cw.hwc'; % Configure the co-simulation interface. Note: This needs only to be % done once, since the configuration is stored back into the hwc file % This will launch a configuration GUI. xlhwcosimconfig(prj, true); % Creates a hardware co-simulation instance from the project. h = Hwcosim(prj); % Opens and configures the hardware co-simulation interface. open(h); Select Free running for the Clock source and click OK. This will configure the FPGA and start the hardware co-simulation. 9

10 You can create shared memory objects in MATLAB that you can treat just like arrays. % Creates a shared memory instance 'bram0'. It connects the % corresponding shared memory running in hardware. bram0 = Shmem('bram0'); % Creates a shared memory instance 'reg0'. It connects the % corresponding shared memory running in hardware. reg0 = Shmem('reg0'); % Creates a shared memory instance 'reg1'. It connects the % corresponding shared memory running in hardware. reg1 = Shmem('reg1'); You can only write double-precision integer values into a shared memory (up to 32 bits per word). % Writes random numbers to memory address 0 to 49 of bram0. test_values_in_bram = round(rand(1, 50)*(2^32)); bram0(0:49) = test_values_in_bram; % Read the values from memory address 0 to 49 of bram0. test_values_out_bram = bram0(0:49); % Check for errors bram_errors = sum((test_values_out_bram - test_values_in_bram) ~= 0) To read and write to a register, you must always specify address 0. % Writes a random number to reg0. test_value_in_reg = round(rand*(2^32)); reg0(0) = test_value_in_reg; % Read the value from from reg0. test_value_out_reg = reg1(0); % Check for errors reg_errors = sum((test_value_out_reg - test_value_in_reg) ~= 0) 10

11 When you are finished you must remember to release the shared memories and the hardware co-simulation. If you forget this step, the device will be locked and the computer/fpga will need to be reset. % Releases the shared memory instances. release(bram0); release(reg0); release(reg1); % Releases the hardware co-simulation instance. release(h); 4 Other Resources M-Code Access to Hardware Co-Simulation Supporting New Boards through JTAG Hardware Co-Simulation Kintex-7 FPGA Embedded Kit on the Wiki 11