Extra-credit QUIZ Pipelining -due next time-

Size: px
Start display at page:

Download "Extra-credit QUIZ Pipelining -due next time-"

Transcription

1 QUIZ Pipelining A computer pipeline has 4 processors, as shown above. Each processor takes 15 ms to execute, and each instruction must go sequentially through all 4 processors. A program has 10 instructions. Calculate how long it takes to run it: without pipelining with pipelining 1

2 Extra-credit QUIZ Pipelining -due next time- 2

3 Low-level software Components Circuits Gates Transistors

4 Abstractions and more abstractions You are here 4

5 6.1 Computer Operations Computer = programmable electronic device that can store, retrieve, and process data Von Neumann architecture: Data and instructions to manipulate the data are represented in the same way (binary) and are stored in the same place (memory) For processing, both data and instructions have to be brought into the CPU (fetch-execute cycle) 5

6 6.2 Machine Language Machine language = The language made up of binary coded instructions built into the hardware of a particular computer and used directly by the computer Why would anyone use machine language? (Hint: they had no choice. Why?) Image source: 6

7 Remember: The Fetch-Execute Cycle According to the CPU s machine language 7

8 Characteristics of machine language: Every processor type has its own set of specific machine instructions The relationship between the processor and the instructions it can carry out is completely integrated Each machine-language instruction does only one very low-level task 8

9 Pep/8 Virtual Computer Virtual computer A hypothetical machine designed to contain the important features of a real machine Pep/8 A virtual computer designed by Stanley Warford that has 39 machine-language instructions (We re going to cover only a few of them!) 9

10 Pep/8 Virtual Computer Virtual computer Extra-credit for next time: Figure out what Pep and 8 stand for! A hypothetical machine designed to contain the important features of a real machine Pep/8 A virtual computer designed by Stanley Warford that has 39 machine-language instructions (We re going to cover only a few of them!) 10

11 Pep/8 Registers The program counter (PC) (contains the address of the next instruction to be executed) The instruction register (IR) (contains a copy of the instruction being executed) The accumulator (register A) The memory unit is made up of 65,636 Bytes of storage Can you figure out how long the Pep/8 address is? 11

12 QUIZ The previous version of Pep, Pep/7, could use only 12 bits for memory addresses. How many Bytes of memory could Pep/7 address? 12

13 24 bits 16 bits Explain the address format! 13

14 Can you show what instructions look like in memory? Explain the address format! 14

15 Instruction Format 15

16 Instruction Format Operation code, a.k.a. opcode Specifies which instruction is to be carried out Register specifier Specifies which register is to be used (only use A in this chapter) Addressing-mode specifier Says how to interpret the operand part of the instruction: Direct Immediate Say that again?!? 16

17 Instruction Format Addressing-mode specifier Says how to interpret the operand part of the instruction: Direct Immediate?? Immediate A + B Direct 17

18 Immediate and direct addressing modes 18

19 Immediate and direct addressing modes Example: ADD 42 to accumulator A What exactly am I to add? 19

20 Instruction Format Addressing modes: immediate direct Is there something we are not telling you about Pep s addressing modes? 20

21 QUIZ Pipelining A computer pipeline has 5 stages. Each stage takes 12 ns (nanosec.) to execute, and each instruction must go sequentially through all 5 stages. A program has 20 instructions. Calculate how long it takes to run it: without pipelining with pipelining 21

22 QUIZ Name all the 4 parts of the fetch-execute cycle. What do IR, A, and PC stand for in the computer s architecture? Name and explain the 2 addressing modes we ve covered. 22

23 QUIZ: Immediate and direct addressing SUB 31 from accumulator A What exactly am I to subtract? modes 23

24 PEP/8 machine instructions 24

25 What does this instruction mean, what is its hex code, and what exactly does it do? 25

26 What does this instruction mean, what is its hex code, and what exactly does it do? 26

27 What do these instructions mean, what are their hex codes, and what exactly do they do? 27

28 Wait a second... 28

29 Conclusions It is useless to write operands into IR. IR should be written only in the FETCH stage of the Fetch-Execute cycle, when the 3 bytes of the instruction are brought from memory. Operands can be written only to: Accumulator Memory Some instructions cannot have the immediate addressing mode 29

30 What do these instructions mean, what are their hex codes, and what exactly do they do? 30

31 What does this instruction mean, what is its hex code, and what exactly does it do? Why is there only one on this page?

32 32 What do these instructions mean, what are their hex codes, and what exactly do they do?

33 QUIZ Name all the 4 parts of the fetch-execute cycle. What do IR, A, and PC stand for in the computer s architecture? Name and explain the 2 addressing modes we ve covered. 33

34 Trick QUIZ: Immediate and direct addressing modes We have this Pep instruction: LOAD 20 (decimal) into accum. A What exactly am I to load? 34

35 Problem 16 / 189 The PEP/8 memory has the following contents: 0001 A FF What are the contents of reg. A after this instruction is executed: C

36 0001 A FF Instruction executed: C

37 Problem 17 / 190 The PEP/8 memory has the following contents: 0001 A FF What are the contents of reg. A after this instruction is executed: C The first step is 37

38 Problem 17 / 190 The PEP/8 memory has the following contents: 0001 A FF What are the contents of reg. A after this instruction is executed: C

39 6.3 Program to write "Hello" Every program ends with this! 39

40 Hand Simulation What is the fetch/execute cycle? How much is the PC incremented? What ASCII character is this?

41 Hand Simulation What is the fetch/execute cycle here? What ASCII character is this? 41

42 Your turn! What does this program do?

43 Steps for executing a machine-language program Machine code program in a file on disk Loader Execute Program in memory 43

44 SKIP Pep/8 Simulator 44

45 Problem 33 / 191 The PEP/8 computer has the following program in memory (in hex): Convert the program to binary and explain in your own words what it does. 45

46 Problem 33 / 191 The PEP/8 computer has the following program in memory (in hex): ?? Character input, direct mode, to memory address 0x0008 Character output, direct mode, from memory address 0x0008 STOP ASCII code of character entered by user 46

47 Code (instructions) Remember: In a Von Neumann architecture, code and data are stored in the same memory! ?? Character input, direct mode, to memory address 0x0008 Character output, direct mode, from memory address 0x0008 STOP ASCII code of character entered by user data 47

48 Fact: Writing programs in machine language sucks! (i.e. it is time-consuming, boring, errorprone, unintuitive, etc.) 48

49 that s why they invented assembly language 49

50 6.4 Assembly Language Assembly language A language that uses mnemonic codes to represent machine-language instructions Assembler A program that reads each of the instructions in mnemonic form and translates it into the machine-language equivalent 50

51 Steps for executing an assembly-language program Loader 51 Execute Program in memory

52 Pep/8 Assembly Language Opcode is 04 Opcode is 31 Opcode is 38 Opcode is 39 52

53 Hello program in assembly mnemonic operand addressing mode comments CHARO CHARO CHARO CHARO CHARO STOP.END 0x0048, i ;Outputs character 'H' 0x0065, i 0x006C, i 0x006C, i 0x006F, i What in the world is this?! 53

54 A New Program Problem: Read and sum three values and print the sum How would you do it by hand? 54

55 Declaring variables in assembly: We simply reserve space in memory for them! These are labels. They are placeholders for memory addresses - the assembler will replace them with numeric addresses when generating the machine code! 55

56 Assembler directives, a.k.a. pseudo-ops What is the difference between operations and pseudo operations? 56

57 Completed Program sum:.word 0x0000 num1:.block 2 num2:.block 2 num3:.block 2 main: LDA sum,d DECI num1,d ADDA num1,d DECI num2,d ADDA num2,d DECI num3,d ADDA num3,d STA sum,d DECO sum,d STOP.END 57

58 Completed Program Houston, we have a problem! How does the CPU know that the program starts here? sum:.word 0x0000 num1:.block 2 num2:.block 2 Num3:.BLOCK 2 main: LDA sum,d DECI num1,d ADDA num1,d DECI num2,d ADDA num2,d DECI num3,d ADDA num3,d STA sum,d DECO sum,d STOP.END 58

59 Solution: Branch instruction BR main sum:.word 0x0000 num1:.block 2 num2:.block 2 num3:.block 2 main: LDA sum, d DECI num1, d ADDA num1, d DECI num2, d ADDA num2, d DECI num3, d ADDA num3, d STA sum, d DECO sum, d STOP.END 59

60 QUIZ: Show the memory contents! BR main sum:.word 0x0000 num1:.block 2 num2:.block 2 num3:.block 2 main: LDA sum, d DECI num1, d ADDA num1, d DECI num2, d ADDA num2, d DECI num3, d ADDA num3, d STA sum, d DECO sum, d STOP.END Memory map on next slide 60

61 61

62 sum num1 num2 num3 BR LDA DECI ADDA DECI 62

63 Challenge: Write all the machine code (in hex) sum num1 num2 num3 BR LDA DECI ADDA DECI 63

64 Extra-credit sum num1 num2 num3 BR LDA DECI ADDA DECI 64

65 Your turn! Change the program so it adds up four numbers 65

66 We have covered sections 6.1, 6.2, 6.3, and part of 6.4. Read the text carefully and make sure you can explain in your own words what each instruction accomplishes. Individual work (to do in notebook for next time): 16, 17, 19, EoL2 66

Low-level software. Components Circuits Gates Transistors

Low-level software. Components Circuits Gates Transistors QUIZ Pipelining A computer pipeline has 4 processors, as shown above. Each processor takes 15 ms to execute, and each instruction must go sequentially through all 4 processors. A program has 10 instructions.

More information

QUIZ. Name all the 4 parts of the fetch-execute cycle.

QUIZ. Name all the 4 parts of the fetch-execute cycle. QUIZ Name all the 4 parts of the fetch-execute cycle. 1 Solution Name all the 4 parts of the fetch-execute cycle. 2 QUIZ Name two fundamental differences between magnetic drives and optical drives: 3 Solution

More information

QUIZ. Name all the 4 parts of the fetch-execute cycle.

QUIZ. Name all the 4 parts of the fetch-execute cycle. QUIZ Name all the 4 parts of the fetch-execute cycle. 1 Solution Name all the 4 parts of the fetch-execute cycle. 2 QUIZ Name two fundamental differences between magnetic drives and optical drives: 3 QUIZ

More information

LOW-LEVEL PROGRAMMING LANAGUAGES AND PSEUDOCODE. Introduction to Computer Engineering 2015 Spring by Euiseong Seo

LOW-LEVEL PROGRAMMING LANAGUAGES AND PSEUDOCODE. Introduction to Computer Engineering 2015 Spring by Euiseong Seo LOW-LEVEL PROGRAMMING LANAGUAGES AND PSEUDOCODE Introduction to Computer Engineering 2015 Spring by Euiseong Seo Where are we? Chapter 1: The Big Picture Chapter 2: Binary Values and Number Systems Chapter

More information

Low-Level Programming Languages and Pseudocode

Low-Level Programming Languages and Pseudocode Chapter 6 Low-Level Programming Languages and Pseudocode Chapter Goals List the operations that a computer can perform Describe the important features of the Pep/8 virtual machine Distinguish between immediate

More information

Write "Nell" Write "N" Write "e" Write "l" Write "l" Write "N" Write 4E (hex) Write "e" W rite 65 (hex) Write "l" W rite 6C (hex)

Write Nell Write N Write e Write l Write l Write N Write 4E (hex) Write e W rite 65 (hex) Write l W rite 6C (hex) Chapter 7 Exercises 1. What does it mean when we say that a computer is a programmable device? Programmable means that data and instructions are logically the same and are stored in the same place. The

More information

Chapter. Assembly Language

Chapter. Assembly Language Chapter 5 Assembly Language Mappings The mapping from Asmb5 to ISA3 is one-toone The mapping from HOL6 to Asmb5 is oneto-many Symbols Defined by an identifier followed by a colon at the start of a statement

More information

COSC 122 Computer Fluency. Computer Organization. Dr. Ramon Lawrence University of British Columbia Okanagan

COSC 122 Computer Fluency. Computer Organization. Dr. Ramon Lawrence University of British Columbia Okanagan COSC 122 Computer Fluency Computer Organization Dr. Ramon Lawrence University of British Columbia Okanagan ramon.lawrence@ubc.ca Key Points 1) The standard computer (von Neumann) architecture consists

More information

EE 3170 Microcontroller Applications

EE 3170 Microcontroller Applications EE 3170 Microcontroller Applications Lecture 4 : Processors, Computers, and Controllers - 1.2 (reading assignment), 1.3-1.5 Based on slides for ECE3170 by Profs. Kieckhafer, Davis, Tan, and Cischke Outline

More information

Monday, February 16, 2015

Monday, February 16, 2015 Monday, February 16, 2015 Topics for today How assemblers work Symbol tables ILC Pass 1 algorithm, Error checking Pass 2 Immediate mode and equate Assembler variants: Disassembler, Cross assembler Macros

More information

EE 5340/7340 Motorola 68HC11 Microcontroler Lecture 1. Carlos E. Davila, Electrical Engineering Dept. Southern Methodist University

EE 5340/7340 Motorola 68HC11 Microcontroler Lecture 1. Carlos E. Davila, Electrical Engineering Dept. Southern Methodist University EE 5340/7340 Motorola 68HC11 Microcontroler Lecture 1 Carlos E. Davila, Electrical Engineering Dept. Southern Methodist University What is Assembly Language? Assembly language is a programming language

More information

CS 101, Mock Computer Architecture

CS 101, Mock Computer Architecture CS 101, Mock Computer Architecture Computer organization and architecture refers to the actual hardware used to construct the computer, and the way that the hardware operates both physically and logically

More information

Copyright 2000 N. AYDIN. All rights reserved. 1

Copyright 2000 N. AYDIN. All rights reserved. 1 Computer Architecture Prof. Dr. Nizamettin AYDIN naydin@yildiz.edu.tr http://www.yildiz.edu.tr/~naydin A virtual processor for understanding instruction cycle The Visible Virtual Machine (VVM) 1 2 The

More information

CSC 221: Computer Organization, Spring 2009

CSC 221: Computer Organization, Spring 2009 1 of 7 4/17/2009 10:52 AM Overview Schedule Resources Assignments Home CSC 221: Computer Organization, Spring 2009 Practice Exam 2 Solutions The exam will be open-book, so that you don't have to memorize

More information

COMPUTER ORGANIZATION & ARCHITECTURE

COMPUTER ORGANIZATION & ARCHITECTURE COMPUTER ORGANIZATION & ARCHITECTURE Instructions Sets Architecture Lesson 5a 1 What are Instruction Sets The complete collection of instructions that are understood by a CPU Can be considered as a functional

More information

Wednesday, February 4, Chapter 4

Wednesday, February 4, Chapter 4 Wednesday, February 4, 2015 Topics for today Introduction to Computer Systems Static overview Operation Cycle Introduction to Pep/8 Features of the system Operational cycle Program trace Categories of

More information

16.1. Unit 16. Computer Organization Design of a Simple Processor

16.1. Unit 16. Computer Organization Design of a Simple Processor 6. Unit 6 Computer Organization Design of a Simple Processor HW SW 6.2 You Can Do That Cloud & Distributed Computing (CyberPhysical, Databases, Data Mining,etc.) Applications (AI, Robotics, Graphics, Mobile)

More information

Memory General R0 Registers R1 R2. Input Register 1. Input Register 2. Program Counter. Instruction Register

Memory General R0 Registers R1 R2. Input Register 1. Input Register 2. Program Counter. Instruction Register CPU Organisation Central Processing Unit (CPU) Memory General R0 Registers R1 R2 ALU R3 Output Register Input Register 1 Input Register 2 Internal Bus Address Bus Data Bus Addr. $ 000 001 002 Program Counter

More information

Teaching London Computing

Teaching London Computing Teaching London Computing CAS London CPD Day 2016 Little Man Computer William Marsh School of Electronic Engineering and Computer Science Queen Mary University of London Overview and Aims LMC is a computer

More information

Wednesday, February 7, 2018

Wednesday, February 7, 2018 Wednesday, February 7, 2018 Topics for today The Pep/9 memory Four example programs The loader The assembly language level (Chapter 5) Symbolic Instructions Assembler directives Immediate mode and equate

More information

Wednesday, September 13, Chapter 4

Wednesday, September 13, Chapter 4 Wednesday, September 13, 2017 Topics for today Introduction to Computer Systems Static overview Operation Cycle Introduction to Pep/9 Features of the system Operational cycle Program trace Categories of

More information

Unified Engineering Fall 2004

Unified Engineering Fall 2004 Massachusetts Institute of Technology Department of Aeronautics and Astronautics Cambridge, MA 02139 Unified Engineering Fall 2004 Problem Set #3 Solutions C&P PSET 3 Solutions 1. 12

More information

CS 31: Intro to Systems Digital Logic. Kevin Webb Swarthmore College February 2, 2016

CS 31: Intro to Systems Digital Logic. Kevin Webb Swarthmore College February 2, 2016 CS 31: Intro to Systems Digital Logic Kevin Webb Swarthmore College February 2, 2016 Reading Quiz Today Hardware basics Machine memory models Digital signals Logic gates Circuits: Borrow some paper if

More information

CS 265. Computer Architecture. Wei Lu, Ph.D., P.Eng.

CS 265. Computer Architecture. Wei Lu, Ph.D., P.Eng. CS 265 Computer Architecture Wei Lu, Ph.D., P.Eng. Part 3: von Neumann Architecture von Neumann Architecture Our goal: understand the basics of von Neumann architecture, including memory, control unit

More information

2.2 THE MARIE Instruction Set Architecture

2.2 THE MARIE Instruction Set Architecture 2.2 THE MARIE Instruction Set Architecture MARIE has a very simple, yet powerful, instruction set. The instruction set architecture (ISA) of a machine specifies the instructions that the computer can perform

More information

Instruction : A command to the microprocessor to perform a given task on specified data. Each instruction has two parts

Instruction : A command to the microprocessor to perform a given task on specified data. Each instruction has two parts Lecture 4 Instruction : A command to the microprocessor to perform a given task on specified data. Each instruction has two parts One part is the task to be performed, called operation code or opcode in

More information

Advanced Parallel Architecture Lesson 3. Annalisa Massini /2015

Advanced Parallel Architecture Lesson 3. Annalisa Massini /2015 Advanced Parallel Architecture Lesson 3 Annalisa Massini - Von Neumann Architecture 2 Two lessons Summary of the traditional computer architecture Von Neumann architecture http://williamstallings.com/coa/coa7e.html

More information

Processor design - MIPS

Processor design - MIPS EASY Processor design - MIPS Q.1 What happens when a register is loaded? 1. The bits of the register are set to all ones. 2. The bit pattern in the register is copied to a location in memory. 3. A bit

More information

Wednesday, September 21, 2016

Wednesday, September 21, 2016 Wednesday, September 21, 2016 Topics for today More high-level to translations Compilers and Assemblers How assemblers work Symbol tables ILC Pass 1 algorithm, Error checking Pass 2 Immediate mode and

More information

CS 31: Intro to Systems Digital Logic. Kevin Webb Swarthmore College February 3, 2015

CS 31: Intro to Systems Digital Logic. Kevin Webb Swarthmore College February 3, 2015 CS 31: Intro to Systems Digital Logic Kevin Webb Swarthmore College February 3, 2015 Reading Quiz Today Hardware basics Machine memory models Digital signals Logic gates Circuits: Borrow some paper if

More information

CSCI170 Lecture 1: Analysis of Programming Languages. John Magee 1 September 2011 Some material copyright Jones and Bartlett

CSCI170 Lecture 1: Analysis of Programming Languages. John Magee 1 September 2011 Some material copyright Jones and Bartlett CSCI170 Lecture 1: Analysis of Programming Languages John Magee 1 September 2011 Some material copyright Jones and Bartlett 1 Overview/Questions How can we control the computer s circuits? How does the

More information

Monday, February 11, 2013

Monday, February 11, 2013 Monday, February 11, 2013 Topics for today The Pep/8 memory Four example programs The loader The assembly language level (Chapter 5) Symbolic Instructions Assembler directives Immediate mode and equate

More information

address ALU the operation opcode ACC Acc memory address

address ALU the operation opcode ACC Acc memory address In this lecture, we will look at how storage (or memory) works with processor in a computer system. This is in preparation for the next lecture, in which we will examine how a microprocessor actually works

More information

Microcontroller Systems

Microcontroller Systems µcontroller systems 1 / 43 Microcontroller Systems Engineering Science 2nd year A2 Lectures Prof David Murray david.murray@eng.ox.ac.uk www.robots.ox.ac.uk/ dwm/courses/2co Michaelmas 2014 µcontroller

More information

Chapter. Computer Architecture

Chapter. Computer Architecture Chapter 4 Computer Architecture Figure 4.1 Input device Central processing unit Main memory Output device Bus Data flow Control Figure 4.2 Central processing unit () Status bits ( ) Accumulator ( ) Index

More information

CPU ARCHITECTURE. QUESTION 1 Explain how the width of the data bus and system clock speed affect the performance of a computer system.

CPU ARCHITECTURE. QUESTION 1 Explain how the width of the data bus and system clock speed affect the performance of a computer system. CPU ARCHITECTURE QUESTION 1 Explain how the width of the data bus and system clock speed affect the performance of a computer system. ANSWER 1 Data Bus Width the width of the data bus determines the number

More information

Introduction to Computers - Chapter 4

Introduction to Computers - Chapter 4 Introduction to Computers - Chapter 4 Since the invention of the transistor and the first digital computer of the 1940s, computers have been increasing in complexity and performance; however, their overall

More information

Notes: The Marie Simulator

Notes: The Marie Simulator The Accumulator (AC) is the register where calculations are performed. To add two numbers together, a) load the first number into the accumulator with a Load instruction b) Add the second number to the

More information

In this lecture, we will look at how storage (or memory) works with processor in a computer system. This is in preparation for the next lecture, in

In this lecture, we will look at how storage (or memory) works with processor in a computer system. This is in preparation for the next lecture, in In this lecture, we will look at how storage (or memory) works with processor in a computer system. This is in preparation for the next lecture, in which we will examine how a microprocessor actually works

More information

User. Application program. Interfaces. Operating system. Hardware

User. Application program. Interfaces. Operating system. Hardware Operating Systems Introduction to Operating Systems and Computer Hardware Introduction and Overview The operating system is a set of system software routines that interface between an application program

More information

Instruction Sets: Characteristics and Functions

Instruction Sets: Characteristics and Functions Instruction Sets: Characteristics and Functions Chapter 10 Lesson 15 Slide 1/22 Machine instruction set Computer designer: The machine instruction set provides the functional requirements for the CPU.

More information

Dec Hex Bin ORG ; ZERO. Introduction To Computing

Dec Hex Bin ORG ; ZERO. Introduction To Computing Dec Hex Bin 0 0 00000000 ORG ; ZERO Introduction To Computing OBJECTIVES this chapter enables the student to: Convert any number from base 2, base 10, or base 16 to any of the other two bases. Add and

More information

Question 1: What criteria define Von Neumann architecture? Identify clearly and coherently. Solution

Question 1: What criteria define Von Neumann architecture? Identify clearly and coherently. Solution This webpage has designed and created to represent the solutions of course assignment-2 of ITEC 1000: Introduction to Information Technologies. Little Man Computer model is originally developed by Dr.

More information

Advanced Parallel Architecture Lesson 3. Annalisa Massini /2015

Advanced Parallel Architecture Lesson 3. Annalisa Massini /2015 Advanced Parallel Architecture Lesson 3 Annalisa Massini - 2014/2015 Von Neumann Architecture 2 Summary of the traditional computer architecture: Von Neumann architecture http://williamstallings.com/coa/coa7e.html

More information

Show how to connect three Full Adders to implement a 3-bit ripple-carry adder

Show how to connect three Full Adders to implement a 3-bit ripple-carry adder Show how to connect three Full Adders to implement a 3-bit ripple-carry adder 1 Reg. A Reg. B Reg. Sum 2 Chapter 5 Computing Components Yet another layer of abstraction! Components Circuits Gates Transistors

More information

Chapter 5. Computer Architecture Organization and Design. Computer System Architecture Database Lab, SANGJI University

Chapter 5. Computer Architecture Organization and Design. Computer System Architecture Database Lab, SANGJI University Chapter 5. Computer Architecture Organization and Design Computer System Architecture Database Lab, SANGJI University Computer Architecture Organization and Design Instruction Codes Computer Registers

More information

Course Schedule. CS 221 Computer Architecture. Week 3: Plan. I. Hexadecimals and Character Representations. Hexadecimal Representation

Course Schedule. CS 221 Computer Architecture. Week 3: Plan. I. Hexadecimals and Character Representations. Hexadecimal Representation Course Schedule CS 221 Computer Architecture Week 3: Information Representation (2) Fall 2001 W1 Sep 11- Sep 14 Introduction W2 Sep 18- Sep 21 Information Representation (1) (Chapter 3) W3 Sep 25- Sep

More information

von Neumann Architecture Basic Computer System Early Computers Microprocessor Reading Assignment An Introduction to Computer Architecture

von Neumann Architecture Basic Computer System Early Computers Microprocessor Reading Assignment An Introduction to Computer Architecture Reading Assignment EEL 4744C: Microprocessor Applications Lecture 1 Part 1 An Introduction to Computer Architecture Microcontrollers and Microcomputers: Chapter 1, Appendix A, Chapter 2 Software and Hardware

More information

Basic Computer System. von Neumann Architecture. Reading Assignment. An Introduction to Computer Architecture. EEL 4744C: Microprocessor Applications

Basic Computer System. von Neumann Architecture. Reading Assignment. An Introduction to Computer Architecture. EEL 4744C: Microprocessor Applications Reading Assignment EEL 4744C: Microprocessor Applications Lecture 1 Part 1 An Introduction to Computer Architecture Microcontrollers and Microcomputers: Chapter 1, Appendix A, Chapter 2 Software and Hardware

More information

William Stallings Computer Organization and Architecture 8 th Edition. Chapter 11 Instruction Sets: Addressing Modes and Formats

William Stallings Computer Organization and Architecture 8 th Edition. Chapter 11 Instruction Sets: Addressing Modes and Formats William Stallings Computer Organization and Architecture 8 th Edition Chapter 11 Instruction Sets: Addressing Modes and Formats Addressing Modes Immediate Direct Indirect Register Register Indirect Displacement

More information

Wednesday, March 12, 2014

Wednesday, March 12, 2014 Wednesday, March 12, 2014 Topics for today Solutions to HW #3 Arrays and Indexed Addressing Global arrays Local arrays Buffer exploit attacks Solutions to Homework #3 1. deci N,d < (a) N not defined lda

More information

Lecture-15 W-Z: Increment-Decrement Address Latch:

Lecture-15 W-Z: Increment-Decrement Address Latch: Lecture-15 W-Z: (W) and (Z) are two 8-bit temporary registers not accessible to the user. They are exclusively used for the internal operation by the microprocessor. These registers are used either to

More information

Information Science 1

Information Science 1 Information Science 1 -Basic Concepts of Computers: Opera4on, Architecture, Memory- Week 02 College of Information Science and Engineering Ritsumeikan University Today s lecture outline l Recall the previous

More information

William Stallings Computer Organization and Architecture

William Stallings Computer Organization and Architecture William Stallings Computer Organization and Architecture Chapter 16 Control Unit Operations Rev. 3.2 (2009-10) by Enrico Nardelli 16-1 Execution of the Instruction Cycle It has many elementary phases,

More information

COSC121: Computer Systems: Review

COSC121: Computer Systems: Review COSC121: Computer Systems: Review Jeremy Bolton, PhD Assistant Teaching Professor Constructed using materials: - Patt and Patel Introduction to Computing Systems (2nd) - Patterson and Hennessy Computer

More information

Computer Organization CS 206 T Lec# 2: Instruction Sets

Computer Organization CS 206 T Lec# 2: Instruction Sets Computer Organization CS 206 T Lec# 2: Instruction Sets Topics What is an instruction set Elements of instruction Instruction Format Instruction types Types of operations Types of operand Addressing mode

More information

THE MICROPROCESSOR Von Neumann s Architecture Model

THE MICROPROCESSOR Von Neumann s Architecture Model THE ICROPROCESSOR Von Neumann s Architecture odel Input/Output unit Provides instructions and data emory unit Stores both instructions and data Arithmetic and logic unit Processes everything Control unit

More information

CS61C Machine Structures. Lecture 13 - MIPS Instruction Representation I. 9/26/2007 John Wawrzynek. www-inst.eecs.berkeley.

CS61C Machine Structures. Lecture 13 - MIPS Instruction Representation I. 9/26/2007 John Wawrzynek. www-inst.eecs.berkeley. CS61C Machine Structures Lecture 13 - MIPS Instruction Representation I 9/26/2007 John Wawrzynek (www.cs.berkeley.edu/~johnw) www-inst.eecs.berkeley.edu/~cs61c/ CS 61C L13 MIPS Instruction Representation

More information

Binghamton University. CS-140 Fall Pippin

Binghamton University. CS-140 Fall Pippin Pippin 1 Pippin Rick Decker and Stuart Hirshfield The Analytical Engine: An Introdution to Computer Science Using the Internet [1998] Imaginary Computer with a very simple architecture The final project

More information

Week 6: Processor Components

Week 6: Processor Components Week 6: Processor Components Microprocessors So far, we ve been about making devices, such such as adders, counters and registers. The ultimate goal is to make a microprocessor, which is a digital device

More information

A Review of Chapter 5 and. CSc 2010 Spring 2012 Instructor: Qian Hu

A Review of Chapter 5 and. CSc 2010 Spring 2012 Instructor: Qian Hu A Review of Chapter 5 and Chapter 6 Chapter 5 Computer Systems Organization Von Neumann Architecture 4 Components Memory Input/output ALU Control Unit Two major features Stored program concept Sequential

More information

Laboratory. Low-Level. Languages. Objective. References. Study simple machine language and assembly language programs.

Laboratory. Low-Level. Languages. Objective. References. Study simple machine language and assembly language programs. Laboratory Low-Level 7 Languages Objective Study simple machine language and assembly language programs. References Software needed: 1) A web browser (Internet Explorer or Netscape) 2) Applet from the

More information

Blog -

Blog - . Instruction Codes Every different processor type has its own design (different registers, buses, microoperations, machine instructions, etc) Modern processor is a very complex device It contains Many

More information

Instruction Sets: Characteristics and Functions Addressing Modes

Instruction Sets: Characteristics and Functions Addressing Modes Instruction Sets: Characteristics and Functions Addressing Modes Chapters 10 and 11, William Stallings Computer Organization and Architecture 7 th Edition What is an Instruction Set? The complete collection

More information

Computer Systems. Binary Representation. Binary Representation. Logical Computation: Boolean Algebra

Computer Systems. Binary Representation. Binary Representation. Logical Computation: Boolean Algebra Binary Representation Computer Systems Information is represented as a sequence of binary digits: Bits What the actual bits represent depends on the context: Seminar 3 Numerical value (integer, floating

More information

CS1004: Intro to CS in Java, Spring 2005

CS1004: Intro to CS in Java, Spring 2005 CS1004: Intro to CS in Java, Spring 2005 Lecture #10: Computer architecture Janak J Parekh janak@cs.columbia.edu HW#2 due Tuesday Administrivia Mass Storage RAM is volatile Not useful for permanent storage,

More information

CHAPTER SIX BASIC COMPUTER ORGANIZATION AND DESIGN

CHAPTER SIX BASIC COMPUTER ORGANIZATION AND DESIGN CHAPTER SIX BASIC COMPUTER ORGANIZATION AND DESIGN 6.1. Instruction Codes The organization of a digital computer defined by: 1. The set of registers it contains and their function. 2. The set of instructions

More information

ECE260: Fundamentals of Computer Engineering

ECE260: Fundamentals of Computer Engineering Datapath for a Simplified Processor James Moscola Dept. of Engineering & Computer Science York College of Pennsylvania Based on Computer Organization and Design, 5th Edition by Patterson & Hennessy Introduction

More information

Chapter 2 Instruction Set Architecture

Chapter 2 Instruction Set Architecture Chapter 2 Instruction Set Architecture Course Outcome (CO) - CO2 Describe the architecture and organization of computer systems Program Outcome (PO) PO1 Apply knowledge of mathematics, science and engineering

More information

2. Computer Evolution and Performance

2. Computer Evolution and Performance 2. Computer Evolution and Performance Spring 2016 Spring 2016 CS430 - Computer Architecture 1 Chapter 2: Computer Evolution and Performance Reading: pp. 16-49 Good Problems to Work: 2.1, 2.3, 2.4, 2.8,

More information

8/16/12. Computer Organization. Architecture. Computer Organization. Computer Basics

8/16/12. Computer Organization. Architecture. Computer Organization. Computer Basics Computer Organization Computer Basics TOPICS Computer Organization Data Representation Program Execution Computer Languages 1 2 Architecture Computer Organization n central-processing unit n performs the

More information

Computer Architecture (part 2)

Computer Architecture (part 2) Computer Architecture (part 2) Topics: Machine Organization Machine Cycle Program Execution Machine Language Types of Memory & Access 2 Chapter 5 The Von Neumann Architecture 1 Arithmetic Logic Unit (ALU)

More information

Computer Architecture 2/26/01 Lecture #

Computer Architecture 2/26/01 Lecture # Computer Architecture 2/26/01 Lecture #9 16.070 On a previous lecture, we discussed the software development process and in particular, the development of a software architecture Recall the output of the

More information

Where Does The Cpu Store The Address Of The

Where Does The Cpu Store The Address Of The Where Does The Cpu Store The Address Of The Next Instruction To Be Fetched The three most important buses are the address, the data, and the control buses. The CPU always knows where to find the next instruction

More information

Lecture 01: Basic Structure of Computers

Lecture 01: Basic Structure of Computers CSCI2510 Computer Organization Lecture 01: Basic Structure of Computers Ming-Chang YANG mcyang@cse.cuhk.edu.hk Reading: Chap. 1.1~1.3 Outline Computer: Tools for the Information Age Basic Functional Units

More information

Dr. Chuck Cartledge. 7 Nov. 2017

Dr. Chuck Cartledge. 7 Nov. 2017 5.2 5.3 5.4 Chap. 5 review Conclusion References CSC-205 Computer Organization Lecture #012 Sections 5.2 through 5.4, Machine instructions and assemblers Dr. Chuck Cartledge 7 Nov. 2017 1/17 Table of contents

More information

Mark II Aiken Relay Calculator

Mark II Aiken Relay Calculator Introduction to Embedded Microcomputer Systems Lecture 6.1 Mark II Aiken Relay Calculator 2.12. Tutorial 2. Arithmetic and logical operations format descriptions examples h 8-bit unsigned hexadecimal $00

More information

EE 3170 Microcontroller Applications

EE 3170 Microcontroller Applications EE 317 Microcontroller Applications Lecture 5 : Instruction Subset & Machine Language: Introduction to the Motorola 68HC11 - Miller 2.1 & 2.2 Based on slides for ECE317 by Profs. Davis, Kieckhafer, Tan,

More information

Copyright The McGraw-Hill Companies, Inc. Permission required for reproduction or display. Computing Layers

Copyright The McGraw-Hill Companies, Inc. Permission required for reproduction or display. Computing Layers Chapter 4 The Von Neumann Model Original slides from Gregory Byrd, North Carolina State University Modified slides by C. Wilcox, S. Rajopadhye, Colorado State University Computing Layers Problems Algorithms

More information

QUIZ: Generations of computer technology. Hardware:

QUIZ: Generations of computer technology. Hardware: QUIZ: Generations of computer technology Hardware: 1. 2. 3. 4. 5. 1 QUIZ: Generations of computer technology Software: 1. 2. 3. 4. 5. 6. 2 Steampunk! 3 The Telectroscope, 1878-2008 Steampunk Wikipedia

More information

the SAP-2 I. Intro cmpt-150-arc Sections 8-8, 8-9, 9-4, 9-5, 9.6, We ll do this in bits and pieces, doing the beginning of each section first.

the SAP-2 I. Intro cmpt-150-arc Sections 8-8, 8-9, 9-4, 9-5, 9.6, We ll do this in bits and pieces, doing the beginning of each section first. I. Intro the SAP-2 cmpt-150-arc Sections 8-8, 8-9, 9-4, 9-5, 9.6, 9.8 1. We ll do this in bits and pieces, doing the beginning of each section first. 1. The SAP-2 adds a lot of functionality to the SAP-1

More information

Computer System. Hiroaki Kobayashi 7/25/2011. Agenda. Von Neumann Model Stored-program instructions and data are stored on memory

Computer System. Hiroaki Kobayashi 7/25/2011. Agenda. Von Neumann Model Stored-program instructions and data are stored on memory Computer System Hiroaki Kobayashi 7/25/2011 7/25/2011 Computer Engineering 1 Agenda Basic model of modern computer systems Von Neumann Model Stored-program instructions and data are stored on memory Fundamental

More information

Let s put together a Manual Processor

Let s put together a Manual Processor Lecture 14 Let s put together a Manual Processor Hardware Lecture 14 Slide 1 The processor Inside every computer there is at least one processor which can take an instruction, some operands and produce

More information

Little Man Computer (LMC)

Little Man Computer (LMC) Little Man Computer (LMC) A-level Computing Independent Study Project Part Two The Little Man Computer (LMC) is a simulator which models the basic features of a modern computer. It features a central processing

More information

Why learn Computer Programming? Computer-based problem solving in Science and Engineering. Why learn Fortran? Elementary Computer Organization

Why learn Computer Programming? Computer-based problem solving in Science and Engineering. Why learn Fortran? Elementary Computer Organization CSE 1540.03 Week #1.1 January 6, 2014 Computer-based problem solving in Science and Engineering Pure math: about beautiful relationships, e.g. partial differential equations Applied math: pure math applied

More information

The CPU and Memory. How does a computer work? How does a computer interact with data? How are instructions performed? Recall schematic diagram:

The CPU and Memory. How does a computer work? How does a computer interact with data? How are instructions performed? Recall schematic diagram: The CPU and Memory How does a computer work? How does a computer interact with data? How are instructions performed? Recall schematic diagram: 1 Registers A register is a permanent storage location within

More information

Arab Open University. Computer Organization and Architecture - T103

Arab Open University. Computer Organization and Architecture - T103 Arab Open University Computer Organization and Architecture - T103 Reference Book: Linda Null, Julia Lobur, The essentials of Computer Organization and Architecture, Jones & Bartlett, Third Edition, 2012.

More information

C++ to assembly to machine code

C++ to assembly to machine code IBCM 1 C++ to assembly to machine code hello.cpp #include int main() { std::cout

More information

LC-3 Assembly Language. (Textbook Chapter 7)"

LC-3 Assembly Language. (Textbook Chapter 7) LC-3 Assembly Language (Textbook Chapter 7)" Assembly and assembler" Machine language - binary" 0001110010000110 Assembly language - symbolic" ADD R6, R2, R6 ; increment index reg. Assembler is a program

More information

Math 230 Assembly Programming (AKA Computer Organization) Spring 2008

Math 230 Assembly Programming (AKA Computer Organization) Spring 2008 Math 230 Assembly Programming (AKA Computer Organization) Spring 2008 MIPS Intro II Lect 10 Feb 15, 2008 Adapted from slides developed for: Mary J. Irwin PSU CSE331 Dave Patterson s UCB CS152 M230 L10.1

More information

Wednesday, September 20, 2017

Wednesday, September 20, 2017 Wednesday, September 20, 2017 Topics for today More high-level to Pep/9 translations Compilers and Assemblers How assemblers work Symbol tables ILC Pass 1 algorithm, Error checking Pass 2 Immediate mode

More information

SCRAM Introduction. Philipp Koehn. 19 February 2018

SCRAM Introduction. Philipp Koehn. 19 February 2018 SCRAM Introduction Philipp Koehn 19 February 2018 This eek 1 Fully work through a computer circuit assembly code Simple but Complete Random Access Machine (SCRAM) every instruction is 8 bit 4 bit for op-code:

More information

Load -- read data from memory to register. Store -- write data from register to memory. Load effective address -- compute address, save in register

Load -- read data from memory to register. Store -- write data from register to memory. Load effective address -- compute address, save in register Data Movement Instructions Load -- read data from memory to register LD: PC-relative mode LDR: base+offset mode LDI: indirect mode Store -- write data from register to memory ST: PC-relative mode STR:

More information

EC-801 Advanced Computer Architecture

EC-801 Advanced Computer Architecture EC-801 Advanced Computer Architecture Lecture 5 Instruction Set Architecture I Dr Hashim Ali Fall 2018 Department of Computer Science and Engineering HITEC University Taxila!1 Instruction Set Architecture

More information

Chapter 1. Microprocessor architecture ECE Dr. Mohamed Mahmoud.

Chapter 1. Microprocessor architecture ECE Dr. Mohamed Mahmoud. Chapter 1 Microprocessor architecture ECE 3130 Dr. Mohamed Mahmoud The slides are copyright protected. It is not permissible to use them without a permission from Dr Mahmoud http://www.cae.tntech.edu/~mmahmoud/

More information

18. Machine Language. Computer Systems. COMP1917: Computing 1. Machine Language Programming. History of Computer Technology

18. Machine Language. Computer Systems. COMP1917: Computing 1. Machine Language Programming. History of Computer Technology COMP1917 13s2 18. Machine Language 1 COMP1917: Computing 1 18. Machine Language Computer Systems Recall: modern computer systems are layered. Applications Programming Language Operating System Assembly

More information

COSC121: Computer Systems: Review

COSC121: Computer Systems: Review COSC121: Computer Systems: Review Jeremy Bolton, PhD Assistant Teaching Professor Constructed using materials: - Patt and Patel Introduction to Computing Systems (2nd) - Patterson and Hennessy Computer

More information

CS311 Lecture: The Architecture of a Simple Computer

CS311 Lecture: The Architecture of a Simple Computer CS311 Lecture: The Architecture of a Simple Computer Objectives: July 30, 2003 1. To introduce the MARIE architecture developed in Null ch. 4 2. To introduce writing programs in assembly language Materials:

More information

CHAPTER ASSEMBLY LANGUAGE PROGRAMMING

CHAPTER ASSEMBLY LANGUAGE PROGRAMMING CHAPTER 2 8051 ASSEMBLY LANGUAGE PROGRAMMING Registers Register are used to store information temporarily: A byte of data to be processed An address pointing to the data to be fetched The vast majority

More information

Chapter 3. Z80 Instructions & Assembly Language. Von Neumann Architecture. Memory. instructions. program. data

Chapter 3. Z80 Instructions & Assembly Language. Von Neumann Architecture. Memory. instructions. program. data Von Neumann Architecture The von Neumann architecture is a computer design model that uses a processing unit and a separate storage to hold both instructions and data To run a machine, program and data

More information