Computer Architecture

Transcription

1 ID Herzliya Shimon Schocken omputer rchitecture Shimon Schocken Spring 2005 Elements of omputing Systems 1 omputer rchitecture (h 5) Some early computers Multiplier Blaise Pascal, Gottfried Leibniz, Logarithm Divider Elements of omputing Systems 2 omputer rchitecture (h 5) opyright Shimon Schocken

2 Turing machine (c 1930) lan Turing Informal description: tape, divided into cells, each containing a symbol head that can read and write symbols and move left and right state register that stores the machine s state n action table that tells the machine what symbol to write, how to move the head, and what its new state will be, given the symbol it has just read on the tape and the current state The Enigma Elements of omputing Systems 3 omputer rchitecture (h 5) Von Neumann machine (c 1940) PU rithmetic Logic Unit (LU) Input device (data + instructions) Registers ontrol Output device John Von Neumann made it possible ndy Grove made it small (and fast) Elements of omputing Systems 4 omputer rchitecture (h 5) opyright Shimon Schocken

3 Von Neumann machine PU rithmetic Logic Unit (LU) Input device = data + instructions (data + Registers The memory is addressable instructions) ontrol Output device PU = LU, data registers, address registers, control Fetch-execute cycle: the execution of the current instruction involves one or more of the following micro tasks: have the LU compute some value manipulate internal registers read a word from the memory write a word to the memory In the process of executing these tasks, figure out which instruction to fetch and execute next Input / output devices Elements of omputing Systems 5 omputer rchitecture (h 5) The Hack computer -bit Von Neumann platform Instruction memory and data memory are two physically separate units I/O: 512 by 256 black and white screen, regular keyboard Designed to execute programs written in the Hack machine language an be easily built from the chip-set that we built so far in the course Main parts: Instruction memory : Data memory PU omputer Elements of omputing Systems 6 omputer rchitecture (h 5) opyright Shimon Schocken

4 Instruction memory address out ROM32K 15 Function: Pre-loaded with a machine language program lways emits the current instruction: out = ROM32K[address] Elements of omputing Systems 7 omputer rchitecture (h 5) Data memory load in RMK out address 15 ccessing the memory Low level: Set address, in, load, etc High level: Use peek(address) and poke(address,value) (OS services) Elements of omputing Systems 8 omputer rchitecture (h 5) opyright Shimon Schocken

5 Lecture plan Instruction memory : Data memory PU omputer Elements of omputing Systems 9 omputer rchitecture (h 5) load in address out 15 Physical Functions exactly like a -bit 8K RM : out = [address] If load then [address] = in Side effect: continuously refreshes a 256 by 512 black-and-white screen Elements of omputing Systems 10 omputer rchitecture (h 5) opyright Shimon Schocken

6 row row row 255 refresh several times each second Writing pixel (x,y) to the screen: Low level: Set the y% bit of the word found at [x*32+y/] High level: Use drawpixel(x,y) (OS service) Elements of omputing Systems 11 omputer rchitecture (h 5) out Side effect: connected to a physical keyboard Function: out = the SII code of the pressed key, or 0 if no key is pressed Reading the keyboard: Low level: probe the contents of the register High level: Use keypressed() (OS service) Elements of omputing Systems 12 omputer rchitecture (h 5) opyright Shimon Schocken

7 The Hack computer Instruction memory : PU Data memory omputer Elements of omputing Systems 13 omputer rchitecture (h 5) load in 0 RM (K) out address memory map (8K) memory map Function: ccess to any address>24576 is invalid ccess to any address in the range,384 24,575 results in accessing the screen memory map ccess to address 24,576 results in accessing the keyboard memory map Elements of omputing Systems 14 omputer rchitecture (h 5) opyright Shimon Schocken

8 PU from data memory from instruction memory inm instruction reset outm 1 PU writem 1 addressm 15 pc 15 to data memory to instruction memory Function: Executes the instruction according to the Hack machine language specification The D and in the language specification refer to PU-resident registers, while M refers to [] The inm input holds the value of this location If the instruction includes a directive to write a value to M, the value is placed in outm, the address is placed in addressm, and writem is asserted If reset=1, then pc is set to 0; Otherwise, pc is set to the address resulting from executing the current instruction Elements of omputing Systems 15 omputer rchitecture (h 5) Let s re-visit the -instruction Symbolic: dest=comp;jump comp dest jump Binary: a c1 c2 c3 c4 c5 c6 d1 d2 d3 j1 j2 j3 Elements of omputing Systems omputer rchitecture (h 5) opyright Shimon Schocken

9 PU implementation -Instruction: comp dest jump a c1 c2 c3 c4 c5 c6 d1 d2 d3 j1 j2 j3 LU output D D decode outm instruction Mux Mux /M LU inm M writem addressm reset P pc Elements of omputing Systems 17 omputer rchitecture (h 5) ontrol -Instruction: comp dest jump a c1 c2 c3 c4 c5 c6 d1 d2 d3 j1 j2 j3 Fetch-execute cycle: LU output Decode Execute D D Fetch instruction decode Mux Mux /M LU outm inm M writem addressm reset P pc Jump / branch logic: if jump then P = else P = P+1 Elements of omputing Systems 18 omputer rchitecture (h 5) opyright Shimon Schocken

10 The Hack computer Instruction memory : PU Data memory omputer Elements of omputing Systems 19 omputer rchitecture (h 5) omputer reset omputer Elements of omputing Systems 20 omputer rchitecture (h 5) opyright Shimon Schocken

11 omputer inm writem Instruction (ROM32K) instruction PU outm addressm pc Data () reset HIP HIP omputer omputer { { IN IN reset; reset; PRTS: PRTS: // // implementation implementation missing missing } } Elements of omputing Systems 21 omputer rchitecture (h 5) Related topics More memory maps Special boards / drivers lock / MH Efficiency IS / RIS (HW/SW trade-off) Laptops Dedicated / embedded computers nd more Elements of omputing Systems 22 omputer rchitecture (h 5) opyright Shimon Schocken