ECE331: Hardware Organization and Design


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1 ECE331: Hardware Organization and Design Lecture 10: Multiplication & Floating Point Representation Adapted from Computer Organization and Design, Patterson & Hennessy, UCB
2 MIPS Division Two 32bit registers for product HI: mostsignificant 32 bits LO: leastsignificant 32bits Instructions div rs, rt / divu rs, rt 32bit result in LO, 32bit remainder in HI mfhi rd / mflo rd Moves data from hi and lo registers Example mfhi $s0 > move remainder to register $s0 mflo $s0 > move result of division to register $s0 ECE331: Floating Point 2
3 MULTIPLY Paper and pencil example (unsigned): Multiplicand 1000 Multiplier Product m bits x n bits = m+n bit product Issues to note: The number of partial products is equal to the number of bits in the multiplier The partial products are added together A total of n1 adders could be used to generate the result ECE331: Floating Point 3
4 MULTIPLY Paper and pencil example (unsigned): Multiplicand 1000 Multiplier Product Need one adder ECE331: Floating Point 4
5 MULTIPLY Paper and pencil example (unsigned): Multiplicand 1000 Multiplier Product Need one adder ECE331: Floating Point 5
6 MULTIPLY Paper and pencil example Multiplicand 1000 Multiplier three additions 1000 Product B 3 B 2 B 1 B 0 > Multiplicand A 3 A 2 A 1 A 0 > Multiplier ECE331: Floating Point 6
7 What is the Delay Through the Multiplier? x3,x2,x1,x0=1111 y3,y2,y1,y0=0001 ΔFA  operation time  delay Assuming equal delays for sum and carryout Longest carry propagation chain when adding two 4bit numbers In synchronous arithmetic units  time allowed for adder's operation is worstcase delay  nδfa ECE331: Floating Point 7
8 Multiplier Delay ΔFA  operation time delay through each adder bit Ignore AND gate delay For 4bit adder, delay is 4*ΔFA Second adder (controlled by A2) can t generate its last add bit until second sum bit of first adder propagates through second adder So, extra delay of 2*ΔFA for second adder. Third adder (controlled by A3) can t generate its last add bit until second sum bit for second adder propagates through third adder So, extra delay of 2*ΔFA for third adder. Total delay is 2*ΔFA + 2*ΔFA + 4*ΔFA = 8*ΔFA What s the delay for n bits? ECE331: Floating Point 8
9 Multiplier Delay Critical paths C0 delay = 0 C1 delay = ΔFA C2 delay = 3ΔFA C3 delay = 5ΔFA C4 delay = 6ΔFA C5 delay = 7ΔFA C6 delay = 8ΔFA C7 delay = 8ΔFA What s the delay for n bits? (n2) * (2ΔFA) + nδfa = (3n4)ΔFA ECE331: Floating Point 9 Critical path for c7
10 Floating Point Representation for nonintegral numbers Including very small and very large numbers Like scientific notation In binary ±1.xxxxxxx 2 2 yyyy Types float and double in C normalized ECE331: Floating Point 10
11 Floating Point Numbers The largest 32 bit unsigned integer number is = 4,294,967,295 What if we want to encode the approx. age of the earth? 4,600,000,000 or 4.6 x 10 9 or the weight in kg of one a.m.u. (atomic mass unit) or 1.6 x There is no way we can encode either of the above in a 32 bit integer. ECE331: Floating Point 11
12 Exponential Notation The following are equivalent representations of 1, ,400.0 x ,340.0 x ,234.0 x x x x x x 10 5 The representations differ in that the decimal place the point  floats to the left or right (with the appropriate adjustment in the exponent). ECE331: Floating Point 12
13 Parts of a Floating Point Number x 103 Exponent Sign of mantissa Location of decimal point Mantissa Sign of exponent Base Mantissa is also called Significand ECE331: Floating Point 13
14 Single Precision Format Note that the exponent has no explicit sign bit Base? 32 bits M: Mantissa (23 bits) E: Exponent (8 bits) S: Sign of mantissa (1 bit) ECE331: Floating Point 14
15 Normalization The mantissa M is a normalized fraction Has an implied decimal place on left Has an implied (hidden) 1 on left of the decimal place E.g., Fraction Represents = The significand=1.f is in the range [1, 2ulp] ulp unit in the last position (what remains to reach a whole number when all bits are set to one) F ECE331: Floating Point 15 S = ( 1) 1. f 2 E Bias Value of exponent (unsigned integer) Bias value (known; set by convention)
16 Binary Fractions To convert binary fractions to floating point = 1*(0.5) + 1*(0.25) + 1*(0.125) + 0*(0.0625) + 0*( ) + 0*( ) + 1*( ) + 0*( ) = ECE331: Floating Point 16
17 Binary Fractions To convert floating point to binary whole number fraction 9 à *(0.5) = *(0.25) = neg. num *(0.125) = 0 X à = x 2 4 = x 2 3 Note that we can shift positions left and right of the decimal point by multiplying by different powers of 2 ECE331: Floating Point 17
18 Working with normalization (single precision) S {0,1} (1bit) 1 E 254 (8bits unsigned integer); Bias = f base2 < Formula provides for the full range of possible floating point numbers. F S = ( 1) 1. f 2 E Bias ECE331: Floating Point 18
19 IEEE FloatingPoint Format single: 8 bits double: 11 bits S Exponent single: 23 bits double: 52 bits Fraction x = ( 1) S (1+ Fraction) 2 (Exponent Bias) S: sign bit (0 nonnegative, 1 negative) Normalize significand: 1.0 significand < 2.0 Always has a leading prebinarypoint 1 bit, so no need to represent it explicitly (hidden bit) Significand is Fraction with the 1. restored Exponent: excess representation: actual exponent + Bias Ensures exponent is unsigned Single: Bias = 127; Double: Bias = 1023 ECE331: Floating Point 19
20 SinglePrecision Range Exponents and reserved Smallest value Exponent: actual exponent = = 126 Fraction: significand = 1.0 ± ± Largest value exponent: actual exponent = = +127 Fraction: significand 2.0 ± ± ECE331: Floating Point 20
21 FloatingPoint Example To convert floating point number to binary Represent = = ( 1) S = 1 Fraction = Exponent = 1 + Bias Single: = 126 = Double: = 1022 = Single: fraction sign exponent and bias Double: ECE331: Floating Point 21
22 FloatingPoint Example To convert from binary to floating point What number is represented by the singleprecision float? Identify the components S = 1 Fraction = Exponent = = 129 Calculate the value x = ( 1) 1 ( ) 2 ( ) = ( 1) = 5.0 ECE331: Floating Point 22
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