MPLAB X Debugging Techniques
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1 TLS MPLAB X Debugging Techniques Exception Conditions Author: Rob Ostapiuk, Stu Chandler Microchip Technology
2 Exception Events Causes and Tools for Resolving Them
3 Exception Events Definition An Exception Event is something that causes the device to reset. Resets of this type often set or clear bits to indicate the ultimate cause for the reset, though the source of the problem may be harder to determine.! Exception Events! Unhandled interrupts (no ISR defined)! Accessing unimplemented memory address! Accessing an odd memory address (misaligned)! Stack overflow/underflow! Math error (division by zero, etc.)! Oscillator failure 2012 Microchip Technology Incorporated. All Rights Reserved. Slide 3
4 PIC24F IVT 2012 Microchip Technology Incorporated. All Rights Reserved. Slide 4
5 Exception Resolution Tools BREAK Instruction Syntax (16-bit PIC Microcontrollers) #define _Halt() { asm volatile (".pword 0xDA4000");}! _Halt() macro inserts a BREAK instruction (0xDA4000) which will halt execution of your code at that point! Different from software breakpoint no substitution of original instruction and uses no breakpoint resources PIC32 has a BREAK instruction mnemonic that should be used instead of the opcode 2012 Microchip Technology Incorporated. All Rights Reserved. Slide 5
6 Exception Resolution Tools Default Interrupt Syntax (for 16-bit PIC Microcontrollers, 32-bit are similar) void attribute ((interrupt)) _DefaultInterrupt(void) { }! If an interrupt vector does not have a handler specified, the default handler should be used! The _DefaultInterrupt() handler simply resets the device! _DefaultInterrupt() handler may be modified to take specific actions! Similar functionality may be added to 8-bit ISR: After testing all valid interrupts as the cause, provide default handler for "all other cases" 2012 Microchip Technology Incorporated. All Rights Reserved. Slide 6
7 Exception Resolution Tools Stack Pointer! Points to 'top' of stack! Stack grows:! [16-bit] 'Up' to higher addresses ! [32-bit] 'Down' to lower addresses! Stack pointer register:! [16-bit] W15! [32-bit] SP (GPR 29)! Stack pointer limit register: Example Addresses E 012C 012A End of Stack Top of Stack SPLIM PUSH W15! [16-bit] SPLIM! [32-bit] Default=1024 bytes, may be changed with linker option <data> <data> POP 8-bit devices use a hardware stack for return addresses and a compiled stack (fixed locations in memory) for local data requiring different exception resolution techniques Microchip Technology Incorporated. All Rights Reserved. Slide 7
8 Definition Exception Resolution Tools Frame Pointer A Frame is a range of addresses on the stack that contain data (e.g. local variables) belonging to the currently executing function.! Points to beginning of current function's frame! Frame pointer register:! [16-bit] W14! [32-bit] FP (GPR 30)! May be omitted by some compiler optimizations Function's Local Variables Function called End of Stack Top of Stack <function data> <function data> <function data> <data> <data> SPLIM PUSH W15/SP POP W14/FP 8-bit devices don't use a frame pointer. Frame pointer use on 16- and 32-bit devices depends on the compiler's settings Microchip Technology Incorporated. All Rights Reserved. Slide 8
9 Exception Resolution Tracking down an unintentional interrupt or trap! Trap an exception condition using: Example! _DefaultInterrupt! _Halt() macro void attribute ((interrupt, no_auto_psv)) _DefaultInterrupt() { _Halt(); Nop(); }! Single step and PC returns to instruction after one where exception occurred! Stack contains address of instruction where exception occurred 2012 Microchip Technology Incorporated. All Rights Reserved. Slide 9
10 Exception Resolution Narrow down possibilities with specific trap routines! Populate the available trap routines similarly to the _DefaultInterrupt example: Example Address Error Trap void attribute ((interrupt, auto_psv)) _AddressError(void) { INTCON1bits.ADDRERR = 0;//Clear the trap flag _Halt(); Nop(); }! On address error, program will stop in this routine with PC pointing to Nop()! Single step to go to line immediately after cause of address error 2012 Microchip Technology Incorporated. All Rights Reserved. Slide 10
11 Exception Resolution Narrow down possibilities with specific trap routines! After single stepping, we return to the line immediately after the one causing the trap Example Address Error Trap #ifdef ADDR_TRP adc_average = adc_average * *signalmodify++; #endif data_buffer_rdptr = &adc_data_buffer[0]; Code causing address error trap 2012 Microchip Technology Incorporated. All Rights Reserved. Slide 11
12 Exception Resolution Narrow down possibilities using the stack! The stack can also tell you how you arrived at your current position: Frame Pointer Stack Pointer Go look at this address 2012 Microchip Technology Incorporated. All Rights Reserved. Slide 12
13 Exception Resolution Narrow down possibilities using the stack! The return address is easily discovered from the stack: Return Address Top of Stack (address in W15) Previous Frame 2012 Microchip Technology Incorporated. All Rights Reserved. Slide 13
14 8-bit Exception Resolution RCON Register! RCON register records sources of reset! Internal Conditions! Incorrect memory access! Unhandled DefaultInterrupt! Watchdog timer events! Software reset! External Conditions! External event MCLR 2012 Microchip Technology Incorporated. All Rights Reserved. Slide 14
15 32-bit Exception Resolution Cause Register! Cause register shows cause of last general exception! JTAG Related! Interrupt Related! Address Related! Data Related! Math Related! Instruction Related 2012 Microchip Technology Incorporated. All Rights Reserved. Slide 15
16 32-bit Exception Resolution Core Exception Types from PIC32MX360F512L Exception Reset DSS DINT NMI Interrupt DIB AdEL IBE DBp Sys Bp RI CpU CEU Ov Tr DDBL/DDBS AdEL AdES DBE DDBL Description Assertion MCLR or a Power-on Reset (POR) EJTAG Debug Single Step EJTAG Debug Interrupt. Caused by the assertion of the external EJ_DINT input, or by setting the EjtagBrk bit in the ECR register Assertion of NMI signal Assertion of unmasked hardware or software interrupt signal EJTAG debug hardware instruction break matched Fetch address alignment error; Fetch reference to protected address Instruction fetch bus error EJTAG Breakpoint (execution of SDBBP instruction) Execution of SYSCALL instruction Execution of BREAK instruction Execution of a Reserved Instruction Execution of a coprocessor instruction for a coprocessor that is not enabled Execution of a CorExtend instruction when CorExtend is not enabled Execution of an arithmetic instruction that overflowed Execution of a trap (when trap condition is true) EJTAG Data Address Break (address only) or EJTAG Data Value Break on Store (address + value) Load address alignment error; Load reference to protected address Store address alignment error; Store to protected address Load or store bus error EJTAG data hardware breakpoint matched in load data compare 2012 Microchip Technology Incorporated. All Rights Reserved. Slide 16
17 Exercise Exceptions
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