SYSTEMC AMS ARCHITECTURE EXPLORATION FOR MIXED SIGNAL SYSTEMS

Transcription

1 SYSTEMC AMS ARCHITECTURE EXPLORATION FOR MIXED SIGNAL SYSTEMS Stephan Schulz Head of Heterogeneous System Specification Fraunhofer IIS/EAS

2 About Fraunhofer Facts and figures Fraunhofer Association Fraunhofer undertakes applied research of direct utility to private and public enterprise and of wide benefit to society. Europe s largest application-oriented research organization Major innovations e.g. mp3 music format, white LEDs and a high-resolution thermal camera Fraunhofer Institute for Integrated Circuits IIS Founded 1985 Employees ~880 Budget ~$144M Director Dr. Albert Heuberger Design Automation Division EAS Founded 1992 Employees ~90 Budget ~$10.2M Director Dr. Peter Schneider 2

3 Fraunhofer IIS, Design Automation Division Our business areas Design Integration Application System Level Design Mixed-Signal IP and Design Services Reliability and Lifetime Prediction Advanced System Integration Optical Sensors Condition Monitoring Systems Wireless Automation Energy Management Requirements (technical, economical, legal) 3

4 AGENDA Motivation / Introduction of SystemC AMS Architecture Exploration Examples Conclusion 4

5 Why consider analogue aspects? Digital systems embedded in analogue components System level design usually omits analogue effects Re-designs and adaptations at later stages needed Early analogue incorporation needed to avoid unnecessary iterations Cost reduction Shorter time to market Requirements Concept µc, ECU, DSP Sensors, actors, receiver, transmitter Detailed Implementation System-Test Integration-Test Unit-Test 5

6 Why mixing analogue and digital? Traditional architecture Receiver Functionality moves from intelligent hardware design into software implementation Easier bug-fixing Cheaper hardware components Re-use generic (verified!) digital components instead of custom solutions Proven verification methods available such as UVM Antenna front-end ADC DAC Transmitter Receiver Serial ADC Calibration & Control DAC Interface µc Transmitter Digital assisted analogue DSP. DSP 6

7 Modelling, Simulation, Verification: How? Software is the key ISS too slow in concept phase Native compilation needed SystemC & SystemC AMS provide key combination for integrating Software, Digital and Analogue Designs Mixed-Signal Architecture Exploration New: UVM-SystemC SystemC modelling environment UVM-SystemC TLM SCV SystemC C++ -AMS -AMS SystemC-AMS 7

8 SystemC AMS Additional library to SystemC SystemC model Compatibility to vendor implementations -AMS C++ compiler and linker Executable code (simulator) SystemC library SystemC AMS library UVM-SystemC library C++ debugger Waveform viewer 8

9 SystemC AMS Native integration in SystemC environments Several modelling styles Timed Data Flow (TDF) Linear Signal Flow (LSF) Electrical Linear Networks (ELN) Several analysis types Time domain Frequency / Noise domain AMS methodology-specific elements elements for AMS design refinement, etc. Electrical Linear Networks (ELN) Linear DAE solver Linear Signal Flow (LSF) Synchronization layer Timed Data Flow (TDF) Scheduler SystemC Language Standard (IEEE Std ) 9

10 Model of Computations Timed Data Flow Discrete-time behaviour Static scheduling Support of static non-linear behaviour Linear Signal Flow Continuous-time behaviour Differential and Algebraic Equations solved numerically at appropriate time steps Electrical Linear Networks Network primitives Topology results in equation system which is solved numerically 10

11 Analysis Types Transient time domain driven by the SystemC kernel AC-analysis Calculates linear complex equation system stimulated by AC-sources AC-noise-analysis solves the linear complex equation system for each noise source contribution (other source contributions will be neglected) 11

12 Use-Cases design abstraction modeling formalism SystemC use cases functional architecture implementation data flow signal flow electrical networks SystemC AMS executable specification virtual prototyping architecture exploration integration validation 12

13 AGENDA Motivation / Introduction of SystemC AMS Architecture Exploration Examples Conclusion 13

14 Architecture Exploration Firmware DA Temp AD AD µc DC - + Pressure DA 14

15 Domains Firmware SOFTWARE TDF DA Temp LSF AD TDF AD DIGITAL µc DC - + Pressure ELN TDF DA 15

16 Re-usable reference models TIER2 TIER1 OEM Value/Supply Chain Source: Wolfgang Scherr Infineon AIM 16

17 Re-usable reference models SystemC provides easy exchange of IP-protected models Suppliers provide binary models Easy provision of model libraries Verification artefacts can be included to support verification during integration TIER2 TIER1 OEM SystemC model -AMS C++ compiler and linker SystemC library SystemC AMS library UVM-SystemC library Executable code (simulator) C++ debugger Value/Supply Chain Waveform viewer 17

18 AGENDA Motivation / Introduction of SystemC AMS Architecture Exploration Examples Conclusion 18

19 SATA PHY including cable transmission Serial ATA PHY chip set for 3 / 6 / 8 GBit serial data transmission Concept engineering model of transceiver /receiver including phase locked loop (PLL) Estimation of bit error rates, simulation of PLL locking behaviour 19

20 Fiber optical Gyrosensor This research project (Syena) is supported by the German Government, Federal Ministry of Education and Research under the grant number 01M

21 Fiber optical Gyrosensor Digital MIOC (Multi Integrated Optic Chip) Sensor Electronic Module (SEM) Analogue ASIC (LiANA) Detector module Digital ASIC (LiFOGA) Northrop Grumman LITEF GmbH 21

22 ADSL / VDSL Systems Customer Premises Equipement Central Office FDQ FFT TDQ Filter Dec. ADC Prefi AGC AGC Prefi ADC Filter Dec. TDQ FFT FDQ LEC Hybrid Hybrid LEC IFFT Filter Int. NSH DAC POFI Line twisted pair POFI DAC NSH Filter Int. IFFT Splitter Splitter SLIC Vinetic Transient settling behavior Interaction Voice / Data transmission CO0 CPE 0 Training algorithm BER estimations CO1 NEXT FEXT NEXT CPE 1 Numerous of use scenarios CON Interaction of different lines Multi level simulation environment essential Cabinet (Central Office) Cable Binder DropWire Source: Gerhard Nössing, LANTIQ CPE N 22

23 Window Lifter Model Overview Power management unit Supply Bias to AMS parts WDT Interrupt Reset Wake up Interrupt LIN transceiver MON inputs Wake up Wake up Temperature sensor Microcontroller subsystem/ ISS Measurement interface OPAMP Motor current Motor speed and direction Interrupt s Motor speed and direction Interrupt AMS subsystem Switches Mechanical subsystem Source: Georg Pelz, Monica Rafaila, Infineon Technologies 23

24 Window Lifter Substantial Subset of Door ECU SystemC(-AMS) simulations (functional and system MC) for substantial parts of ECU on ECU architecture Chip architecture in system context Chip design in system context ECU design This research project (AutoSUN) is supported by the German Government, Federal Ministry of Education and Research under the grant number 01M3178 Source: Georg Pelz, Infineon Technologies 24

25 Simulation Performance Window Lifter Model Simulation time over simulated time SystemC AMS Software on algorithm level SystemC AMS Cycle-Accurate MCU model: 10³ 5*10³ VHDL-AMS / VHDL: FastMOS (Ultrasim): (start-up only) Spice (Spectre): just no Source: Monica Rafaila, Georg Pelz (Infineon Technologies) 25

26 AGENDA Motivation / Introduction Architecture Exploration Examples Conclusion 26

27 Conclusion SystemC in combination with SystemC AMS suitable for architecture exploration Software, digital, analogue in one simulation Verification method available covering all domains License free simulation Simulator available as PoC implementation Tool integration available 27

28 SystemC AMS Architecture exploration for mixed signal systems Questions 28

29 THANK YOU FOR YOU ATTENTION YOUR CONTACT Stephan Schulz Head of Group Heterogeneous System Specification Fraunhofer Institute for Integrated Circuits IIS Design Automation Division EAS Zeunerstraße Dresden, Germany 29