RPWI Software Design SWEDISH INSTITUTE OF SPACE PHYSICS. Reine Gill

Transcription

1 RPWI Software Design SWEDISH INSTITUTE OF SPACE PHYSICS Reine Gill

2 Software Environment (Design A, Design B) - Dataflows (Instruments, Spacecraft TM/TC) - Signals (Clocks, Interrupts, Pulse Per Second (PPS)) - Hardware (Interfaces, LVDS links etc.) Software Design, Data Flow Channels - Moving and processing data in real time - Synchronization - Examples of block vs stream processing Software Design, Datation/Timestamping and Synchronization Software Design, Interrupts Software Design, Sequencing and Duty cycle - What do we need? - Driven by constraints, power/telemetry. Quality Assurance and standards Software Development etc. - Practical issues - Instrument logging and version control Estimated work hours - Rough estimate not including QA Software to do list - Not complete but conveys magnitude and scope

3 Data flows, Signals and Hardware (Software environment, design A) SCM LP-PWI RA-PWI RWI MLA Links and data rates (without local data reduction) Thin arrows represents slow single LVDS links moving configuration or slow HK data. (256Writes/s = 4Kbit/s with margin but not including address.) Thick arrows represent faster and also parallel LVDS links. LF Wave Analyzer A RAM MEMORY (EDAC) MAX8MB (TBC) LP BIAS Control B RTEMS: 100K Instruments: 240K Buses Services: 100K Total: 440K The rest is for data MF Wave Analyzer C (ACTEL) DATA BUS/ IRQs ESA ASIC LEON2 HF Wave Analyzer D M IO Memory 100 MHz Max (TBC) ESA ASIC Xentium DSP Xentium DSP (Here M used with bytes/bits is 1024*1024 otherwise it is 1000*1000) A) 20KHz*2.5*9 = 450 KS/s => 7 Mbit/s = 1MB/s B) 100KHz*4 = 400 KWrites/s => 6.4 Mbit/s C) 2.5MHz*3 = 7.5 MS/s (16bit) => 120 Mbit/s = 15MB/s D) 3MHz *2 = 6 MS/s (12bit) => 72 Mbit/s = 9MB/s Notes (C ) Computed for raw data (4-5 parallel links). (D) Used to be 10MHz reduced (by wp) due to bandwidth issue Total raw output rate without reduction:25mb/s This implies low duty cycles and high data reduction. SYS CLK SPACE WIRE PPS (SYSCLK) Distributed common clock signal with redundancy use for synchronization TBC. (PPS) 1 Pulse Per second Used for synchronization between instruments, overall DPU timebase, datation and updating system time PPS signal separate line PPS signal from space wire 8*1e6/2e6=4us accuracy at 2Mbit? TM/TC Mbit/day Byte/s SPACE WIRE 8 Interrupts 4 / s 2 DMA? Dep. on ASIC 1 PPS 1 RTEMS Task Timer SPACE CRAFT

4 Data flows, Signals and Hardware (Software environment, design B) SCM LP-PWI RA-PWI RWI MLA Links and data rates (without local data reduction) Thin arrows represents slow single LVDS links moving configuration or slow HK data. (256Writes/s = 4Kbit/s with margin but not including address.) Thick arrows represent faster and also parallel LVDS links. (Here M used with bytes/bits is 1024*1024 otherwise it is 1000*1000) LF Wave Analyzer A IRQs LP BIAS Control B MF Wave Analyzer C (ACTEL) DATA BUS/ Signal Processing (VIRTEX-4 or 5) M HF Wave Analyzer D M IO Memory IRQ LEON3-FT (24MHz) RTAX2000 (TBC) BUSES SYS CLK PPS DMA Tx/Rx IRQ RAM MEMORY (EDAC) MAX8MB (TBC) RTEMS: 100K Instruments: 240K Services: 100K Total: 440K The rest is for data. A) 20KHz*2.5*9 = 450 KS/s => 7 Mbit/s = 1MB/s B) 100KHz*4 = 400 KWrites/s => 6.4 Mbit/s C) 2.5MHz*3 = 7.5 MS/s (16bit) => 120 Mbit/s = 15MB/s D) 3MHz *2 = 6 MS/s (12bit) => 72 Mbit/s = 9MB/s Notes (C ) Computed for raw data (4-5 parallel links). (D) Used to be 10MHz reduced (by wp) due to bandwidth issue Total raw output rate without reduction:25mb/s This implies low duty cycles and high data reduction. (SYSCLK) Distributed common clock signal with redundancy use for synchronization TBC. (PPS) 1 Pulse Per second Used for synchronization between instruments, overall DPU timebase, datation and updating system time PPS signal separate line PPS signal from space wire 8*1e6/2e6=4us accuracy at 2Mbit? SPACE WIRE TM/TC Mbit/day Byte/s 9 Interrupts 5 / s 2 DMA 1 PPS 1 RTEMS Task Timer SPACE WIRE SPACE CRAFT

5 IRQ or Typical size 2-4K Words Software Design, Data Flow Channels ACTEL and VIRTEX-4/5 (Total buffer memory ~16K Words 16bit TBC) Max input rate: 100KS/s - 1MS/s (16bit) (TBC) IRQ or IRQ Handler Control Move Data Task Unpack frames 1 2 ~50K to ~500K Words 32 bit Move Data IRQ signal Move Task Unpack frames Move Data Task PPS IRQ Handler Sync. to PPS. Update DMA Desc. tables Block Processing & Packaging Task H H 3 4 DMA Transfer Descriptor Tables ISP Packets probably <=2KB size Space Wire PPS IRQ Handler Sync. to PPS. Update DMA Desc. tables Stream Processing & Packaging Task H H 3 4 DMA Transfer Descriptor Tables ISP Packets probably <=2KB size Space Wire Example block processing => FFT, Example Stream => Digital filtering. Note buffer memory estimates above assume 8MB of RAM memory. A balance should be achieved between centralized processing (DPU) and localized processing (HF,MF,LF) and at the same time minimizing hardware locally to reduce power consumption and mass, thus share the central processing capability as much as possible.

6 Software Design, Interrupts We have many interrupts! (consequence of integrating) - 4 to 5 / s - 2 DMA (For both design A and B TBC) - 1 PPS - 1 RTEMS Task Timer - 2 Secondary redundant space wire link? 8 to 11 totally others? More than a LEON 2/3 processor with only one primary interrupt controller can handle! We need to add a secondary interrupt controller. Interrupts must not occur to often low frequency - Each interrupt has an overhead that accumulates Spend as little time as possible in each interrupt - Interrupts block each other - One interrupt can be pending - Even with implementing nesting ~50us of each interrupt block others Experience from SWARM & RTEMS estimated max IRQ frequency: SYS_CLK/10000/NO_OF_INTERRUPTS = 24e6/10000/9=267Hz Note above is a rough estimate applying a factor 10 margin. The interrupt design must be carefully done.

7 Software Design, Datation/Timestamping and Synchronization Different methods might be needed to accurately timestamp data for the different analyzers LF,HF,MF. 1. Counting backwards LF,HF,MF analyzers sample continuously if data not needed (due to duty cycle) it is discarded When creating a data package the instrument will count backwards from the present spacecraft time to determine the start time for the data within the packet. + Easy to implement - Not so accurate - Instrument running continuously with reduction and consuming power. 2. Link Adds Skew LF,HF,MF analyzers sample continuously if data not needed (due to duty cycle) it is discarded When the sends data over the link to the DPU it includes a skew (delta time) at the end of each frame between the last PPS pulse and the first reduced output sample. The skew is based on a common system clock. Suitable for continuous streams with high reduction like LF. + Accurate - A bit tricky to keep track of what PPS pulse the data belongs to. - Instrument running continuously with reduction and consuming power.

8 Software Design, Datation and Synchronization (Continued.) 3. Synchronize to PPS pulses DPU Controlled Instruments sample during intervals each interval starts on a PPS pulse. Each interval is controlled by the DPU by writing (anything) to registers: Write to the register Start on next PPS pulse Write to the register Stop Write to the register Start on next PPS pulse, stop when done Not suitable for continuous streams with high reduction like LF. Suitable for snapshots,bursts anything that run in intervals. + Accurate + Instrument do not run sampling/reduction continuously (saves power) + Easy to control sequencing/duty-cycle from DPU + Easier to keep track of a data period and the corresponding PPS pulse, some cases it can be difficult high duty cycle.

9 Software Design, Datation and Synchronization (Continued.) 4. Synchronize to PPS pulses DPU Control and frame tagging Instruments sample during intervals each interval starts on a PPS pulse. Each interval is controlled by the DPU by writing to registers: Write to the register Start on next PPS pulse, tag frames with tag bits, stop when done These tag bits should then be returned in each data frame corresponding to the interval, care must be taken that writing to this register do not affect the tag bits already in use for the present interval. Tag bits could be 1-4 bits (TBC) counting up in a cyclic manner, thus enforcing the DPU the instrument and the data to be in phase with known PPS pulses, it will also recover quickly from errors in the next frame. Not suitable for continuous streams with high reduction like LF. Suitable for snapshots,bursts anything that run in intervals. + Accurate + Instrument do not run sampling/reduction continuously (saves power) + Easy to control sequencing/duty-cycle from DPU + Always easy for software to to keep track of a data interval and corresponding PPS pulse by checking the tag bits in each frame. To increase datation accuracy further down to the sample period accuracy, one could possibly (TBC) create a version of the PPS pulse that is synchronized to the overall system clock if such a clock will exist. One would also need to compute the spacecraft time for this version of the PPS pulse, that is straightforward.

10 Software design, Sequencing and Duty Cycle What should the instruments do? and when? (PPS time base) Example of a LP-PWI sequence: Sweep Bias, Fix Density,Active Density, E-field.. repeat Automatic in software or done from S/C using OBCPs. What do we need and how flexible does it need to be? C O M P L E X I T Y SEQUENCE None Space Craft Fixed Multiple fixed Description Always do the same until otherwise commanded (but different for each instrument) with certain duty cycle (period) and offset. The S/C creates sequences using OBCPs and send commands, lots of commands from S/C. A fix sequence for each instrument, order of what to do can not be rearranged but parts can be turned on and off. Integrated in software structure more than one sequence not possible. As fixed but more than one sequence in memory and flash. F L E X I B I L I T Y Programmable When to do something and what fully programmable for each instrument. der of what to do can be changed. More than one sequence in memory and flash. PPS time base, period and offset means: if((pps_period_counter+offset) % period)==0) then do

11 Start Example of a sequence from SWARM Internal Offset Calibration 3s Zero Harmonic 1s Loop 124 times Sweep 1s Loop Forever Zero Harmonic 1s Loop 126 times Loop 167 times Note that the loops do not include the first time a LP function is executed. Duration of one cycle is then: (3+1*125)+(1+1*127)*168 = s Note that the normal mode is updated to always stay synchronized with a 128s period thus 21632=128*169. Since the increase of the Offset calibration function duration from 1s to 3s broke this synchronization.

12 Quality Assurance and Standards Instrument and Software Interface Requirements inside the EIDA (Will be based on following, ECSS-E-70 is useful to look at) Telemetry and Telecommand Packet Utilization, ECSS-E-70-41A, January 2003 Telemetry Channel Coding, CCSDS B-6 Packet Telemetry, CCSDS B-5 Telecommand Part 1. Channel Service, CCSDS B-3 Telecommand Part 2. Data Routing Service, CCSDS B-3 Telecommand Part 2.1 Command Operation Procedures, CCSDS B-2 Telecommand Part 3. Data Management Service, CCSDS B-2 Time Code Formats, CCSDS B-3 Software Quality Assurance ECSS-E-ST-40 Space engineering Software general requirements ECSS-Q-ST-80 Space product assurance Software product assurance Coding Standard (We will use our own version loosely based on this) BSSC(2000)1 Issue 1 C and C++ Coding Standards (Applicable?)

13 Software Development etc. Software Version Control System - SVN or GIT repository - Flight Software repository teams read access - Separate repositories for each team with read write access - System designer integrates into flight software repository RPWI Wiki Document Server Instrument logging and version control - Each instrument/sensor/board/main unit should have a hard coded unit id number readable by software. - Software version hard coded in software, preferably in fix position => easy verification of files. - All unit ids and software version then go into HK. - Unit ids are very useful to identify old data sets on Earth during development. (Each should have hard coded registers to verify read, and last-written register to verify read and write) Timing Debugging - To verify and debug timing non intrusively we need at least 4 reserved IO pins (GPIO or )

14 Estimated work hours Rough estimation! based on experience from SWARM and Rosetta Task Overall system design, minimum software testing and basic documentation. Processing algorithms (6 instruments with MIME) Flight software Integration and testing time! Processing algorithms for each team Design implementation and development Months *6 = *6 = 27 TOTAL (Sequential): 64 (5.3 years) TOTAL (Parallell): (3.27 years) Note that each team work in parallel with each other but they can not work fully In parallel with Flight software integration and testing (feedback). If we assume each team work in parallel with integration and testing 50% of the time and 1 person working on flight software the total duration would roughly be: Total time with parallel tasks: ( /2)= Months = ~3.27 Years Also note that above do not include time for QA.

15 Software To do list Boot loader Boot loader communication Boot loader flash memory write/read checksums and boot Flight software General system design TM Data DMA Tx irq handler TC Data DMA Rx irq handler TM/TC control tasks TC Parsing task House Keeping assembly Packet generation task Watching critical limits enter safe mode Event reporting event queues normal warning,critical etc. Error handling software exceptions, traps and events Kicking watchdog Flight software Maintenance mode, memory dumps/uploads Maintenance mode, software patching Maintenance mode, patching of data tables and memory areas Maintenance mode, duplicate boot loader functionality Maintenance mode, integrity tests memory tests Operational mode, Sequencing and control task Operational mode, Datation software Operational mode, Reconfiguration software part of TC parsing. Operational mode, Internal calibration software Operational mode, Data moving tasks/interrupts Operational mode, Processing/data packaging tasks Operational mode, Processing software scientific algorithms Safe mode, Turn off any high voltages save critical data to flash Define data packets Define commands and commanding philosophy Define event packets Define HK packet Define Internal data frames