SILANNA SEMICONDUCTOR
|
|
|
- Lynne Angela Kelly
- 5 years ago
- Views:
Transcription
1 SILANNA SEMICONDUCTOR SpaceWire Link Isolation Gil Baterina Product Marketing Seventeenth SpaceWire Working Group Meeting December 15, 2011 Noordwijk, NL
2 Topics Silanna Semiconductor Intro Silanna High Speed Digital Isolation Current Isolator Features applied to SpaceWire Isolation Requirements Proposed SpaceWire Link Isolation Product Block Diagram Product Features & Benefits Application Examples 2
3 Silanna Overview Founded in 1965 by AWA (Amalgamated Wireless Australasia) Microelectronics Ltd Sydney fab facilities was a joint venture w/ AWA, British Aerospace, & NSW government Previously part of Quality Semiconductor, Integrated Device Technology (IDT), & Peregrine Semiconductor Joined the Silanna Group Pty Ltd in 2008 Long term strategy of becoming global technology company 45+ yrs in semiconductor manufacturing Just completed $30M fab extension 100+ staff (25% growth in 18 months) Expanding w/ offices in US and UK 3
4 Silanna Capabilities Wafer fabrication facility (Sydney) Silicon on Sapphire processes (0.25 µm & 0.5 µm) Low cost reduced mask set prototyping service III V wafer fabrication (GaN, AlN, AlGaN) Growing IC Design team Advanced Technology Development team Prototype assembly facility (Brisbane) Wafer probe test facility ISO9001 and AS9100 certified 100s millions of devices shipped 100 s RF/mixed signal designs (PLLs, switches, attenuators etc.) Large multi national end customers 4
5 Silanna Space & Defence For Non US customers... we are ITAR FREE! For US customers... ONLY non US company to receive Accreditation of Trust (Trusted Foundry) Technologies for Space/Defence applications Ideal for Complex RF/Mixed Signal designs Radiation hard properties 10 years experience supplying Space/Defence ICs Manufacturing obsolete parts; and Developing new products for the market Boutique fab able to handle small runs Aerospace certification: AS9100 Rev B (Rev C in process) 5
6 Technology Overview Silicon on Sapphire (SoS) Insulating substrate eliminates parasitic capacitance and enables: Excellent RF performance (e.g. L band, S band, X band) High Q passives (e.g. 5nH Inductor with Q> 40 at 2GHz) Low cross talk High isolation (e.g. good RF switches) High linearity transistors (e.g. higher bandwidth per channel) Intrinsic Radiation Hardness: Total dose, SEU + SEL immunity 6
7 Silanna Digital Isolators Higher speed / Lower jitter >250Mbps on all channels in single ended device >>500Mbps in differential IO devices Enables isolation of higher speed protocols: e.g. USB 2.0 HS (480 Mbps), SpaceWire, VME, Ethernet Higher channel density / Smaller Footprint Multiple channels in a single die e.g. 4 bi dir 250Mbps Integration with other circuitry (analog / logic / high quality passives) Industry standards for transient galvanic isolation (2.5kV and 5.0kV) Insensitive to EMI Minimal Cross talk 7
8 Current Isolator Features Applicable to SpaceWire General Purpose Isolators SIL104xL LVTTL (single ended) I/Os 400 Mbps operation High voltage galvanic isolation 2.5 kvrms & 5 kvrms Selectable failsafe mode Low channel channel skew (<100 ps typ) USB 2.0 High speed Isolators SIL11USBx 1.5 Mbps, 12 Mbps, & 480 Mbps operation w/ auto speed negotiation Bidirectional differential signalling Adaptive I/O & terminations for High speed low swing differential transmission line operation USB datastreams are non DC balanced Working voltage >100V (for wide common mode range) 8
9 Proposed SpaceWire Link Isolator Target Features 4 high speed (400 Mbps) channels 2 transmit, 2 receive (Data+Strobe) Cable side: LVDS Module side: LVDS or LVTTL MTS /MTD can be used to select LVTTL mode for Mxx+ lines LVDS failsafe Isolation voltage: 2.5 kvrms (tbd) C: cable side, M: module side, R: receive, T: transmit, D: data, S: strobe External transformer for DC to DC isolation to power cable side from module side M2Cx to allow CTxx output enable/disable (via CTEN) from module side Cable side data lines align well w/ SpW cable connection 9
10 Application Examples FPGA Replace Discrete Driver/Receiver SpW Port FPGA SpW Port w/ Embedded SpW I/O 10
11 Application Examples Repeater 11
12 Feedback Other Features? Isolation voltage: 1 kvrms, 2.5 kvrms?? Control lines to disable CRxx & MTxx input terminations when external termination resistors are used? Control line to disable CRxx input termination for half duplex operation? Cold sparing on all pins C: cable side, M: module side, R: receive, T: transmit, D: data, S: strobe 12
European LVDS Driver Development and ESCC Evaluation and Qualification
European LVDS Driver Development and ESCC Evaluation and Qualification Aeroflex Gaisler AB Kungsgatan 12, SE-41119 Gothenburg, Sweden info@gaisler.com +46 31 775 86 50 1 Quick introduction ESA Contract
European LVDS driver development and ECSS evaluation and qualification
European LVDS driver development and ECSS evaluation and qualification resenter: Jørgen Ilstad 18 th SpW working group SpW component development ESTEC 25/04/2012 ESA UCLASSIFIED For Official Use ECI phase
Fairchild Semiconductor Application Note December 2000 Revised June What is LVDS? FIGURE 2. Driver/Receiver Schematic
LVDS Fundamentals Introduction With the recent developments in the communications market, the demand for throughput is becoming increasingly more crucial. Although older differential technologies provide
8. Selectable I/O Standards in Arria GX Devices
8. Selectable I/O Standards in Arria GX Devices AGX52008-1.2 Introduction This chapter provides guidelines for using industry I/O standards in Arria GX devices, including: I/O features I/O standards External
Mixed-Signal. From ICs to Systems. Mixed-Signal solutions from Aeroflex Colorado Springs. Standard products. Custom ASICs. Mixed-Signal modules
A passion for performance. Mixed-Signal solutions from Aeroflex Colorado Springs Standard products Custom ASICs Mixed-Signal modules Circuit card assemblies Mixed-Signal From ICs to Systems RadHard ASICs
Signal Integrity Comparisons Between Stratix II and Virtex-4 FPGAs
White Paper Introduction Signal Integrity Comparisons Between Stratix II and Virtex-4 FPGAs Signal integrity has become a critical issue in the design of high-speed systems. Poor signal integrity can mean
AN 754: MIPI D-PHY Solution with Passive Resistor Networks in Intel Low-Cost FPGAs
AN 754: MIPI D-PHY Solution with Passive Resistor Networks in Intel Low-Cost FPGAs Subscribe Send Feedback Latest document on the web: PDF HTML Contents Contents AN 754: MIPI D-PHY Solution with Passive
Advanced Computing, Memory and Networking Solutions for Space
Advanced Computing, Memory and Networking Solutions for Space 25 th Microelectronics Workshop November 2012 µp, Networking Solutions and Memories Microprocessor building on current LEON 3FT offerings UT699E:
LEON3-Fault Tolerant Design Against Radiation Effects ASIC
LEON3-Fault Tolerant Design Against Radiation Effects ASIC Microelectronic Presentation Days 3 rd Edition 7 March 2007 Table of Contents Page 2 Project Overview Context Industrial Organization LEON3-FT
Timing Solutions Overview
DESIG RESOURCES APPLICATIO-SPECIFIC AD REAL-TIE CLOCKS OVERVIEW Application-Specific Clocks Real-Time Clocks Timing Commander Software eeting Industry Standards IDT s real-time clock ICs are ultra-low-power
By Joe Grimm, Business Development Manager, RFIC Switches, California Eastern Laboratories
4590 Patrick Henry Drive Santa Clara, CA 95054-1817 Telephone: (408) 988-3500 Facsimile: (408) 988-0279 CMOS RFIC Switches: Simple and inexpensive, the latest 2.5GHz versions pose a legitimate challenge
Product Specification PE95421
Product Description The PE95421 is an RF SPDT switch available in a hermetically sealed ceramic package and also available in die. It covers a broad range of applications from 1-to-8500 MHz and has been
MIPI D-PHY Solution with Passive Resistor Networks in Altera Low Cost FPGA
2015.12.23 MIPI D-PHY Solution with Passive Resistor Networks in Altera Low Cost FPGA AN-754 Subscribe Introduction to MIPI D-PHY The Mobile Industry Processor Interface (MIPI) is an industry consortium
Chapter 2 On-Chip Protection Solution for Radio Frequency Integrated Circuits in Standard CMOS Process
Chapter 2 On-Chip Protection Solution for Radio Frequency Integrated Circuits in Standard CMOS Process 2.1 Introduction Standard CMOS technologies have been increasingly used in RF IC applications mainly
4. Selectable I/O Standards in Stratix II and Stratix II GX Devices
4. Selectable I/O Standards in Stratix II and Stratix II GX Devices SII52004-4.6 Introduction This chapter provides guidelines for using industry I/O standards in Stratix II and Stratix II GX devices,
High Performance Mixed-Signal Solutions from Aeroflex
High Performance Mixed-Signal Solutions from Aeroflex We Connect the REAL World to the Digital World Solution-Minded Performance-Driven Customer-Focused Aeroflex (NASDAQ:ARXX) Corporate Overview Diversified
Microelettronica. J. M. Rabaey, "Digital integrated circuits: a design perspective" EE141 Microelettronica
Microelettronica J. M. Rabaey, "Digital integrated circuits: a design perspective" Introduction Why is designing digital ICs different today than it was before? Will it change in future? The First Computer
PXI Tsunami in Semiconductor ATE Michael Dewey Geotest Marvin Test Systems Silicon Valley Test Conference
PXI Tsunami in Semiconductor ATE Michael Dewey Geotest Marvin Test Systems miked@geotestinc.com Silicon Valley Test Conference 2012 1 Agenda Geotest background Semiconductor market and trends PXI for semiconductor
ANTC205. Introduction
ANTC205 Introduction The JitterBlocker takes very noisy and jittery clocks and cleans out all the deterministic and excessive jitter. It can handle thousands of picoseconds of period jitter at its input
SpaceWire Link interface: LVDS, Power & Cross-strapping Aspects
Eleventh SpaceWire Working Group Meeting SpaceWire Link interface: LVDS, Power & Cross-strapping Aspects Sven Lansdtroem sven.landstroem@esa.int Wahida Gasti wahida.gasti@esa.int 1 AGENDA Introduction
Power Matters. Antifuse Product Information Brochure
Power atters. Antifuse Product Information Brochure Providing industry-leading FPGAs and SoCs for applications where security is vital, reliability is non-negotiable and power matters. 2 www.microsemi.com/fpga-soc
SpaceWire ECSS-E50-12A International SpaceWire Seminar (ISWS 2003)
SpaceWire ECSS-E50-12A International SpaceWire Seminar (ISWS 2003) 4-5 November 2003, ESTEC Noordwijk, The Netherlands Steve Parkes (1), Josep Rosello (2) (1) University of Dundee, Applied Computing, Dundee,
High Reliability Electronics for Harsh Environments
High Reliability Electronics for Harsh Environments Core Capabilities API Technologies is a world leader in the supply of microelectronic products and services supporting mission critical applications,
HiPAC High Performance Actives & Passives on Chip
HiPAC High Performance Actives & Passives on Chip Passive Integration on Silicon Solutions & Target Components to be integrated Solutions Resistors Inductors Transformers Capacitors Diodes Transistors
PARAMETER MIN TYP MAX UNIT COMMENTS TID krad SEL MeV cm 2 /mg SEE performance Err/Bit/day For a GEO orbit (TBC)
ARQ-LVD001 RAD-HARD 500 Mbps Bus LVDS Quad Driver FEATURES 500.0 Mbps low jitter data path 3.3 V power supply Low Power Consumption 24 ma output driver short circuit (OUT+, OUT ) Cold sparing on all pins
SpaceWire 101. Webex Seminar. February 15th, 2006
SpaceWire 101 Webex Seminar February 15th, 2006 www.aeroflex.com/spacewire SpaceWire 101 What is SpaceWire Protocol, Links, Basic Communication Architecture Physical Layer Interface and Network Components
GLAST. Prototype Tracker Tower Construction Status
Prototype Tracker Tower Construction Status June 22, 1999 R.P. Johnson Santa Cruz Institute for Particle Physics University of California at Santa Cruz 1 1 11 2 3 5 4 Prototype Tracker Tower Configuration
ASNT1011A-KMA DC-to-17Gbps Digital Multiplexer 16:1 / Serializer
ASNT1011A-KMA DC-to-17Gbps Digital Multiplexer 16:1 / Serializer Broadband digital serializer 16 to 1 operating seamlessly from DC to 17Gbps LVDS compliant input data buffers Full-rate clock output Clock
FIN1101 LVDS Single Port High Speed Repeater
FIN1101 LVDS Single Port High Speed Repeater General Description This single port repeater is designed for high speed interconnects utilizing Low Voltage Differential Signaling (LVDS) technology. It accepts
SpaceWire IP Cores for High Data Rate and Fault Tolerant Networking
SpaceWire IP Cores for High Data Rate and Fault Tolerant Networking E. Petri 1,2, T. Bacchillone 1,2, N. E. L Insalata 1,2, T. Cecchini 1, I. Del Corona 1,S. Saponara 1, L. Fanucci 1 (1) Dept. of Information
ASICs Digital and Mixed-Signal
ASICs Digital and Mixed-Signal Brochure January 2018 Digital and Mixed-Signal custom, semi custom, off-the-shelf designs with Cobham Gaisler IP Guaranteed radiation performance QML-V, QML-Q, QML-Y, military,
ASNT1011-KMA DC-to-17Gbps Digital Multiplexer 16:1 / Serializer
ASNT1011-KMA DC-to-17Gbps Digital Multiplexer 16:1 / Serializer Broadband digital serializer 16 to 1 LVDS compliant input data buffers Full-rate clock output Clock-divided-by-16 LVDS output buffer with
Product Specification PE95421
Product Description The PE95421 is an RF SPDT switch available in a hermetically sealed ceramic package and also available in die. It covers a broad range of applications from 1-to-8500 MHz and has been
Control Devices Surface Mount Input-Limiting Diode Element
GC4212-6LP Datasheet Control Devices Surface Mount Input-Limiting Diode Element Released December 2017 Contents 1 Revision History... 1 1.1 Revision 1.0... 1 2 Product Overview... 2 2.1 Applications...
Over 5,000 products High Performance Adapters and Sockets Many Custom Designs Engineering Electrical and Mechanical ISO9001:2008 Registration
Overview Company Overview Over 5,000 products High Performance Adapters and Sockets Many Custom Designs Engineering Electrical and Mechanical ISO9001:2008 Registration Adapter Technology Overview Pluggable
AN-727 APPLICATION NOTE One Technology Way P.O. Box 9106 Norwood, MA Tel: 781/ Fax: 781/
APPLICATION NOTE One Technology Way P.O. Box 9106 Norwood, MA 02062-9106 Tel: 781/329-4700 Fax: 781/326-8703 www.analog.com icoupler Isolation in RS-485 Applications by Sean Clark INTRODUCTION The RS-485
AIM Photonics: Manufacturing Challenges for Photonic Integrated Circuits
AIM Photonics: Manufacturing Challenges for Photonic Integrated Circuits November 16, 2017 Michael Liehr Industry Driving Force EXA FLOP SCALE SYSTEM Blades SiPh Interconnect Network Memory Stack HP HyperX
Adapter Technologies
Adapter Technologies Toll Free: (800) 404-0204 U.S. Only Tel: (952) 229-8200 Fax: (952) 229-8201 email: info@ironwoodelectronics.com Introduction Company Overview Over 5,000 products High Performance Adapters
PARAMETER MIN TYP MAX UNIT COMMENTS TID Krad SEL MeVcm 2 /mg SEE performance 1E Err/Bit/day For a GEO orbit
RAD-HARD Octal 500 Mbps Bus LVDS Repeater FEATURES 500.0 Mbps low jitter fully differential data path 250MHz clock channel 3.3V power supply 24mA output driver short circuit (OUT+, OUT ) Cold sparing on
Applications, Processing and Integration Options for High Dielectric Constant Multi-Layer Thin-Film Barium Strontium Titanate (BST) Capacitors
Applications, Processing and Integration Options for High Dielectric Constant Multi-Layer Thin-Film Barium Strontium Titanate (BST) Capacitors Agenda Introduction What is BST? Unique Characteristics of
TechSearch International, Inc.
Silicon Interposers: Ghost of the Past or a New Opportunity? Linda C. Matthew TechSearch International, Inc. www.techsearchinc.com Outline History of Silicon Carriers Thin film on silicon examples Multichip
Lockheed Martin Nanosystems
Lockheed Martin Nanosystems National Nanotechnology Initiative at Ten: Nanotechnology Innovation Summit December 2010 Dr. Brent M. Segal Director & Chief Technologist, LM Nanosystems brent.m.segal@lmco.com
CAD for VLSI. Debdeep Mukhopadhyay IIT Madras
CAD for VLSI Debdeep Mukhopadhyay IIT Madras Tentative Syllabus Overall perspective of VLSI Design MOS switch and CMOS, MOS based logic design, the CMOS logic styles, Pass Transistors Introduction to Verilog
Baluns and 90 Degree Hybrid Couplers. Directional Couplers. Attenuators, Resistors and Terminations. Combiners/Dividers
Baluns and 90 Degree Hybrid Couplers Directional Couplers Combiners/Dividers Attenuators, Resistors and Terminations RF and Microwave Passive Components for Military, Medical, Industrial and Wireless Applications
OPERATIONAL UP TO. 300 c. Microcontrollers Memories Logic
OPERATIONAL UP TO 300 c Microcontrollers Memories Logic Whether You Need an ASIC, Mixed Signal, Processor, or Peripheral, Tekmos is Your Source for High Temperature Electronics Using either a bulk silicon
Using ASIC circuits. What is ASIC. ASIC examples ASIC types and selection ASIC costs ASIC purchasing Trends in IC technologies
Using ASIC circuits What is this machine? ASIC examples ASIC types and selection ASIC ASIC purchasing Trends in IC technologies 9.3.2004 Turo Piila 1 9.3.2004 Turo Piila 2 What is ASIC Floorplan and layout
MPS4101-6LP Datasheet 50 MHz 25 GHz RoHS-Compliant Control Device QFN SPST PIN
MPS4101-6LP Datasheet 50 MHz 25 GHz RoHS-Compliant Control Device QFN SPST PIN Microsemi Corporate Headquarters One Enterprise, Aliso Viejo, CA 92656 USA Within the USA: +1 (800) 713-4113 Outside the USA:
ESD Protection Structure with Inductor-Triggered SCR for RF Applications in 65-nm CMOS Process
ESD Protection Structure with Inductor-Triggered SCR for RF Applications in 65-nm CMOS Process Chun-Yu Lin 1, Li-Wei Chu 1, Ming-Dou Ker 1, Ming-Hsiang Song 2, Chewn-Pu Jou 2, Tse-Hua Lu 2, Jen-Chou Tseng
6. I/O Features in Stratix IV Devices
6. I/O Features in Stratix IV Devices September 2012 SIV51006-3.4 SIV51006-3.4 This chapter describes how Stratix IV devices provide I/O capabilities that allow you to work in compliance with current and
Flexible Hybrid Electronics Solutions for Wearable Sensor Systems. Richard Chaney American Semiconductor, Inc.
Flexible Hybrid Electronics Solutions for Wearable Sensor Systems Richard Chaney American Semiconductor, Inc. What is a Flexible Hybrid System (FHS)? Printed Electronics Low Cost, R2R, Large Format Flexible
Moore s Law: Alive and Well. Mark Bohr Intel Senior Fellow
Moore s Law: Alive and Well Mark Bohr Intel Senior Fellow Intel Scaling Trend 10 10000 1 1000 Micron 0.1 100 nm 0.01 22 nm 14 nm 10 nm 10 0.001 1 1970 1980 1990 2000 2010 2020 2030 Intel Scaling Trend
Technical Article MS-2442
Technical Article MS-2442. JESD204B vs. Serial LVDS Interface Considerations for Wideband Data Converter Applications by George Diniz, Product Line Manager, Analog Devices, Inc. Some key end-system applications
ASNT1011-KMA DC-to-17Gbps Digital Multiplexer / Serializer 16:1or 8:1
ASNT1011-KMA DC-to-17Gbps Digital Multiplexer / Serializer 16:1or 8:1 Broadband programmable digital serializer 16-to-1 or 8-to-1 LVDS compliant input data buffers Full-rate clock output Selectable LVDS-compliant
MAXIM INTEGRATED PRODUCTS
RELIABILITY REPORT FOR MAX9169ESE+ (MAX9170) PLASTIC ENCAPSULATED DEVICES October 29, 2008 MAXIM INTEGRATED PRODUCTS 120 SAN GABRIEL DR. SUNNYVALE, CA 94086 Approved by Ken Wendel Quality Assurance Director,
Serializer Deserializer POSSIBILITIES OF COMMUNICATION. MADE EASY. For extremely high communications reliability in radiation environments
Serializer Deserializer POSSIBILITIES OF COMMUNICATION. MADE EASY. For extremely high communications reliability in radiation environments Serializer Deserializer Industry challenges The industry continues
PI6LC48L0201A 2-Output LVDS Networking Clock Generator
Features ÎÎTwo differential LVDS output pairs ÎÎSelectable crystal oscillator interface or LVCMOS/LVTTL single-ended clock input ÎÎSupports the following output frequencies: 62.5MHz, 125MHz, 156.25MHz
Application Note: Optical data transmission with the Avocet Image Sensor
: Optical data transmission with the Avocet Image Sensor This application note presents a reference design for using optical data transmissions with the MLX75411 Avocet image sensor. The MLX75605 optical
ASNT Gbps 1:16 Digital Deserializer
12.5Gbps 1:16 Digital Deserializer Broadband up to 12.5Gbps (gigabits per second) 1:16 Deserializer High-speed Input Data Buffer with on-chip 100Ohm differential termination. Full-rate CML Input Clock
Features. Applications
3.3V Ultra-Precision 1:4 LVDS Fanout Buffer/Translator with Internal Termination General Description The is a 3.3V, high-speed 2GHz differential low voltage differential swing (LVDS) 1:4 fanout buffer
Modeling and Verifying Mixed-Signal Designs with MATLAB and Simulink
Modeling and Verifying Mixed-Signal Designs with MATLAB and Simulink Arun Mulpur, Ph.D., MBA Industry Group Manager Communications, Electronics, Semiconductors, Software, Internet Energy Production, Medical
Actuator Power Systems for MEA
Power Matters. TM Actuator Power Systems for MEA 1 Introduction to More Electric Aircrafts WHY? Reduce maintenance costs Reduce fuel burn and environmental impact Improve safety and reliability HOW are
MAXIM INTEGRATED PRODUCTS
RELIABILITY REPORT FOR MAX9266GCM/V+T PLASTIC ENCAPSULATED DEVICES November 29, 2011 MAXIM INTEGRATED PRODUCTS 120 SAN GABRIEL DR. SUNNYVALE, CA 94086 Approved by Richard Aburano Quality Assurance Manager,
Development an update. Aeroflex Gaisler
European SpaceWire Router Development an update Sandi Habinc Aeroflex Gaisler Demand for SpaceWire Router Both European and international customers have shown interest in SpaceWire router with greater
Mixed Signal ICs for Space
Power Matters. TM Mixed Signal ICs for Space Microsemi Space Forum 2015 Dorian Johnson Product Marketing Manager High Reliability ICs 1 New Products Legacy Custom Mixed Signal ICs for Space SSM Telemetry
EE586 VLSI Design. Partha Pande School of EECS Washington State University
EE586 VLSI Design Partha Pande School of EECS Washington State University pande@eecs.wsu.edu Lecture 1 (Introduction) Why is designing digital ICs different today than it was before? Will it change in
RADIATION TEST OF TFSMART2 TECHNOLOGY USING EXTENDED COMMON MODE LVDS AND DC-DC CONVERTER COMPONENTS
RADIATION TEST OF TFSMART2 TECHNOLOGY USING EXTENDED COMMON MODE LVDS AND DC-DC CONVERTER COMPONENTS ABSTRACT Volodymyr Burkhay (1), Gürkan Ilicali (2), André Rocke (3) (1) TELEFUNKEN Semiconductors GmbH
Beyond Chip Stacking---Quilt Packaging Enabled 3D Systems
Beyond Chip Stacking---Quilt Packaging Enabled 3D Systems Jason Kulick, President & Co-Founder jason.kulick@indianaic.com 574-217-4612 (South Bend, IN) May 3, 2016 2016 New England IMAPS Symposium Presentation
IGBT Drivers Design for Quality
IGBT Drivers Design for Quality Heinz Rüedi and Jan Thalheim CT-Concept Technologie AG Renferstrasse 15 2504 Biel-Bienne (Switzerland) Tel +41 32 341 41 01 Fax +41 32 341 71 21 E-Mail Info@IGBT-Driver.com
Parallel connection / operations and current share application note
Parallel connection / operations and current share application note Overview This document will examine method for active load sharing, basic criteria and performances of such a function on Glary UH and
Fiber Optic Components Dedicated to supplying industry standard fiber optic components!
Fiber Optic Components Dedicated to supplying industry standard fiber optic components! Authorized distribution provided in alliance with Sensible Micro Corporation 13520 Prestige Place Tampa, FL 33635
Obsolete. Product Specification PE4210. Product Description. SPDT UltraCMOS RF Switch 10 MHz - 3 GHz Features Single 3-volt power supply
Product Description The PE421 UltraCMOS RF Switch is designed to cover a broad range of applications from 1 MHz to 3 GHz. This singlesupply switch integrates on-board CMOS control logic driven by a simple,
16th Microelectronics Workshop Oct 22-24, 2003 (MEWS-16) Tsukuba Space Center JAXA
16th Microelectronics Workshop Oct 22-24, 2003 (MEWS-16) Tsukuba Space Center JAXA 1 The proposed presentation explores the use of commercial processes, including deep-sub micron process technology, package
Electronics_. Singapore - Global Electronics Hub. At a Glance
Electronics_ Singapore - Global Electronics Hub At a Glance Singapore has developed a strong foundation for the Electronics industry over the last 40 years, transforming from its modest beginnings as the
RELIABILITY REPORT FOR. MAX485ExxA PLASTIC ENCAPSULATED DEVICES. November 19, 2002 MAXIM INTEGRATED PRODUCTS 120 SAN GABRIEL DR. SUNNYVALE, CA 94086
MAX485ExxA Rev. A RELIABILITY REPORT FOR MAX485ExxA PLASTIC ENCAPSULATED DEVICES November 19, 2002 MAXIM INTEGRATED PRODUCTS 120 SAN GABRIEL DR. SUNNYVALE, CA 94086 Written by Reviewed by Jim Pedicord
µmodule Isolators Complete Isolation and Power for Standard Serial Interfaces and Devices
µmodule Isolators Transformer Isolated Power Decoupling Caps Diodes Isolators Coupled Signal Inductors LDO Application Die Complete and Power for Standard Serial s and Devices Linear Technology s µmodule
Interfacing FPGAs with High Speed Memory Devices
Interfacing FPGAs with High Speed Memory Devices 2002 Agenda Memory Requirements Memory System Bandwidth Do I Need External Memory? Altera External Memory Interface Support Memory Interface Challenges
Clock Generator for PowerQUICC and PowerPC Microprocessors and
Freescale Semiconductor Technical Data Clock Generator for PowerQUICC and PowerPC Microprocessors and Microcontrollers Clock Generator for PowerQUICC and PowerPC Microprocessors and DATA SHEET Rev 1, 11/2004
FIN1102 LVDS 2 Port High Speed Repeater
LVDS 2 Port High Speed Repeater General Description This 2 port repeater is designed for high speed interconnects utilizing Low Voltage Differential Signaling (LVDS) technology. The FIN1102 accepts and
Wafer Probe card solutions
Wafer Probe card solutions Innovative Solutions to Test Chips in the Semiconductor Industry Our long term experience in the electronic industry and our strong developing and process teams are inspired
2. Control Pin Functions and Applications
IMARY CONTROL ( PIN) Module Enable / Disable. The module can be disabled by pulling the below 2.3 V with respect to the Input. This should be done with an open-collector transistor, relay, or optocoupler.
ASNT1011. ASNT1011-PQA DC-to-16Gbps Digital Multiplexer 16:1 / Serializer
Advaed Sciee And Novel Technology Company, I. 27 Via Porto Grande, Raho Palos Verdes, CA 90275 ASNT1011-PQA DC-to-16Gbps Digital Multiplexer 16:1 / Serializer Broadband digital serializer 16-to-1. LVDS
Application Note No. 100
Application Note, Rev. 1.2, May 2007 Application Note No. 100 ESD Protection for High-Speed Applications 1- & 2-channel low capacitance bi-directional ESD diode in ultra-small TSLP package Small Signal
4. Selectable I/O Standards in Stratix & Stratix GX Devices
4. Selectable I/O Standards in Stratix & Stratix GX Devices S52004-3.4 Introduction The proliferation of I/O standards and the need for higher I/O performance have made it critical that devices have flexible
Design Guidelines for Intel FPGA DisplayPort Interface
2018-01-22 Design Guidelines for Intel FPGA DisplayPort Interface AN-745 Subscribe The design guidelines help you implement the Intel FPGA DisplayPort IP core using Intel FPGA devices. These guidelines
A ONE CHIP HARDENED SOLUTION FOR HIGH SPEED SPACEWIRE SYSTEM IMPLEMENTATIONS
A ONE CHIP HARDENED SOLUTION FOR HIGH SPEED SPACEWIRE SYSTEM IMPLEMENTATIONS Joseph R. Marshall, Richard W. Berger, Glenn P. Rakow Conference Contents Standards & Topology ASIC Program History ASIC Features
Obsolescence Solutions
Obsolescence Solutions Strategic Obsolescence Management Sales Office North Robert-Bosch-Strasse 25 25335 Elmshorn Germany phone: +49-4121-463-900 fax: +49-4121-463-901 e-mail: schroeder@kamaka.de Headquarters
SpaceWire Router ASIC
SpaceWire Router ASIC Steve Parkes, Chris McClements Space Technology Centre, University of Dundee Gerald Kempf, Christian Toegel Austrian Aerospace Stephan Fisher Astrium GmbH Pierre Fabry, Agustin Leon
Mixed Signal IP Design Guide
Mixed Signal IP Design Guide Vol13 Iss2 v3, Nov. 5, 2013 The Leading Provider of High-Performance Silicon-Proven Mixed-Signal IP BENEFITS Integrate Mixed-Signal Content into Your SoC Improve Performance
Achieve Peak Performance
RF/Microwave GaN Power Transistors Achieve Peak Performance General Purpose Surface Mount and Drivers CW and Pulsed Power L- Avionics and Radar S- Radar C- Radar and Communications General Purpose Surface
ASNT1011A. ASNT1011A-PQA DC-to-17Gbps Digital Multiplexer 16:1 / Serializer
Advaed Sciee And Novel Technology Company, I. 27 Via Porto Grande, Raho Palos Verdes, CA 90275 ASNT1011A-PQA DC-to-17Gbps Digital Multiplexer 16:1 / Serializer Broadband digital serializer 16-to-1. LVDS
Epigap FAQs Part packges and form factors typical LED packages
3. packges and form factors 3.1. typical LED packages Radiation from LEDs is generated by a semiconductor chip mounted in a package. LEDs are available in a variety of designs significantly influencing
PESDR0554S2. 4-Line Low Capacitance TVS Diode Array. Mechanical Characteristics. Description. Applications. Features. Ordering Information
4-Line Low Capacitance TVS Diode Array Description The is a low capacitance TVS array, utilizing leading monolithic silicon technology to provide fast response time and low ESD clamping voltage, making
SEIKO EPSON CORPORATION
Power Bus Switch IC 1 to 1 Bus Switch OVERVIEW The S1F77310 series is the bus switch suitable for USB applications. The adopted CMOS process technology characterizes the S1F77310 series by low power consumption.
UM5204EEBF. Quad Channel Low Capacitance ESD Protection Array UM5204EEAF SC70-6/SC88/SOT363 UM5204EECF TSOP-6/SOT23-6. General Description
Quad Channel Low Capacitance ESD Protection Array UM5204EEAF SC70-6/SC88/SOT363 UM5204EEBF SC89-6/SOT563/SOT666 UM5204EECF TSOP-6/SOT23-6 General Description are surge rated diode arrays designed to protect
Current status of SOI / MPU and ASIC development for space
The 23rd Microelectronics Workshop Current status of SOI / MPU and ASIC development for space Nov. 11 th 2010 Electronic Devices and Materials Group Aerospace Research and Development Directorate, JAXA
Managing the downturn, Ready for the Upswing
Managing the downturn, Ready for the Upswing Scott McGregor President and Chief Executive Officer Agenda for today Managing the downturn, ready for the upswing Scott McGregor, President and CEO, Focus
V DD Power supply voltage V. V I Voltage on any input -0.3 T ST T OP. PIN Input power (50Ω) 30 dbm V ESD
Product Description The PE4239 UltraCMOS RF switch is designed to cover a broad range of applications from DC through 3. GHz. This reflective switch integrates on-board CMOS control logic with a low voltage
A VARIETY OF ICS ARE POSSIBLE DESIGNING FPGAS & ASICS. APPLICATIONS MAY USE STANDARD ICs or FPGAs/ASICs FAB FOUNDRIES COST BILLIONS
architecture behavior of control is if left_paddle then n_state
MINER-S Station Controller. Substation Automation
Substation Automation MINER-S Station Controller incorporates traditional RTU functions with new technology in a compact design MINER-S Station Controller combines the functions of a traditional RTU with
UT54LVDM328 Octal 400 Mbps Bus LVDS Repeater Data Sheet August, 2002
Standard Products UT54LVDM328 Octal 400 Mbps Bus LVDS Repeater Data Sheet August, 2002 FEATURES 400.0 Mbps low jitter fully differential data path 200MHz clock channel 3.3 V power supply 10mA LVDS output