John Cornforth (1), Andrew Bacon (1), I Sturland (2), Roland Trautner (TO) (3) (1) Presented by John Cornforth

Transcription

1 Smart Microsystems A Feasibility Study to Investigate the Decentralisation of Space Systems with highly efficient Micronodes using advanced ASIC technologies John Cornforth (1), Andrew Bacon (1), I Sturland (2), Roland Trautner (TO) (3) (1) SEA, (2) BAE Systems, (3) ESA Presented by John Cornforth At the Fourth International Workshop on Analogue and Mixed Signal Integrated Circuits For Space Applications (AMICSA) ESTEC 26 th - 28 th August 2012 Classification

2 Study Partners SEA Prime Contractor BAE Systems Sub-Contractor SEA House, Building 660, Bristol Business Park, Coldharbour Lane, Bristol, England. Advanced Technology Centre, FPC267, Golf Course Lane, PO Box 5, Filton, Bristol, England ESA Technical Officer; R. Trautner Smart Microsystems for Space Applications Study part of ESA s General Studies Programme (GSP) Duration: Jan 2012 Jan

3 Content Typical Centralised Architecture Overview 3

4 Content Benefits of De-centralisation 4

5 Content Chosen Micronode Designs to take forward 5

6 Content Summary of Micronode Advantages 6

7 Content Packaging Solutions and MEMs Opportunities 7

8 Content Usage in AIT 8

9 Content ASIC Wish List 9

10 Content Ongoing work 10

11 Centralised System Architecture Traditional Centralised System Large Harness Mass (typically 9% of spacecraft mass). System Vulnerability to Failures. 11

12 Centralised System Architecture Traditional Centralised System Large Harness Mass (typically 9% of spacecraft mass). System Vulnerability to Failures. 12

13 Centralised System Architecture Traditional Centralised System Large Harness Mass (typically 9% of spacecraft mass). System Vulnerability to Failures. PDCU with separate Nominal and Redundant harnesses to each Spacecraft Module. 13

14 Centralised System Architecture including an RIU BepiColombo MPO Remote Interface Unit (RIU) built by SEA illustrating a typical centralised system with 360 Thermistor inputs, 56 Analogue inputs, 144 Relay Status and 32 Bi-level digital inputs. 16 Thruster Heater outputs, 8 Thruster Valve outputs and 8 Latch Valve outputs. Connectors shown are nominal side only! 14

15 Why Use a Decentralised System? De-centralised System Reduced Harness Mass. Localised Control Capability. Increased System Reliability due to less centralised architecture. 15

16 Why Use a Decentralised System? De-centralised System Reduced Harness Mass. Localised Control Capability. Increased System Reliability due to less centralised architecture. Micronode design using miniaturisation technologies to achieve low mass, power & volume standardised modules. Synergy with modern decentralised Automotive Systems. 16

17 Micronode Selection A trade-off to was carried out, looking to; Maximise Mass Reduction Maximise Sensor/ Actuator Integration 17

18 Micronode Selection A trade-off to was carried out, looking to; Maximise Mass Reduction Maximise Sensor/ Actuator Integration Trade-off Concluded on two types of Micronodes; Power Micronode Environmental Micronode 18

19 Power Management Micronode Architecture Subsystem A (No Redundancy) Subsystem B (Redundant Subsystem Halves) A Subsystem C (Cross-Strapped Subsystem Redundant A Halves) Power Control and Distribution Unit (PCDU) LCL LCL Control Control LCL LCL Primary High V Bus A Redundant High V Bus A un un un un un On-Board Computer Primary Data Bus A Redundant Data Bus A 19

20 Power Management Micronode To PCDU To Other Micronodes EMC Filter Power Management Micronode Power Switching Module (PSM) Data Bus Micronode Control Module (MCM) Remote Terminal DC/DC Converter Voltage/ Current Monitor A/B Temp Sensors Current Limiter Processor ADC, Conditioning and MUX Isolation Barrier ADC and Conditioning Temp Sensors Power Switch LCL RE Voltage/ Current Monitor A/B RSA Receiver EN Current Limiter Linear Regulator Voltage/ Current Monitor A/B EN DC/DC Converter Voltage/ Current Monitor A/B Power Switch Optional Components Key Discrete I/O Non-Isolated Primary Power Isolated Internal Power Non-Isolated Internal Power Isolated Secondary Power Component Input Component Supply Isolated 0V Ref Non-Isolated 0V Ref Subsystem Primary Power Subsystem Relay Status Acquisition (RSA) Signals Subsystem Secondary Power 20

21 Environment Management Micronode Architecture AAM Analogue Acquisition Module HDM Heater Drive Module EuN Environmental Micronode 21

22 Environment Management Micronode Environmental Management Micronode Primary Power Input Switch- On Signal Relay Status Signal Micronode Control Module (MCM) Voltage/ Bus Current Isolator Monitor A/B RSA Source Optional Components Voltage/ Current Monitor A/B Linear Regulator Current Limiter (TBD) EMC Filter EN ADC Isolation Barrier Processor DC/DC Converter ADC Remote Terminals SE MUX Temp Sensors Voltage/ Current Monitor A/B AAM Expansion Slot HDM Expansion Slot ADC and MUX Sensor Conditioning Analog Acquisitions Module (AAM) Heater Drive Module (HDM) EMC Filter Temp Sensors EN RE LCL Voltage/ Current Monitor A/B Heater Drive Data Bus Key Discrete I/O Non-Isolated Primary Power Isolated Internal Power Non-Isolated Internal Power Data Bus Component Input Component Supply Isolated 0V Ref Non-Isolated 0V Ref Sensor Inputs Heater Drive Output 22

23 Summary of Advantages Decentralised Environmental Management Micronode Decentralised Power Management Micronode Health/ Status Monitoring Harness Reduction Modular Architecture Autonomous Control Shorter Sensor Data Paths Can implement LCL s for Heater Control etc. Large number of Compatible Environmental Sensors i.e. Accelerometers/ strain gauges/ Thermistors. Health/ Status Monitoring Harness Reduction Modular Architecture Design/ Verification Time Reduction Standardised DC/DC Converters, Filters and Switching 23

24 Micronode Packaging Options Potential Packaging Technologies; Rigid PCB Incorporating a Multi Chip Module Micronode Enclosure Top Flexi-rigid PCB Metal Enclosure Incorporating the Power Supplies/ EMC Filters and Power Switching and Connectors Flip Chip with Through Silicon Vias (TSV) System in Package (SiP) 3D Packaging Multi Chip Module (MCM) Packaging Wafer Level Packaging (WLP) ASIC development either Mixed Signal or separate Digital and Analogue ASICs 24

25 Micronode MEMS Opportunities Integrated Sensor/ ASIC capabilities using WLP Isolation Barrier Data Transfer Low power DC/DC Conversion 25

26 Harness Reduction during AIT Micronode Modules could vastly simplify AIT environmental monitoring during Temp/ Vac for example when commercial options would not be a viable solution. 26

27 MICRONODE ASIC REQUIREMENTS WISH-LIST The following WISH-List is a starting point to identify potentially useful Micronode ASIC functionality; Micro-controller (ie. LEON Lite FPGA Core) Logic flash or non-flash programmable cells Oscillator (>4MHz <12MHz) EEPROM/ PROM/ RAM allowing for in flight S/W uploads from the OBC (size TBC) 27

28 MICRONODE ASIC REQUIREMENTS WISH-LIST The following WISH-List is a starting point to identify potentially useful Micronode ASIC functionality; Micro-controller (ie. LEON Lite FPGA Core) Logic flash or non-flash programmable cells Oscillator (>4MHz <12MHz) EEPROM/ PROM/ RAM allowing for in flight S/W uploads from the OBC Low Offset Low Drift Rail to Rail Operational amplifiers with adjustable gain Multiplexers with built in input protection (similar to SMD ) PWM controllers for DC/DC PSU and POL (similar to SMD ) Communication Interface (i.e. CAN/1553/RS485/I2C/SPI/Spacewire/Data over Power) Maximise the use of the ESA DARE Library wherever possible 12/16 bit ADC and 12 bit DAC Analogue Signal Interfaces for Type ANY/ ANP/ AN1/ AN2/ RSA and BLD General I/O voltages tolerant to 5V and 3V3 28

29 MICRONODE ASIC REQUIREMENTS WISH-LIST The following WISH-List is a starting point to identify potentially useful Micronode ASIC functionality; Micro-controller (ie. LEON Lite FPGA Core) Logic flash or non-flash programmable cells Oscillator (>4MHz <12MHz) EEPROM/ PROM/ RAM allowing for in flight S/W uploads from the OBC Low Offset Low Drift Rail to Rail Operational amplifiers with adjustable gain Multiplexers with built in input protection (similar to SMD ) PWM controllers for DC/DC PSU and POL (similar to SMD ) Communication Interface (i.e. CAN/1553/RS485/I2C/SPI/Spacewire/Data over Power) Maximise the use of the ESA DARE Library wherever possible 12/16 bit ADC and 12 bit DAC Analogue Signal Interfaces for Type ANY / ANP/ AN1/ AN2/ RSA and BLD General I/O voltages tolerant to 5V and 3V3 Lifetime in excess of 7 years in orbit +2 years on the ground Thermal operation -40 C to +70 C with a non operating range of -50 C to +125 C Reliability 0.95 > 30KRads TID, >100MeV SEE (SEU/SET) 29

30 Ongoing Work Finalise the detailed Micronode Requirements Specification Undertake a technology survey for breadboard prototype s Compile a Micronode Prototype Development Plan 30

31 THANKYOU! 31

32 QUESTIONS?? 32