What Do Embedded Instruments Look Like? Jeff Rearick, Agilent Technologies

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1 What Do Embedded Instruments Look Like? Jeff Rearick, Agilent Technologies

2 Outline! IEEE P1687 Background! HSSIO Background! Embedded Instruments for HSSIO! P1687-based HSSIO Characterization Results! Implementation and P1687 API Suggestion! Conclusion

3 TAP Access to Chip Test Features Power management Clock control Chip configuration Memory test Scan test Logic BIST Debug/diagnosis PLL control Reduced pin count test Fault insertion Embedded instruments B S R TAP Wrapped core Interface BIST LBIST CNTL BSR Scan chain Core logic Scan chain Interface BIST BSR SRAM MEMBIST B SerDes BERTS SerDes BERTR SerDes BERT SerDes BERT

4 4 Basic Instrument Types [A] Simple or Self-Contained [B] JTAG or Compatible [C] Local-IR or Self-Instructed [D] Complex or Non Compatible

5 P1687 Interface TAP Instrument

6 P1687 Interface TAP Instrument

7 P1687 Interface: Flavors Cntrl Data Clock (Type A)

8 P1687 Interface: Flavors Cntrl Data Clock CaptureDR ShiftDR UpdateDR Other 5 TAP states (Type B)

9 P1687 Interface: Flavors Cntrl Data Clock CaptureDR ShiftDR UpdateDR Other 5 TAP states WIR (Type C)

10 P1687 Interface: Flavors Cntrl Data Clock CaptureDR ShiftDR UpdateDR Other, non Other 5 TAP states WIR (Type A) (Type B) (Type C) (Type D)

11 P1687 Interface: Flavors Cntrl Data Clock CaptureDR ShiftDR UpdateDR CaptureDR ShiftDR UpdateDR CaptureDR ShiftDR UpdateDR Done Pass Other, non Other 5 TAP states Other 5 TAP states Other 5 TAP states WIR WIR (Type A) (Type B) (Type C) (Type D)

12 P1687 Interface: Flavors Cntrl Data Clock (Type A)

13 Instrument Examples Type A: Self-Contained: Simple MBIST Clock used doesn t matter to P1687 if there is no configuration/control of the clock required Control and Report structure is comprised only of static signals Run Reset MBIST Done Fail Memory

14 P1687 Interface: Flavors Cntrl Data Clock CaptureDR ShiftDR UpdateDR Other 5 TAP states (Type B)

15 Instrument Scan Interface D/SI SO Q TAP controller scanin CK Update D-inputs: status signals from embedded instrument Q-outputs: control signals to embedded instrument scanout " Update fired after scanin complete " Scan chain safely polled for done bit

16 P1687-Friendly Instrument/TAP Interface (optional) highbandwidth interface TAP controller scanin scanout functional logic (optional) functional interface to instrument instrument control,status, and result registers instrument control logic instrument circuitry instrument circuitry being measured

17 High Speed Serial I/O Circuitry DFT parametric adjustment interfaces and circuitry DFE RX BERT circuitry TX RX LFE + EQ PRBS detect error count PRBS gen TX BERT circuitry VREF DAC ref_ck comp intraphase delay dff eye mapping circuitry

18 Control Data Clock [B] Compatible 1687 Interface CaptureEn ShiftEn UpdateEn 1687 Adapter N1 N1 N1 L N1 L N1 L N1 L N1 Only signals for Control, Configuration, Operation and Status Reporting n n Instrument Interface CaptureEn ShiftEn UpdateEn CaptureClk ShiftClk UpdateClk CaptureShiftClk Reset RunTestIdle PauseEn Reset RunTestIdle PauseEn

19 P1687 Interface: Flavors Cntrl Data Clock CaptureDR ShiftDR UpdateDR Other 5 TAP states WIR (Type C)

20 [C] Self-Instructed Control Data 1687 Interface 1687 Adapter Instrument Interface Clock CaptureEn ShiftEn UpdateEn C WIR U iir C C U U Reset n n Bandwidth I/F

21 Instrument Examples Type C: Self-Instructed: 1500 Boundary Register with WIR Instrument Control/Report are from a Local IR IR Control/Report from TAP Controller WSP C U FCN_A WRCK WRSTN WIR ShiftWR C U FCN_B CaptureWR UpdateWR TransferDR AUXCKn WBY WSI WSO WIR

22 P1687 Interface: Flavors Cntrl Data Clock CaptureDR ShiftDR UpdateDR Other, non Other 5 TAP states WIR (Type A) (Type B) (Type C) (Type D)

23 Instrument Examples Type D: Non Compatible: Complex Wrapper I/F A Control or Report signal requires a sequence/signal not available from a compliant TAP Controller or a Clock other than TCK or Data from other than TDI-TDO Transfer WRCK WRSTN WIR ShiftWR CaptureWR UpdateWR TransferDR AUXCKn WSI WSO CS CS U Transfer U CaDR TrDR ShDR UpDR

24 Control Data Clock [D] Complex (non compatible) 1687 Interface Chopper Chopper Slave Controller 1687 Adapter n L L L L N1 N1 N1 N1 N1 N1 N1 Instrument Interface CaptureEn ShiftEn UpdateEn CaptureClk ShiftClk UpdateClk CaptureShiftClk Reset n Transfer Reset RunTestIdle PauseEn Bandwidth I/F

25 Some Real Instrument Examples I/O drive strength control Memory BIST AC_CAL clock stretch calibrator SerDes BERT Temperature diode with ADC Ring Oscillators for process monitoring Vdd droop monitors A A/B B B/C B B A/B

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