Adaptive Development of Hash Functions in FPGA-Based Network Routers

Transcription

1 Adaptive Development of Hash Functions in FPGA-Based Network Routers RICHARD CHOMJAK

2 Real authors in case of plagiarism :-) Dobai, R., Korenek, J., & Sekanina, L. (2016). Adaptive development of hash functions in FPGAbased network routers IEEE Symposium Series on Computational Intelligence (SSCI). doi: /ssci

3 Agenda Motivation Hash functions recapitulation Cuckoo hashing How it is made Results Conclusions

4 Motivation Speed of computer networks is increasing, currently 400 Gbit/s is in the research. CPUs cannot handle it, a little math: Normal processor should handle ((400 * 10**9) / 8/ 84): eth frames in 1 seconds with size 84 bytes (L2: 20B + L3: 64B) (IPv4) means one packet should be processed in about 1.6 ns. 3Ghz computer with OS (Linux/FreeBSD) needs about 60-90ns to handle syscall (only SYSCALL) :-))). Hence, something like FPGA/ASICs must be used.

5 Motivation Almost every router/firewall has kind of filter, which blacklists some IPs crucial for computer networks Blacklist mechanism is typically made by hash functions and hash tables. FPGA hash table cannot use linked list in case of collision. You cannot guarantee that data will be on the time (out of synchronization, it means that packet could not be processed on time.) So, Cuckoo hashing (different approach) is used in FPGA. Cuckoo hashing has same illnesses as others hash functions Table-load factor -> the blacklists mechanism on the router/firewall must be disabled until the table is rehashed. :-( We need find some good algorithms Adaptive development.

6 Cuckoo Hashing Different approach Uses 2 hash functions. (y1 and y2) Table is typically divided into 2 parts (not in the picture) 1) Insert K1 y1(k3) = y1(k1) 2) K3 is inserted, needs find new position for K1, y2(k1) = y2 (K2) 3) K1 is inserted, needs find new position for K2 Use different hash function Think about load-factor ratio. So, the distribution of hash function is crucial.

7 What they did Hash function based on bio inspired approach (Evolution Algorithm) selection and mutation Fitness is defined as numbers of records which can be inserted into table without collision (y1, y2). Goal, find the candidate solutions with the highest fitness. Experiment with the highest number of records without collisions. Mutator h randomly changes selected parts

8 What they did Use Zynq AP SoC (HW kit) Candidate is generated and established in Programmable logic (HW) Logical model PS Processing System (ARM based) PL Programmable logic (HW) The evolution of candidate 1. Search in PS (the best one) 2. The configuration register sets the hash functions by reconfiguring multiplexer 3. Key is extracted from training data 4. Hash function computes hash 5. Insert into hash table 6. Ifkey pushed-out old key, the different hash function is used. 7. If all keys are successfully inserted to table > means OK Otherwise itmeans unresolvable collision. 8. EA assigns number to candidate solutions. And repeat 1 point.

9 NLFSR architecture Non-Linear Feedback Shift Register Two functions XOR and AND The mutation operator changes randomly selected parts Reconfigurable Candidate solution is written to the configuration register as (M0,..., M11, sela, selb, selc, seld, En), where Mn set/unset Xi input for XOR operation. SelX, select state bits into AND gates En turns optional second AND Locigal architecture of reconfigurable hash function

10 Case Study: IP Address Filtering Size of hash table 8k = 2^13 13 bit hash function or two 12 bit hash functions. Conventional approach Human made hash functions used, when rehashing is required different hash function is used. Unconventional approach based on NLFSR Previously mentioned approach Send 32 bit by bits to the NLFSR After training, the candidate solutions is used on different set

11 Experimental Results Implemented on XC7Z020 Zynq AP SoC Data sets, IP addresses were obtained from real network (CESNET) Measurements were repeated several times Optimize for high table-load factor

12 Experimental Results Load factor (picture) Best fitness 4972 Time required

13 FPGA implementations differences