Prof. Tit. José Renes Pinheiro, Dr. Eng. IX SACT November, 2000.

Transcription

1 Introduction to rogrammable Logic Devices LD s and FA s rof. Tit. José Renes inheiro, Dr. ng. IX SAT November,

2 Jack Kilby (1958) first analog integrated circuit (I). Introduction 1960 Beginning of the digital logic production and of several electronic products transistors/i ,000 transistors/i ,000 transistors/i ,000,000 transistors/i rogrammable Read-nly Memory (RM) was the first userprogrammable chip to be implemented by logic circuits. Its address lines can be used as logic circuit inputs and data lines as outputs. 2

3 What is programmable logic? rogrammable logic is loosely defined as a device with configurable logic and flip-flops linked together with programmable interconnect. Memory cells control and define the function that the logic performs and how the various logic functions are interconnected. Though various devices use different architectures, all are based on this fundamental idea. 3

4 What kinds of programmable logic devices are available today? There are a few major programmable logic architecture available today. ach architecture typically has vendor-specific subvariants within each type. The major types include: Simple rogrammable Logic Devices (SLD) omplex rogrammable Logic Devices (LD) Field rogrammable ate Arrays (FA) 4

5 Also know as: SLD Simple rogrammable Logic Device AL (rogrammable Array Logic, Vantis) AL (eneric Array Logic, Lattice) LA (rogrammable Logic Array) LD (rogrammable Logic Device) SLDs are the smallest and consequently the least-expensive form of programmable logic. An SLD is typically comprised of four to 22 macrocells and can typically replace a few 7400-series TTL devices. ach of the macrocells is typically fully connected to the others in the device. Most SLDs use either fuses or non-volatile memory cells such as RM, RM, or FLASH to define the functionality. 5

6 SLD Simple rogrammable Logic Device LA - is a relatively small LD that contains two levels of logic, an AND-plane and an R-plane, where both levels are programmable. AL - is a relatively small LD that has a programmable ANDplane followed by a fixed R-plane. 6

7 LD omplex rogrammable Logic Device Also know as: LD (rasable rogrammable Logic Device) L LD (lectrically-rasable rogrammable Logic Device) MAX (Multiple Array matrix, Altera) LDs are similar to SLDs except that they are significantly higher capacity. A typical LD is the equivalent of two to 64 SLDs. 7

8 LD omplex rogrammable Logic Device A LD typically contains from tens to a few hundred macrocells. A group of eight to 16 macrocells is typically grouped together into a larger function block. The macrocells within a function block are usually fully connected. If a device contains multiple function blocks, then the function blocks are further interconnected. In concept, LDs consist of multiple AL-like logic blocks interconnected together via a programmable switch matrix. 8

9 LD omplex rogrammable Logic Device LDs provide a natural migration path for SLD designers seeking higher density. Some of the major variations between LD architectures include the number of product terms per macrocell. Another difference in architectures is the number of connections within the switch matrix. LDs are manufactured using one of three process technologies: RM, RM, or FLASH. enerally, LDs are MS and use non-volatile memory cells such as RM, RM, or FLASH to define the functionality. Many of the most-recently introduced LD families use a RM or FLASH and have been designed so that they can be in-system programmable. 9

10 MAX (Multiple Array matrix, Altera) Altera's MAX 9000, MAX 7000, MAX 5000 and MAX 3000 families are high-speed, high-density devices based on the advanced Multiple Array MatriX (MAX) architecture. With densities from 600 to 12,000 usable gates, each MAX family offers a competitively priced solution for applications ranging from address decoding to complex control logic. Altera MAX families include: MAX 9000 MAX 7000 MAX 7000B MAX 7000A MAX 7000S MAX 5000 MAX

11 MAX 7000 LD Family High-performance, RM-based programmable logic devices based on second-generation MAX architecture 5.0-V in-system programmability (IS) 5 ns pin-to-pin logic delays with up to MHz counter frequencies omplete LD family with logic densities ranging from 600 to 5,000 gates 11

12 MAX 7000 LD Family Architecture 12

13 MAX 3000A LD Family High-performance, low-cost MS RM-based programmable logic devices built on a MAX architecture 3.3-V in-system programmability (IS) High-density LDs ranging from 600 to 5,000 usable gates MultiVolt I/ interface enabling the device core to run at 3.3 V while I/ pins are compatible with 5.0-V, 3.3-V, and 2.5-V logic levels 13

14 MAX 3000A LD Family Features MAX 3000A devices contain 32 to 256 macrocells, combined into groups of 16 macrocells called logic array blocks (LABs). 4.5 ns pin-to-pin logic delays with counter frequencies of up to MHz. MAX 3000A devices are supported by the Max+lus II development system. 14

15 MAX 3000A LD Family Architecture 15

16 Also known as: FA Field rogrammable ate Array LA (Logic ell Array) pasi (programmable ASI) FLX, AX (Altera) AT (Actel) RA (Lucent) Virtex (Xilinx) pasi (QuickLogic) FAs are a distinct from SLDs and LDs and typically offer the highest logic capacity. An FA consists of an array of logic blocks, surrounded by programmable I/ blocks, and connected with programmable interconnect. 16

17 FA Field rogrammable ate Array A typical FA contains from 64 to tens of thousands of logic blocks and an even greater number of flipflops. A generic description of an FA is a programmable device with an internal array of logic blocks, surrounded by a ring of programmable input/output blocks, connected together via programmable interconnect. The secret to density and performance in these devices lies in the logic contained in their logic blocks and on the performance and efficiency of their routing architecture. 17

18 A typical programmable logic design involves four steps: How do I design with programmable logic? 18

19 How do I design with programmable logic? Schematic-based tools rcad Viewlogic Logic Synthesis and ptimization Synopsys (FA xpress, FA ompiler) Viewlogic Integrated rogrammable Logic Design nvironment Altera MAX+lus II Xilinx Foundation Series 19

20 Altera MAX+lus II It is a fully integrated programmable logic design environment that supports devices of different architectures, run on multiple platforms and provide an easy-to-use interface. 20

21 Altera MAX+lus II Max+lus raphic ditor Max+lus Manager 21

22 Altera MAX+lus II Max+lus Simulator Max+lus ompiler 22

23 Design ntry What is the VHDL? VHDL is the VHSI Hardware Description Language. VHSI is an abbreviation for Very High Speed Integrated ircuit. It can describe the behavior and structure of electronic systems, but is particularly suited as a language to describe the structure and behavior of digital electronic hardware designs, such as ASIs and FAs as well as conventional digital circuits. 23

24 Design ntry A Brief History of VHDL Initiated by US Army to address hardware life-cycle crisis Development of baseline language: Intermetrics, IBM and TI All rights transferred to I ublication of I Standard Mil Std 454 requires comprehensive VHDL descriptions to be delivered with ASIs Revised standard (named VHDL ) 24

25 Design ntry xample of VHDL 25

26 Design rogramming What does in-system programmable (IS) mean? In-system programmable (IS) means that the device can be programmed while it is mounted on the circuit board with the other components. Most IS devices are built using SRAM, RM, or FLASH technologies. All SRAM-based devices are inherently in-system programmable because they must be configured on power-up. 26

27 Design rogramming What does in-system programmable (IS) mean? RM and FLASH processes are erasable technologies. However, not all RM- and FLASH-based are programmable while soldered on the circuit board. In-system programmability (IS) requires special on-chip programming logic. Not all LDs have this logic, even if they are built with RM and FLASH. 27

28 Which companies supply programmable logic? Ranked by 1997 sales volume, the major high-density programmable logic suppliers are: 1. Altera 2. Xilinx 3. Vantis (now part of Lattice) 4. Lattice Semiconductor 5. Actel 6. Lucent Technologies 7. ypress Semiconductor 8. Atmel 9. QuickLogic 28

29 Which companies supply programmable logic? Altera lassic Max Flex Apex Acex Xilinx Virtex Spartan oolrunner X9500 QR 29

30 Field rogrammable Analog Device (FAD) Features and Benefits Faster design and verification of analog circuits Flexibility to react to changing requirements Just as versatile as FA and just as easy omplete more projects on time High level of integration Transparent design migration to semi-custom and future devices Devices easily cascaded for more complex designs 30

31 Field rogrammable Analog Device (FAD) Applications Analog Signal rocessing Instrumentation Log, Linear and Modern Filter Design Audio Applications ompanies Lattice Semiconductors ( Fast Analog Solutions ( 31

32 onclusions The programmable logic devices are becoming the dominant form of digital logic design and implementation. Their ease of access, principally through the low cost devices, makes them attractive to small firms and small parts of large companies. The fast manufacturing is an essential element of success in the market. As architecture and AD tools improve, the disadvantages of LDs and FAs compared to Mask-rogrammed ate Arrays will less, and programmable devices will dominate. 32

33 onclusions The reduction of the voltage supply is a tendency. The Field rogrammable Analog Devices give you a powerful new approach to design, integrate and configure your analog circuits. 33

34 Web Sites The rogrammable Logic Jump Station ( Altera ( Xilinx ( Atmel ( Lattice ( Fast Analog Solutions ( ( Autor - rof. José Renes inheiro ( olaborador ng. assiano Rech ( 34