Sequential Logic: Programming a Read Only Memory

Transcription

1 Juergen Wehling, ISBN Sequential Logic: Programming a Read Only Memory For the competence extension in the range of the digital technology 1.1 General There are read only memories of the most different kind. A chip on which the ROS (Resident Operating system) of a PC, XT or AT is accommodated, is often designated ROM (Read Only Memory), although it is, actually, an EPROM (Erasable Programmable ROM). In the general usage all memory chips which cannot be changed by the user with the usage of software any more are designated with ROM. In practice the types ROM, PROMs, EPROMs and EAROMs (Electrically Alterable ROM) are summarized to one concept ROM A ROM (in the original sense) is a memory component programmed with a mask. The "LOW" - and "High" levels of the single bits are realized here by the break of bridges between gaps and lines. The contents of ROMs must therefor already be certain before the production. ROMs are very expensive and costly during the production process PROM On this occasion, it concerns a component which can be programmed after his production only just once. The "LOW" - and "HIGH" levels of single bits are likewise realised by the break of bridges on the conducting paths of the chip. Nevertheless, the interruption of the conducting paths is carried out only after the production of the chip with a special PROM programming unit. PROMs are often used in the industry, because the production costs are substantially lower than with a ROM EPROM EPROMs are the most common form of read only memories. An EPROM can be deleted by a relatively easy process completely and then programmed again anew. One uses special EPROM burners or EPROM programming units on this. A faultily programmed EPROM needs only to be dismantled from the base, deleted and then inserted - anew programmed - immediately again in the computer EAROM

2 Juergen Wehling, ISBN A wider form of read only memories are EAROMs, that means electrically changeable ROMs. They take a hermaphrodite's position between ROMs and RAMs (Random Access Memory). From an EAROM it is able to read, however, it can also be written in with low expenditure. For the writing process needing a lot of time, EAROMs are used extremely seldom, because they own only low storage densities and are relatively expensive. On switching off the supply voltage they preserve the contained information. 1.2 Physically based EPROM Today EPROMs (deleteable ROMs) are produced in the MOS-FET-technology. MOS-FETs (Metal Oxide Semiconductor - Field Effect transistor) one finds everywhere where it depends on small currents. A single memory cell of an EPROM is produced of a MOS-FET-transistor. As the name already says, this transistor deals with electrical fields. A measure of "HIGH" or "LOW" is the available or not available charge. The mode of operation is very similar to that of a capacitor. If one isolates the poles of a common stress field by appropriate measures "ideally", the once applied charge remains in the disks for an infinitely long period. This insulating layer is raised in an EPROM cell by silicon oxide, it surrounds the GATE (control interface of a FET, roughly comparably with the basis of a transistor) and allows that the charge (information) is preserved for several years, because there are not "ideal" ratios in the electronics. To let run the program process, an energy must be generated which is sufficient to overcome the insulating barrier and to apply the FET with charge. This energy is supplied in form of a voltage, mostly between 21 V and 25 V, to the connection VPP which is in every EPROM. Information is branded by putting on such a voltage for a mostly very short time (between 50ms and 0.1ms) in a certain memory cell of the EPROMs. Now the charge carriers which are on the GATE of the memory cell see no more occasion to clear their space, because they lack the energy to overcome the insulating layer for a second time. Thus the information remains saved. For the erasing procedure of an EPROMs one uses a physical property of the semiconductors, the PHOTOEFFECT. It enables to the charge with radiation by light rich in energy with a certain UV-ratio to run off unhindered. By the quartz window the ultraviolet light can reach the transistor matrix MOS. The erasing procedure is initiated. In the old state or after successful entire deletion all memory cells contain "HIGH", every byte has the value FFh. The programming of an EPROM can force

3 Juergen Wehling, ISBN therefore always only the state change from "HIGH" to "LOW", the reverse way requires the 'sunlamp'. Because the sun owns a low UV-ratio in her electromagnetic spectrum, this window should be covered after occurred programming with a glue strip. So that an EPROM can be deleted fast and completely, the UV light source must fulfill certain preconditions. The wavelength of the light source must amount to nanometers; the radiationn should occur with an energy density of 15 Ws / cm 2. Under these preconditions the time of the erasing procedure of an EPROMs amounts from about 15 to 20 min. 1.3 Different EPROMs With the development of more and more efficient computers the requirements for the software have grown steadily. Found, e.g., in the 'old' APPLE II the BIOS (BASIC input / output system) and the BASIC interpreter together in 12 Kbyte of EPROM range of Space, complete operating systems with graphic user interface take today, like TOS and GEM according to the ATARI ST, a space of 192 Kbyte EPROM. The trend is rising in general. Today EPROMs are in cabinets with 24, 28, 32 and 40 pins at the market and the last-called a special meaning comes up: they offer for the first time a data bus width of 16 bits by which the EPROM space required on printed conductor boards can be reduced in 16-or 32-bit systems almost on half. Fig. 1 shows a summary of the respective cabinet sizes, pin numbers and signal names of the most common 8-bit EPROMs.

4 Juergen Wehling, ISBN Fig. 1: Pinouts of the 8-Bit-EPROMs

5 Juergen Wehling, ISBN Organization and capacity of EPROMs The connections whose configuration is same with all 8-bit EPROMs are 8 data lines (D0 to D7) and the address lines whose number is dependent of course from the capacity of the used EPROMs. Thus owns, e.g., the address lines (A0 to A12) to address 8 Kbyte. Fig. 2 Organization and capacity of different EPROMs A 2764, e.g., is organised as follows: 8 Kbyte corresponds to a capacity of 8 * 1024 or 8 * 2 10 = 8,192 bytes. These are 8 Kbyte * 8 bits = 64 Kbit. 8,192 bytes corresponds to 2 12 what requires 13 address lines for the addressing again. The table in fig. 2 gives an overview about organization and capacity of the most common EPROMs.

6 Juergen Wehling, ISBN Program timing For the programming of 1 byte a certain time grid must be kept. As a rule every cell is verified directly after its programming. Both following timing diagrammes show how the EPROM models 2732 and 2764 differ in the sequence from Program- and Verifystate. Thus it is necessary with the 2732 to switch off the program voltage during the verification. With the 2764 this state change is also reached with switched on program voltage by different levels of the pins /PGM and /OE. Fig. 3: Timing-Diagrams of the 2732 (top) and the 2764 (below)

7 Juergen Wehling, ISBN Algorithm The programming time depends quite substantially on it, how long every memory cell must be held in the 'program state', so that it takes up the enclosed bit pattern. This leads directly to the programming algorithms to describe a memory cell with a certain bit patterns, so to the methods, very efficiently - fast and certainly. The following illustrations show two different algorithms by which here basically the standard algorithm should be explained. Fig. 4: Standard- (right) and Impuls-Algorithms (left)

8 Juergen Wehling, ISBN Standard algorithm The standard algorithm (fig. 4, on the right) is the oldest, easiest and at the same time slowest of all. In the flowchart this algorithm is displayed for the 2732A which needs a programming voltage of 21 V. At first one designs the address and desired contents to the address lines and data lines of the EPROM. By putting on the programming voltage in the VPP as well as a "LOW" level in the /PGM pin one moves the component into the program state. Afterwards a pulse of 50ms occurs, so that a takeover of the designed data can result. After the last address is reached, a read-back of the branded bit pattern occurs. This algorithm owns the advantage that with it basically every EPROM can be programmed. It is problematic, besides, only that the so harmlessly appearing 50ms add up with bigger EPROMs, nevertheless, at substantial waiting periods. An EPROM of the model has a capacity of 64 KByte * 0.05s = 3277s or 55 minutes. Nevertheless, this is only the pure burn-in-time; the time which needs the program itself is disregarded here Intel algorithm This algorithm (fig. 4, on the left) uses the fact that not all memory cells of modern EPROMs are equally hardly programmable and by far not for every cell a program duration of 50ms is necessary. Here a repeated program impulse of 1ms is sufficient, to a read-back of the EPROM contents delivering the created data.

9 Juergen Wehling, ISBN Quick pulse algorithm This algorithm works in principle just like the Intel algorithm, nevertheless, requires a slightly raised operating voltage. With it the program voltage as well as the supply voltage is meant. These voltages must be raised exactly 0.25 V. Fig. 5: Quick-Pulse-Algorithm Just with the choice of the algorithm one is easily defeated by the temptation to shorten the program duration by self-written algorithms. If the timing diagrammes shown by the EPROM manufacturer are about, however, absolutely to keep most exactly, because such a programmed EPROM is functioning absolutely, cannot hold his charges under circumstances for a period of several years.

10 Juergen Wehling, ISBN EPROM programming device The following circuit diagram shows the construction of an easy programming device for 8-Bit EPROMS. Here exemplarily an EPROM is seated by the model 2732 A. The addresses A0 to A11 are adjusted by a dip switch. Fig. 6: Circuit diagram of a simple EPROM programming unit