W83C42 KEYBOARD CONTROLLER GENERAL DESCRIPTION FEATURES

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1 查询 W83C4 供应商 W83C4 KEYBOR CONTROLLER GENERL ESCRIPTION The W83C4 keyboard controller is programmed to support the IBM compatible personal computer keyboard serial interface. The keyboard controller receives serial data from the keyboard, checks the parity of the data, translates the scan code, and presents the data to the system as a byte of data in its output buffer. The controller will interrupt the system when data is placed in its output buffer. The byte of data will be sent to the keyboard serially with an odd parity bit automatically inserted. The keyboard is required to acknowledge all data transmissions. No transmission should be sent to the keyboard until acknowledge is received for the previous byte sent. Winbond Electronics Corporation has developed a fast keyboard controller and BIOS to improve the performance of IBM PC/T 386 /S and 486 /S machines and their compatibles. Hardwire methodology is used in this keyboard controller instead of software implementation, as in the traditional 804 keyboard BIOS. This enables the keyboard controller to respond instantly to all commands sent from the keyboard to the CPU BIOS. The keyboard controller enables popular programs such as utoc, Microsoft Windows 3., NOVELL, and other programs to run much faster. FETURES Supports IBM PC/T 386/S and 486 /S system designs Runs much faster than traditional keyboard controllers Host interface compatible with traditional keyboard controller 6MHz~MHz operating frequency Communicates with keyboard directly High-reliability CMOS technology vailable packages: 40-pin IP, 44-pin PLCC IBM and PC/T are registered trademarks of International Business Machines Corporation. 386 and 486 are trademarks of Intel Corporation. utoc is a registered trademark of utodesk, Inc. Microsoft is a registered trademark and Windows is a trademark of Microsoft Corporation. NOVELL is a registered trademark of Novell, Inc. Publication Release ate: July Revision 3

2 4 5 W83C4 PIN CONFIGURTION 40-pin IP T0 40 V IN OUT RESET V CS V SS R WR NC V SS T P7 (KT) P6 (KCLK) P5 (IEMP) P4 (INT) P7 (KINH) P6 (ISP) P5 (JUMP) P4 (RM) P3 P P P0 NC V P3 P P (G0) P0 (RC) 44-pin PLCC V / R E S E T O U T I N T 0 N C V T P 7 P 6 P 5 CS VSS R WR NC NC P4 P7 P6 P5 P4 NC P3 P P P0 NC V S S N C P 0 P P P 3 V - -

3 PIN ESCRIPTION PIN NO. (40-pin IP) PIN NO. (44-pin PLCC) I/O NME FUNCTION I T0 K/B Clock Input 3 I IN Crystal Clock I/P 3 4 O OUT Crystal Clock O/P 4 5 I RESET Chip Reset V Optional +5V Power Supply 6 7 I CS Chip Select VSS Optional Ground Power 8 9 I R I/O Read 9 0 I Connect to ddress 0 I WR I/O Write, 6,, 3, 3, 9, 34, 3, 4, 5, 6, 7, 8, 9 4, 5, 6, 7, 8, 9, 0, - NC Reserved I/O 0-7 ata Bus VSS Ground Power Supply 4 O P0 Bit 0 of Port (RCB: System Reset) 5 O P Bit of Port (G0: GTE 0) 3 6 I/O P Bit of Port 4 7 I/O P3 Bit 3 of Port V Optional +5V Power Supply 7 30 I/O P0 Bit 0 of Port 8 3 I/O P Bit of Port 9 3 I/O P Bit of Port I/O P3 Bit 3 of Port 3 35 I P4 Bit 4 of Port (RM Jumper Select) 3 36 I P5 Bit 5 of Port (JUMP) I P6 Bit 6 of Port (isplay Select) I P7 Bit 7 of Port (K/B Inhibit Switch) Publication Release ate: July Revision 3

4 Pin escription, continued PIN NO. (40-pin IP) PIN NO. (44-pin PLCC) I/O NME FUNCTION O P4 Bit 4 of Port (OBF O/P Interrupt) O P5 Bit 5 of Port (I/P Buffer Empty) 37 4 O P6 Bit 6 of Port (K/B Clock O/P) 38 4 O P7 Bit 7 of Port (K/B ata O/P) I T K/B ata Input V +5V Power Supply BLOCK IGRM T0 T OUT IN WR R CS RESET RECEIVE CONTROL HRWIRE CONTROL & SELECT LOGIC SCN COE ROM TRNSMIT CONTROL TRNSMIT REGISTER STTUS REGISTER 0-7 T BUFFER REGISTER R64 W60 W64 STTUS BUFFER REGISTER INPUT BUFFER REGISTER INPUT & OUTPUT PORT INTERFCE P0 P P P3 P4 (RM Select) P5 (Manufacture Mode) P6 (isplay) P7 (KBNH) R60 OUTPUT BUFFER REGISTER OUTPUT PORT INTERFCE P0 (RC) P (Gate 0) P P3 P4 P5 P6 (Keyboard Clock) P7 (Keyboard ata) - 4 -

5 C TIMING NO. ESCRIPTION MIN. M. UNIT T ddress Setup Time from WR 0 ns T ddress Setup Time from R 0 ns T3 WR Strobe Width 0 ns T4 R Strobe Width 0 ns T5 ddress Hold Time from WR 0 ns T6 ddress Hold Time from R 0 ns T7 ata Setup Time 50 ns T8 ata Hold Time 0 ns T9 Gate elay Time from WR 0 ns T0 R to rive ata elay 0 ns T R to Floating ata elay 0 0 ns T ata Valid fter Clock Falling (SEN) 4 µs T3 K/B Clock Period 0 µs T4 K/B Clock Pulse Width 0 µs T5 ata Valid Before Clock Falling (RECEIVE) 4 µs T6 K/B CK fter Finish Receiving 0 µs T7 RC Fast Reset Pulse elay (8 MHz) 3 µs T8 RC Pulse Width (8 MHz) 6 µs T9 Transmit Timeout ms T0 ata Valid Hold Time 0 µs T IN/OUT Period ( 6- MHz ) ns Publication Release ate: July Revision 3

6 TIMING WVEFORMS Write Cycle Timing, CS T T3 T5 WR CTIVE T7 T8 0-7 T IN T9 0 OUTPUT PORT T7 T8 FST RESET PULS RC FE COMMN Read Cycle Timing, CS EN R T T4 CTIVE T6 T0 T 0-7 T OUT - 6 -

7 Send ata to K/B CLOCK ( KCLK ) T T4 T3 T6 SERIL T ( KT ) STRT P STOP T9 Receive ata from K/B CLOCK ( KCLK ) T5 T4 T3 SERIL T ( T ) STRT P STOP T0 IN/OUT Clock IN CLK T BSOLUTE MIMUM RTINGS PRMETER RTING UNIT mbient Operating Temperature -0 to +85 C Storage Temperature -65 to +50 C Supply Voltage to Ground Potential -0.3 to +7.0 V pplied Input/Output Voltage -0.3 to +7.0 V Power issipation 50 mw Note: Exposure to conditions beyond those listed under bsolute Maximum Ratings may adversely affect the life and reliability of the device. Publication Release ate: July Revision 3

8 ELECTRICL CHRCTERISTICS & CPCITNCE (Ta = 0 C to +70 C, V = +5V ±5%) SYMBOL ESCRIPTION MIN. TYP. M. UNIT V Power Supply V T Operating Temperature V VIH VIL VOH VOL High Level Voltage for TTL Min. I/P Low Level Voltage for TTL Max. I/P High Level Voltage for TTL Min. O/P Low Level Voltage for TTL Max. O/P.0 V V V V -0.5 V 0.5 V RIP Min. I/P Resist 0K Ω ILI I/P Leakage Current -0 0 µ ILO O/P Leakage Current -0 0 µ IOL O/P Sink Current 4 m CL O/P Load Capacity 5 50 pf STTUS REGISTER The status register is an 8-bit read-only register at I/O address hex 64 that holds information about the state of the keyboard controller and interface. It may be read at any time. BIT BIT ESCRIPTION FUNCTION 0 Output Buffer Full 0: Output Buffer Empty : Output Buffer Full Input Buffer Full 0: Input Buffer Empty : Input Buffer Full System Flag This bit may be set to 0 or by writing to the system flag bit in the command byte of the keyboard controller. It is set to 0 after a power-on reset 3 Command/data 0: ata Byte : Command Byte 4 Inhibit Switch 0: Keyboard is Inhibited : Keyboard is Not Inhibited 5 Transmit Time Out 0: No Transmit Time Out Error : Transmit Time Out Error - 8 -

9 Status Register, continued BIT BIT ESCRIPTION FUNCTION 6 Receive Time Out 0: No Receive Time Out Error : Receive Time Out Error 7 Parity Error 0: Odd Parity (No Error) : Even Parity (Error) OUTPUT BUFFER The output buffer is an 8-bit read-only register at I/O address hex 60. The keyboard controller uses the output buffer to send the scan code received from the keyboard and data bytes required by command to the system. The output buffer should be read only when the output buffer full bit in the register is. INPUT BUFFER The input buffer is an 8-bit write-only register at I/O address hex 60 or 64. Writing to address hex 60 sets a flag that indicates a data write; writing to address hex 64 sets a flag that indicates a command write. ata written to I/O address hex 60 are sent to the keyboard (unless the keyboard controller is expecting a data byte) following the controller's input buffer only if the input buffer full bit in the status register is set to 0. I/O PORTS The keyboard controller has two 8-bit I/O ports and two test inputs. One of the ports is assigned for input and the other for output. The controller uses the test inputs to read the state of the keyboard's clock line and data line. The following figures show bit definitions for the input, output, and test-input ports. () Input Port efinitions BIT 0 Undefined Undefined Undefined 3 Undefined FUNCTION 4 RM on System Board 0: isable nd 56 KB of System Board RM : Enable nd 56 KB of System Board RM 5 Manufacturing Jumper Installed 0: Manufacturing Jumper : Jumper Not Installed Publication Release ate: July Revision 3

10 Input Port efinitions, continued BIT FUNCTION 6 isplay Type Switch 0: Primary isplay ttached to Color/graphics 0: Primary isplay ttached to Monochrome 7 Keyboard Inhibit Switch 0: Keyboard Inhibited : Keyboard Not Inhibited (B) Output Port efinitions BIT FUNCTION 0 System Reset Gate 0 Undefined 3 Undefined 4 Output Buffer Full 5 Input Buffer Empty 6 Keyboard Clock (Output) 7 Keyboard ata (Output) (C) Test-Input efinitions BIT FUNCTION 0 Keyboard Clock (Input) Keyboard ata (Input) - 0 -

11 COMMNS (I/O RESS HE 64) COMMN FUNCTION 0 Read Command Byte of Keyboard Controller 60 Write Command Byte of Keyboard Controller BIT BIT EFINITIONS 7 Reserved 6 IBM PC Compatible Mode 5 IBM PC Mode 4 isable Keyboard 3 Inhibit Override System Flag Reserved 0 Enable Output Buffer Full Interrupt Self-test BIT BIT EFINITIONS 00 No Error etected 0 K/B Clock Line is Stuck Low 0 K/B Clock Line is Stuck High 03 K/B ata Line is Stuck Low 04 K/B ata Line is Stuck High B E C0 0 E0 F0-FF Interface Test isable Keyboard Feature Enable Keyboard Interface Read Input Port Read Output Port Write Output Port Read Test Inputs Pulse Output Port Publication Release ate: July Revision 3

12 PPLICTION CIRCUIT synchronous RESETB S IORB IOWB RESET T0 T CS V R WR V SS V P0 P P P3 P4 P5 P6 P7 P0 P P P3 P4/OB P5/BF P6/KCLK P7/KT NC KEYBOR T RCB GTE 0 KEYBOR CLOCK RM SELECT JUMPER MNUFCTURING MOE JUMPER ISPLY TYPE SWITCH KEYBOR INHIBIT SWITCH KEYBOR INTERRUPT V U? U? VCC KEYBOR CLOCK 74LS U?B 3 4 KEYBOR T

13 pplication Circuit, continued Synchronous PCLK RESETB S IORB IOWB RESET T0 T CS R WR P0 7 P 8 P 9 P3 30 P4/RM 3 P5/MO 3 P6/IS 33 P7/INH 34 P0/RCB P/0 P 3 P3 4 P4 35 P5 36 P6/KCLK 37 P7/KT 38 KEYBOR T RCB GTE 0 KEYBOR CLOCK RM SELECT JUMPER MNFCTURING MOE JUMPER ISPLY TYPE SWITCH KEYBOR INHIBIT SWITCH KEYBOR INTERRUPT V U? 74LS04 U? 7407 U?B V KEYBOR CLOCK KEYBOR T Publication Release ate: July Revision 3

14 PCKGE IMENSIONS 40-pin PIP E L 40 0 S B e B Base Plane Seating Plane a E e c Symbol B B c E E e L a e S imension in inch Min. Nom. Max. Min. Nom. Max imension in mm Notes:. imensions Max & S include mold flash or tie bar burrs.. imension E does not include interlead flash. 3. imensions & E include. mold mismatch and are determined at the mold parting line. 4. imension B does not include dambar protrusion/intrusion. 5. Controlling dimension: Inches. 6. General appearance spec. should be based on final visual inspection spec pin PLCC H E H E G E Symbol b b c E e imension in inch imension in mm Min. Nom. Max. Min. Nom. Max BSC BSC 7 8 L Seating Plane e G b b 8 9 y c G G E H H E L y Notes:. imensions & E do not include interlead flash.. imension b does not include dambar protrusion/intrusion 3. Controlling dimension: Inches 4. General appearance spec. should be based on final visual inspection spec

15 Headquarters Winbond Electronics (H.K.) Ltd. No. 4, Creation Rd. III, Rm. 803, World Trade Square, Tower II, Science-Based Industrial Park, 3 Hoi Bun Rd., Kwun Tong, Hsinchu, Taiwan Kowloon, Hong Kong TEL: TEL: F: F: Voice & Fax-on-demand: Taipei Office F, No. 5, Sec. 3, Min-Sheng East Rd., Taipei, Taiwan TEL: F: Winbond Electronics North merica Corp. Winbond Memory Lab. Winbond Microelectronics Corp. Winbond Systems Lab. 730 Orchard Parkway, San Jose, C 9534, U.S.. TEL: F: Note: ll data and specifications are subject to change without notice. Publication Release ate: July Revision 3

KBD42W11 FEATURES GENERAL DESCRIPTION

KBD42W11 FEATURES GENERAL DESCRIPTION KBD42W11 Keyboard Controller FEATURES Supports IBM PC and Compatible System Designs Runs Much Faster Than Traditional Keyboard Controllers Host interface Compatible with Traditional Keyboard Controller