Microelettronica. J. M. Rabaey, "Digital integrated circuits: a design perspective" EE141 Microelettronica
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1 Microelettronica J. M. Rabaey, "Digital integrated circuits: a design perspective"
2 Introduction Why is designing digital ICs different today than it was before? Will it change in future?
3 The First Computer The Babbage Difference Engine (1832) 25,000 parts cost: 17,470
4 ENIAC - The first electronic computer (1946)
5 The Transistor Revolution First transistor Bell Labs, 1948
6 The First Integrated Circuits Bipolar logic 1960 s ECL 3-input Gate Motorola 1966
7 Intel 4004 Micro-Processor transistors 1 MHz operation
8 Intel Pentium (IV) microprocessor M transistors 1.7 GHz clock-rate
9 Moore s Law In 1965, Gordon Moore noted that the number of transistors on a chip doubled every 18 to 24 months. He made a prediction that semiconductor technology will double its effectiveness every 18 months
10 Moore s Law LOG 2 OF THE NUMBER OF COMPONENTS PER INTEGRATED FUNCTION Electronics, April 19, 1965.
11 Trends in logic IC Complexity
12 Trends in Memory Complexity
13 Transistors (MT) Moore s law in Microprocessors X growth in 1.96 years! P6 Pentium proc Year Transistors on Lead Microprocessors double every 2 years
14 Moore s Law (data from Intel)
15 Frequency (Mhz) Frequency Doubles every 2 years P6 Pentium proc Year Lead Microprocessors frequency doubles every 2 years
16 Die size (mm) Die Size Growth P6 Pentium proc ~7% growth per year ~2X growth in 10 years Year Die size grows by 14% to satisfy Moore s Law
17 Power (Watts) Power Dissipation 100 P6 Pentium proc Year Lead Microprocessors power continues to increase
18 Power (Watts) Power will be a major problem Pentium proc 18KW 5KW 1.5KW 500W Year Power delivery and dissipation will be prohibitive Courtesy, Intel
19 Power Density (W/cm2) Power density Hot Plate P6 Pentium proc Year Power density too high to keep junctions at low temp
20 Not Only Microprocessors Cell Phone Small Signal RF Power RF Units Digital Cellular Market (Phones Shipped) M 86M 162M 260M 435M Power Management Analog Baseband Digital Baseband (DSP + MCU) (data from Texas Instruments)
21 Why Scaling? Technology shrinks by 0.7/generation With every generation can integrate 2x more functions per chip; chip cost does not increase significantly Cost of a function decreases by 2x But How to design chips with more and more functions? Design engineering population does not double every two years Hence, a need for more efficient design methods Exploit different levels of abstraction
22 Design Abstraction Levels SYSTEM MODULE + GATE CIRCUIT S n+ G DEVICE n+ D
23 Design Metrics How to evaluate performance of a digital circuit (gate, block, )? Cost Reliability Scalability Speed (delay, operating frequency) Power dissipation Energy to perform a function
24 Cost of Integrated Circuits NRE (non-recurrent engineering) costs design time and effort, mask generation one-time cost factor Recurrent costs silicon processing, packaging, test proportional to volume proportional to chip area
25 NRE Cost is Increasing
26 Cost per Transistor cost: -per-transistor Fabrication capital cost per transistor (Moore s law)
27 Die Cost Single die Wafer Going up to 12 (30cm)
28 Yield Dies No. of good chips per wafer Y 100% Totalnumber of chips per wafer Die cost per wafer Wafer cost Dies per wafer Die yield wafer diameter/2 die area 2 wafer diameter 2 die area
29 Defects die yield 1 defects per unit area die area is approximately 3 die cost f 4 (die area)
30 Some Examples (1994) Chip Metal layers Line width Wafer cost Def./ cm 2 Area mm 2 Dies/ wafer Yield Die cost 386DX $ % $4 486 DX $ % $12 Power PC $ % $53 HP PA $ % $73 DEC Alpha $ % $149 Super Sparc $ % $272 Pentium $ % $417
31 Reliability Noise in Digital Integrated Circuits i(t) v(t) V DD Inductive coupling Capacitive coupling Power and ground noise
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