Logical Design of Digital Systems
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1 .5.27 Lecture 3 Summer Semester 27 Table of Content. Combinational circuit design 2. Elementary combinatorial circuits for data transmission 3. Memories 3. Semiconductor memory classification s 3.2. General random access architecture Word-based addressing Bit-wise addressing 3.3 Random Access Memories (RAMs) 3.3. Static RAMs (SRAM) Dynamic RAMs (DRAM) 3.4 Read Only Memory (ROM) 3.4.The Mask ROM 4. Programmable logic devices 5. Algorithmic minimization approaches 6. Sequential circuit design 7. Testing digital circuits Summer Semester 27
2 Semiconductor memory Classification Summer Semester General RAM Architecture Basic principle of memory with random access Read Write Row address decoder Address bus Memory array Data bus Column address decoder Summer Semester 27 3
3 General RAM Architecture Read Write Row address decoder Address bus Memory array Data bus Column address decoder Summer Semester General RAM Architecture Write Operation Summer Semester 27 4
4 General RAM Architecture Read Operation Summer Semester General RAM Architecture Word Lines bit lines Summer Semester 27 5
5 Word based addressing Address bus Control bus Data bus Summer Semester Bit-wise addressing 6 Address lines Address Decoder Memory 6 x bit lines Summer Semester 27 6
6 Bit-wise addressing Summer Semester Bit-wise addressing 6 Address lines 4 Address Row Decoder 2 Column Decoder 8 data lines Summer Semester 27 7
7 Bit-wise addressing Summer Semester Random Access Memories Summer Semester 27 8
8 Static RAM Basic SRAM Cell Summer Semester 27 Source: Hoffmann: Grundlagen Dr. ng. der Stefan Technischen Werner nformatik 3.3. Static RAM Basic SRAM Cell S R Q n Q n+ Functionality Both inputs are, => the state stores Q n The reset tinput tis, X X Characteristic Equation: n+ Q = S + RQ n => the FF is set to. The set input is, => the FF is set to The FF s behaviour can not be predicted Summer Semester 27 Source: Hoffmann: Grundlagen Dr. ng. der Stefan Technischen Werner nformatik 9
9 Static RAM Basic SRAM Cell S R Q n Q n+ X X Read = => cell out = Characteristic Equation: n+ Q = S + RQ n Write data to cell Read data from cell for an unselected cell out = word line read data in out Q + x x Q Summer Semester 27 Source: Hoffmann: Grundlagen Dr. ng. der Stefan Technischen Werner nformatik 3.3. Static RAM Basic SRAM Cell S R Q n Q n+ X X Characteristic Equation: n+ Q = S + RQ n Read data from cell Actual data is read from cell/ written to the bus word line read data in out Q + x x Q x Q Q Summer Semester 27 Source: Hoffmann: Grundlagen Dr. ng. der Stefan Technischen Werner nformatik
10 Static RAM Basic SRAM Cell S R Q n Q n+ X X Characteristic Equation: n+ Q = S + RQ n Write data to cell d d d d d d Latch is set to d word line read data in out Q + x x Q x Q Q Summer Semester 27 Source: Hoffmann: Grundlagen Dr. ng. der Stefan Technischen Werner nformatik 3.3. Static RAM Basic SRAM Cell Array Summer Semester 27 Source: Hoffmann: Grundlagen Dr. ng. der Stefan Technischen Werner nformatik
11 Static RAM SRAM Logic Symbol Summer Semester Static RAM Read Cycle Summer Semester 27 2
12 Static RAM Write Cycle Summer Semester Dynamic RAM Basic DRAM Cell Summer Semester 27 3
13 Dynamic RAM Summer Semester 27 Source: Hoffmann: Grundlagen Dr. ng. der Stefan Technischen Werner nformatik Dynamic RAM Typical DRAM Memory Access Cycle Source: Hoffmann: Grundlagen der Technischen nformatik Summer Semester 27 4
14 Dynamic RAM Source: Hoffmann: Grundlagen der Technischen nformatik Summer Semester ROM Read-Only Memory (ROM) Mask ROM Programmable ROM (PROM) Erasable PROM (EPROM) Ultraviolet EPROM (UV EPROM) Electrically Erasable PROM (EEPROM) Source: Floyd: Digital Fundamentals Summer Semester 27 5
15 Mask ROM Basic ROM Cell Source: Floyd: Digital Fundamentals storing a storing a Summer Semester Mask ROM Basic ROM Cell Source: Floyd: Digital Fundamentals Summer Semester 27 6
16 Mask ROM nternal ROM organisation Summer Semester 27 Source: Floyd: Digital Fundamentals Mask ROM ROM Access Time Summer Semester 27 Source: Floyd: Digital Fundamentals 7
17 ROM 3.4. Mask ROM Example: MaskROM as Binary-> Gray Code Converter Source: Floyd: Digital Fundamentals Summer Semester 27 8
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