DIGITAL SYSTEM FUNDAMENTALS (ECE421) DIGITAL ELECTRONICS FUNDAMENTAL (ECE4220. PROGRAMMABLE LOGIC DEVICES (PLDs)

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COURSE / CODE DIGITAL SYSTEM FUNDAMENTALS (ECE421) DIGITAL ELECTRONICS FUNDAMENTAL (ECE4220 PROGRAMMABLE LOGIC DEVICES (PLDs) A PLD, or programmable logic device, is an electronic component that is

A programmable logic device does not have a defined function once manufactured, unlike a logic gate and has to be programmed before it can be used.

1 COURSE / CODE DIGITAL SYSTEM FUNDAMENTALS (ECE421) DIGITAL ELECTRONICS FUNDAMENTAL (ECE4220 PROGRAMMABLE LOGIC DEVICES (PLDs) A PLD, or programmable logic device, is an electronic component that is used in order to build digital circuits that are reprogrammable. A programmable logic device does not have a defined function once manufactured, unlike a logic gate and has to be programmed before it can be used. Programmable logic devices (PLD) are designed with configurable logic and flip-flops linked together with programmable interconnect. PLDs provide specific functions, including device-to-device interfacing, data communication, signal processing, data display, timing and control operations, and almost every other function a system must perform. Memory cells control and define the function that the logic performs and how the various logic functions are interconnected. FPGAs are used in a wide variety of applications ranging from data processing and storage, to instrumentation, telecommunications, and digital signal processing. CPLDs, by contrast, offer much smaller amounts of logic - up to about 10,000 gates. But CPLDs offer very predictable timing characteristics and are therefore ideal for critical control applications. Some CPLDs require extremely low amounts of power and are very inexpensive, making them ideal for cost-sensitive, battery-operated, portable applications such as mobile phones and digital handheld assistants. Categories Logic devices can be classified into two broad categories - fixed and programmable. Fixed Logic Devices As the name suggests, the circuits in a fixed logic device are permanent, they perform one function or set of functions - once manufactured, they cannot be changed. With fixed logic devices, the time required to go from design, to prototypes, to a final manufacturing run can take from several months to more than a year, depending on the Mohd Uzir Kamaluddin / Aug 2016 Page 1

2 complexity of the device. And, if the device does not work properly, or if the requirements change, a new design must be developed. Programmable Logic Devices On the other hand, programmable logic devices (PLDs) are standard, off-the-shelf parts that offer customers a wide range of logic capacity, features, speed, and voltage characteristics - and these devices can be changed at any time to perform any number of functions. With programmable logic devices, designers use inexpensive software tools to quickly develop, simulate, and test their designs. Then, a design can be quickly programmed into a device, and immediately tested in a live circuit. The PLD that is used for this prototyping is the exact same PLD that will be used in the final production of a piece of end equipment, such as a network router, a DSL modem, a DVD player, or an automotive navigation system. There are no NRE costs and the final design is completed much faster than that of a custom, fixed logic device. Another key benefit of using PLDs is that during the design phase customers can change the circuitry as often as they want until the design operates to their satisfaction. That's because PLDs are based on re-writeable memory technology - to change the design, simply reprogram the device. Once the design is final, customers can go into immediate production by simply programming as many PLDs as they need with the final software design file. Types Generally, programmable logic devices can be described as being one of three different types: Simple programmable logic devices (SPLD) Complex programmable logic devices (CPLD) Field programmable logic devices (FPGA) Architecture There are several manufacturers with many different families of PLD devices, so there are many variations in architecture. The two major types of programmable logic devices are: Field programmable gate arrays (FPGAs) Complex programmable logic devices (CPLDs) The distinction between the two is often a little fuzzy, with manufacturers designing new, improved architectures, and frequently muddying the waters for marketing purposes. Together, CPLDs and FPGAs are often referred to as high-capacity programmable logic devices (HCPLD). Simple Programmable Logic Devices (SPLD) Simple programmable logic devices (SPLD) are the simplest, smallest and least-expensive forms of programmable logic devices. SPLDs can be used in boards to replace 7400-series TTL components (AND, OR, and NOT gates). Simple programmable logic devices typically comprise 4 to 22 fully connected macrocells. These macrocells are typically comprised of some combinatorial logic (such as AND OR gates) and a flip-flop. In other words, a small Boolean logic equation can be built within each macrocell. This equation will combine the state of some number of binary inputs into a binary output and, if necessary, store that output in the flip-flop until the next clock edge. Of course, the particulars of the available logic gates and flip-flops are specific to each manufacturer and product family. But the general idea is always the same. Mohd Uzir Kamaluddin / Aug 2016 Page 2

3 Most SPLDs use either fuses or non-volatile memory cells (EPROM, EEPROM, FLASH, and others) to define the functionality. These devices are also known as: Programmable array logic (PAL) Generic array logic (GAL) Programmable logic arrays (PLA) Field-programmable logic arrays (FPLA) Programmable logic devices (PLD) Advantages PLDs are often used for address decoding, where they have several clear advantages over the 7400-series TTL parts that they replaced: 1. One chip requires less board area, power, and wiring than several do. 2. The design inside the chip is flexible, so a change in the logic does not require any rewiring of the board. Rather, simply replacing one PLD with another part that has been programmed with the new design can alter the decoding logic. Functions Programmable Logic Devices (PLDs) are digital devices with configurable logic and flip-flops linked together with programmable interconnect. Logic devices provide specific functions, including: Device-to-device interfacing Timing Data communication Control operations Signal processing Almost every other function a Data display system must perform Memory cells control and define the function that the logic performs and how the various logic functions are interconnected. Programming Technology The programming technologies for PLD devices are based on the various types of semiconductor memory. As new types of memories have been developed, the same technology has been applied to the creation of new types of PLD devices. The amount of logic resources available is the major distinguishing feature between SPLDs and HCPLDs. Today, SPLDs are devices that typically contain the equivalent of 600 or fewer gates, while HCPLDs have thousands and hundreds of thousands of gates available. Of the two types of HCPLD devices, FPGAs offer the highest amount of logic density, the most features, and the highest performance. Examples of PLD applications There are many applications that use programmable logic devices including in the field of: Networking Aerospace and defense Automotive Consumer electronics Computing Distributed monetary systems Communications Audio Computing Avionics Mohd Uzir Kamaluddin / Aug 2016 Page 3

4 Some small scale applications of PLD Code converter, for instance from binary to gray code. BCD to 7 segment converters, supporting A-F letters Quadrature decoders and counters Parity checkers, checksums and error detection and correction Different types of counters and registers Memory and I/O controllers for microprocessors Lookup tables A portion of a logic diagram. A portion of a logic diagram is shown in figure below. The logic diagram shows all of the logic resources available in a particular device. In each device, inputs are provided in true and complement versions, as shown in the figure. These drive what are often called input lines, which are the vertical lines in the logic diagram. These input lines can then be connected to product terms. The name product term is really just a fancy name for an AND gate. However, PLDs provide very wide gates, which can be cumbersome to draw. To save space, the product terms are drawn as horizontal lines with a small AND gate symbol at one end to indicate the function being performed. Mohd Uzir Kamaluddin / Aug 2016 Page 4

5 PAL Device Array structure ROM's and PROGRAMMABLE LOGIC Read Only Memory (ROM) A ROM is a combinational component for storing data. The data might be a truth table or the data might be the control words for a microprogrammed CPU. A ROM can be programmed at the factory or in the field. The following image shows the generic form of a ROM: Mohd Uzir Kamaluddin / Aug 2016 Page 5

6 An n x m ROM can store the truth table for m functions defined on log2 n variables: Example: Implement the following functions in a ROM: F0 = A F1 = A'B' + AB Since a ROM stores the complete truth table of a function (meaning that a ROM decodes every minterm of a function) the first step is to express each function as a truth table. For the discussion that follows it may be helpful to keep in mind the canonical form of the function also: F0 = AB' + AB F1 = A'B' + AB The special notation to show the ROM implementation of a function is: Exercise 1: Implement the following functions using PROM Mohd Uzir Kamaluddin / Aug 2016 Page 6

7 F1(A, B, C)=Σ(0, 1, 2, 5, 7) and F2(A, B, C)=Σ(1, 4, 6) Exercise 2: Design a PROM circuit that takes a 3-bit input and produces its square as 6-bit output. The image above shows how a 4x3 ROM can be used to implement the two functions F0 and F1. (Note, there is room in the ROM for 3 functions of two variables. F2 isn't used. Example shows a ROM with an unused portion to demonstrate that a ROM may still be the most efficient implementation even when large sections of the ROM go unused.) The diagram can be imagined as a decoder inside the ROM that decodes the inputs A B. Just like any decoder, one output line is selected for every unique set of inputs. If the selected output line is connected to an OR gate the function associated with the OR gate will have a value of 1 for the particular set of inputs. Note that the image above also shows a new way to indicate multiple connections with a single line. For example: Mohd Uzir Kamaluddin / Aug 2016 Page 7

8 A single vertical line that intersects 4 horizontal lines represents potentially 4 different lines or connections. This is a notational convenience when talking about ROM's, PLA's, and PAL's because it makes the diagrams much easier to read. The circles at the intersection of two lines indicates a connection. Connections are either formed at the factory or in the field. If they are formed in the field a special programmable ROM is used. One type of programmable ROM is a ROM that has a fuse at every connection. Fuses at connections not wanted are burned by running high current through the fuse. What is left are the connections that define the data within the ROM. Observations Not very efficient implementation of sparse functions. A ROM that implements two functions does not require twice the number of gates as a ROM that implements one function. (The decoder is shared by every output function.) Some extra points ROMs programmed at the factory are called mask ROMS because during fabrication the circuit patterns are determined by a mask. There are several different types of field programmable ROMS: PROM (Programmable Read-Only Memory) - This is the type that was discussed above. Connections are fused and burned in the field with a PROM programmer. EPROM (Erasable Programmable Read-Only Memory) - This type of ROM can be rewritten by shining an ultraviolet light through a window on the IC. EEPROM (Electrically Erasable Programmable Read-Only Memory) - Rather than ultraviolet light an extra high voltage is used to re-write the contents of this type of ROM. Flash Memory - Instead of requiring extra high voltages flash memory devices work with regular device voltages. Programmable Logic A programmable logic device works like a ROM but is a more efficient solution for implementing sparse output functions. (Not all minterms are decoded.) There are two types of programmable logic devices: PLA (Programmable Logic Array) PAL (Programmable Array Logic) As suggested earlier that a ROM had a decoder inside it and could be visualized as: Mohd Uzir Kamaluddin / Aug 2016 Page 8

9 The image above also defines two terms that will be used to distinguish between PLA and PAL devices: AND Array - this is the portion of the device that decodes the inputs. The AND array determines the minterms decoded by the device. A ROM decodes all possible minterms. OR Array - this is the portion of the device that combines the minterms for the definition of a function. PLA A PLA is a programmable logic device with a programmable AND array and a programmable OR array. A PLA with n inputs has fewer than 2 n AND gates (otherwise there would be no advantage over a ROM implementation of the same size). A PLA only needs to have enough AND gates to decode as many unique terms as there are in the functions it will implement. Because of the control-ability of the AND array and there is a limit to the number of terms that can be specified in the AND array, it may be more economical to simplify the function before implementing it with a PLA. If simplification is done to the function and then intended to implement with a PAL device, it should also be kept in mind that product terms can be shared between functions. (Product sharing is when two functions share a product term decoded by the AND array. For example, in the image below the product term AB is shared between F0 and F1.) Example: Implement the functions F0 F1 we introduced above using a PLA with 2 inputs, 3 product terms, and 2 outputs. The un-programmed PLA from the manufacture looks like: After programming for the two functions F0 F1 the state of the PLA is: Mohd Uzir Kamaluddin / Aug 2016 Page 9

10 Notice that it only need three AND gates because there are only three unique minterms in the functions F0 and F1. Also, notice that since that the OR array can be controlled, it can share with the minterm AB in the definitions of both functions. Note, there may be an advantage to simplifying the functions before implementing. In the example used here there is no advantage. The simplified form of the functions F0 and F1 still require 3 unique product terms. Because product terms can be shared between functions it s important to look for common product terms when simplifying. PAL A PAL is a programmable logic device with a programmable AND array and a fixed OR array. A PAL has a fixed OR array. For example, here is what an un-programmed PAL might look like straight from the manufacture: A fixed OR array makes the device less expensive to manufacture. On the other hand, having a fixed OR array means you can't share product terms between functions. Example: Implement the functions F0 F1 we introduced above using the PAL given above. For this implementation it will need to simplify the functions F0 F1 because the PAL that are given has an output function that can accommodate only one product term. The simplified form of the functions are: F0 = A F1 = A'B' + AB After programming for the two functions F0 F1 the state of the PAL is: So, in summary: A PLA device has a programmable AND and programmable OR array Mohd Uzir Kamaluddin / Aug 2016 Page 10

11 A PAL device has a programmable AND and fixed OR array (A ROM has a fixed AND and programmable OR array) When implementing with a ROM there is no advantage to minimizing the functions since the input is fully decoded. When implementing with a PLA there may be an advantage to minimizing the expression but also have to keep in mind that product terms can be shared between functions. So, when minimizing one function, it is needed to consider the form of other functions and watch for product terms that can be shared. When implementing with a PAL there may also be some advantages to minimizing the function first. However, since it can't share product terms with a PAL it did not have to consider the form of other functions when minimizing. Mohd Uzir Kamaluddin / Aug 2016 Page 11

Programmable Logic Devices

Programmable Logic Devices Programmable Logic Devices Fig. (1) General structure of PLDs Programmable Logic Device (PLD): is an integrated circuit with internal logic gates and/or connections that can