ENEE 350 Computer Organization Fall, 2004 Project Part 2, due November 18, 2004

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1 ENEE 350 Computer Organization Fall, 2004 Project Part 2, due November 18, 2004 Objective In this second phase of the project, you will make a datapath for the instruction set you devised in part 1. This datapath will show all of the units and wires that make up a processor that can run your instructions. You will also specify the control signals to execute each of your instructions on this datapath. Teamwork You are expected to complete this project in the same groups as in the first stage. Submit the following: A block diagram of your datapath. It may be hand drawn, but if it is, please be meticulously neat (use a ruler). The cycle by cycle microarchitecture (MAL) instructions for each ISA level instruction. Datapath The datapath is the schematic for your microprocessor. It shows the wires on which data can flow, the registers in which data can be stored, the muxes for directing data, and the computational units (ALUs). It does not need to show the internals of the computational units, and it does not need to show the control unit, specifically data select lines on the muxes, and clock lines on the registers. Your datapath is expected to contain the following components: Register file Instruction register Program Counter (either inside the register file or separate, depending on your architecture) One ALU Main memory In addition, your datapath will have the following: Internal registers, as is necessary Muxes Wires connecting the registers and muxes In devising your datapath, please use the following rules and conventions: Wires carrying data into a register should connect to the top, wires carrying data out of

2 a register should connect to the bottom, and wires carrying data addressing an array of registers (like the register file) should connect to the side. Wires should always be unidirectional, and may not carry two different signals at once. If a wire is not 8 bits in width, draw a tick mark across it and indicate its size. Only registers may store data between cycles. Only one register in an array of registers (like the register file or main memory) may be accessed at one time. You may not store to one register in the array and read from another. Only one wire may connect to a register input. Please label all of your registers and muxes. Only one ALU is available. Registers A register is simply several D flip flops in parallel (generally eight in this project), with several inputs D 7 0, several outputs Q 7 0, and a common clock signal (which you do not need to draw). It is the only element in the data path that can store values. As you should recall from ENEE244, a register will store incoming data on the D input when the clock input is pulsed, and will output its stored data continuously on the Q output. When the clock input is constant, incoming data has no effect on the register. Register File The register file contains all of the general purpose registers that you encoded in the first part of the project. It has a data input, an address input, and a data output. The data input and output function only as the input and output for the register that is currently being indexed by the address input. Instruction Register The instruction register is a special register that contains the current instruction byte that the processor is executing. The first stage of executing any instruction is to fetch the instruction from memory and put it in the instruction register. Once the instruction is in that register, the instruction byte may be broken down and individual bits accessed.

3 Program Counter The program counter holds the address of the next instruction in memory to be executed. If you made the program counter general purpose (so that it could be accessed like any other register by your instructions), your program counter will be contained within the register file. Otherwise, the program counter will stand alone as a separate register. Main Memory While not strictly part of your processor, you should include main memory in your datapath. You should treat it in the same way as the register file. Arithmetic Logic Unit (ALU) The ALU performs addition, subtraction, and other arithmetic computations. It has two inputs and one output, where the output is a function of the input values. The function is selected by a control input. The ALU is simply computational, and does not store any values. Multiplexors (muxes) A register may have only one input. In order to have a value enter a register from different sources, you need a mux. A mux has two or more inputs, one output, and a selection (control) input. Depending on which input is selected by the control, that input is effectively connected directly to the output. It is important to note that a mux does not store data; it just passes it on. Wire A wire is a unidirectional path through which data can flow. It has one source and one or more destinations. A wire may not have more than one source at the same time. A wire may carry more than one bit; in fact, most of the wires you should draw for your data path will be 8 bits in width. Control The control unit of your processor provides the mux selection signals and the clock

4 signals to execute your instruction set on your datapath. Instruction execution will take several cycles, where each cycle is composed of two steps: 1. Mux selection lines are set up to route data. 2. A clock signal is sent simultaneously to all registers that need to store data. Every instruction should take between 2 and 6 cycles to execute. Some may require even more, depending on your choice of instructions. The control unit is implemented as a finite state machine, with each cycle of each instruction comprising a state. The mux settings are the output of the state. Your task is to specify the control signals for each instruction in your instruction set. For a particular instruction, you should state the microassembly code for each cycle. Next to it you should specify how the muxes should be set for that cycle (and what function the ALU should compute, if applicable), and what registers should be clocked (should store data) on that cycle. If it does not matter how a mux should be set on that cycle, indicate that. Microassembly code simply specifies how data is transferred on that cycle. For example, the instruction PC >AOR means that data is transferred from the PC register to the AOR register on that cycle. It implies that wires exist connecting the two registers, and specifies that muxes are set up so that data is passed from the output of PC to the input of AOR. Additionally, it states that the AOR register is clocked at the end of the cycle. Another example is RF[IR[2..0]] + PC > AOR This states that the final 3 bits of the IR (instruction register) are addressing the register file. The output of the register file is routed to one input of the ALU, the PC is routed to the other, and the ALU output is routed to AOR. The ALU is set to add, and the AOR is clocked at the end of the cycle. More information on microassembly is available in the course notes.

5 Example The following is an example of how to implement a processor with one instruction: the ADD ry,rz instruction which adds ry+rz and puts the result in rz. Datapath IR ry OPCODE rz PC a RF to control 1 AIR memory b c ALU AOR Control The following is the control code to implement the ADD instruction on the above datapath. Your submission should follow this general template: mux a mux b registers clocked Cycle Microassembly mux c ALU For all instructions: 1 mem[pc]-->ir d.c. 1 PC + IR, PC PC+1-->PC For ADD: 2 RF[ry]-->AIR ry d.c. d.c. d.c. AIR 3 AIR+RF[rz]-- >AOR rz AIR RF + AOR 4 AOR-->RF[ry] ry d.c. d.c. d.c. RF *note: ry=ir[3..2], rz=ir[1..0], d.c.=don't care Notice that the first cycle is universal for all instructions. This is important, because until the instruction is in the instruction register, the processor cannot tell which instruction will be executed.

CSE 141L Computer Architecture Lab Fall Lecture 3

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