MIPS Hello World. MIPS Assembly 1. # PROGRAM: Hello, World! # Data declaration section. out_string:.asciiz "\nhello, World!\n"

Transcription

1 MIPS Hello World MIPS Assembly 1 # PROGRAM: Hello, World!.data # Data declaration section out_string:.asciiz "\nhello, World!\n".text # Assembly language instructions main: # Start of code section li $v0, 4 # system call code for printing string = 4 la $a0, out_string # load address of string to be printed into $a0 syscall # call operating system to perform operation in $v0 # syscall takes its arguments from $a0, $a1,... This illustrates the basic structure of an assembly language program. - data segment and text segment - use of label for data object (which is a zero-terminated ASCII string) - use of registers - invocation of a system call

2 MIPS Register Names MIPS Assembly 2 MIPS assemblers support standard symbolic names for the general-purpose registers: $zero $at $v0-1 $a0-3 $t0-9 $s0-7 $k0-1 $gp $sp $fp $ra stores value 0; cannot be modified reserved for use by the assembler used for system calls and procedure return values used for passing arguments to procedures used for local storage; caller saves used for local storage; procedure saves reserved for use by OS kernel pointer to area storing global data (data segment) stack pointer frame pointer; primarily used during stack manipulations used to store return address in procedure call

3 MIPS Arithmetic Instructions MIPS Assembly 3 All arithmetic and logical instructions have 3 operands Operand order is fixed (destination first): Example: <opcode> <dest>, <leftop>, <rightop> C code: a = b + c; MIPS code : add a, b, c (we ll talk about register syntax in a bit) The natural number of operands for an operation like addition is three requiring every instruction to have exactly three operands, no more and no less, conforms to the philosophy of keeping the hardware simple

4 Basic MIPS Arithmetic Instructions MIPS Assembly 4 Here are the most basic arithmetic instructions: add $rd,$rs,$rt Addition with overflow GPR[rd] <-- GPR[rs] + GPR[rt] div $rs,$rt Division with overflow $lo <-- GPR[rs]/GPR[rt] $hi <-- GPR[rs]%GPR[rt] mul $rd,$rs,$rt Multiplication without overflow GPR[rd] <-- (GPR[rs]*GPR[rt])[31:0] sub $rd,$rs,$rt Subtraction with overflow GPR[rd] <-- GPR[rs] - GPR[rt] Instructions "with overflow" will generate an runtime exception if the computed result is too large to be stored correctly in 32 bits. There are also versions of some of these that essentially ignore overflow, like addu.

5 Limitations and Trade-offs MIPS Assembly 5 Design Principle: simplicity favors regularity. Of course this complicates some things... C code: a = b + c + d; MIPS pseudo-code: add a, b, c add a, a, d Operands must be registers (or immediates), only 32 registers are provided Each register contains 32 bits Design Principle: smaller is faster. Why?

6 Immediates MIPS Assembly 6 In MIPS assembly, immediates are literal constants. Many instructions allow immediates to be used as parameters. addi li $t0, $t1, 42 # note the opcode $t0, 42 # actually a pseudo-instruction Note that immediates cannot be used with all MIPS assembly instructions; refer to your MIPS reference card. Immediates may also be expressed in hexadecimal: 0xFFFFFFFF

7 MIPS Logical Instructions MIPS Assembly 7 Logical instructions also have 3 operands: <opcode> <dest>, <leftop>, <rightop> Examples: and $s0, $s1, $s2 # bitwise AND andi $s0, $s1, 42 or $s0, $s1, $s2 # bitwise OR ori $s0, $s1, 42 nor $s0, $s1, $s2 # bitwise NOR (i.e., NOT OR) sll $s0, $s1, 10 # logical shift left srl $s0, $s1, 10 # logical shift right QTP: MIPS assembly doesn t include the logical operation not. Why? How would you achieve the effect of a logical not operation in MIPS assembly?

8 MIPS Load and Store Instructions MIPS Assembly 8 Transfer data between memory and registers Example: C code: A[12] = h + A[8]; MIPS code: lw $t0, 32($s3) # load word add $t0, $s2, $t0 sw $t0, 48($s3) # store word Can refer to registers by name (e.g., $s2, $t2) instead of number Load command specifies destination first: Store command specifies destination last: opcode <dest>, <address> opcode <dest>, <address> Remember arithmetic operands are registers or immediates, not memory! Can t write: add 48($s3), $s2, 32($s3)

9 Additional Load and Store Instructions MIPS Assembly 9 There are also load and store instructions that act on data objects smaller than a word: lw load word from specified address lh load half-word from specified address lb load byte from specified address sw store word to specified address sh store half-word to specified address sb store byte to specified address There are restrictions: For word-oriented operations, the address must be word-aligned (i.e., a multiple of 4). For half-word-oriented operations, the address must be half-word-aligned (i.e., a multiple of 2). Violating the restrictions causes a runtime exception. (See unaligned variants.)

10 Common Pitfall MIPS Assembly 10 Remember: - load instructions transfer data FROM memory TO a register - store instructions transfer data TO memory FROM a register

11 Addressing Modes MIPS Assembly 11 In register mode the address is simply the value in a register: lw $t0, ($s3) In immediate mode the address is simply an immediate value in the instruction: lw $t0, 0 # almost always a bad idea In base + register mode the address is the sum of an immediate and the value in a register: lw $t0, 100($s3) There are also various label modes: lw $t0, absval lw $t0, absval lw $t0, absval + 100($s3)

12 So far we ve learned MIPS Assembly 12 MIPS - loading words but addressing bytes - arithmetic on registers only # Instruction # Meaning add $s1, $s2, $s3 # $s1 = $s2 + $s3 sub $s1, $s2, $s3 # $s1 = $s2 $s3 lw $s1, 100($s2) # $s1 = Memory[$s2+100] sw $s1, 100($s2) # Memory[$s2+100] = $s1