QUCS Quite Universal Circuit Simulator
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1 QUCS Quite Universal Circuit Simulator Overview and Status Guilherme Brondani Torri FOSDEM 2017 EDA Developer room Brussels, 04 February 2016
2 Qucs /kju:ks/ Overview Project background Features Status Development Next release Final Remarks
3 Project background Website counter Created at TU-Berlin Michael Margraf Stefan Jahn GPLv contributors 20 languages Cross-platform Users Education Research Hobbyists Industry 2003 to 2017 Qucs Windows
4 Main Features Schematic capture Simulator Data visualization Equation system Component library Design / synthesis tools Modeling tools Spice converter (limited) Equation defined device (EDD) Verilog-A model builder Post-processing Octave/MATLAB Python Dependencies C++ compiler Qt4 (with Qt3Support) Autotools / CMake gperf / flex / bison ADMS LaTex
5 Experimental Qucs-S SPICE support Ngspice, Xyce, SpiceOpus Verilog-A generators XSPICE generators Gnucsator gnucap based qucsator implementation QUCS àgschem
6 Support Website Active maintainers: Guilherme Brondani Torri Claudio Girardi Vadim Kuznetsov Felix Salfelder Andrés Martínez Mera Mike Brinson Documentation Help Tutorial Workbook Report Workbook Technical Manual SourceForge Binaries Git repository (mirror) Issue tracker Forum / mailing lists GitHub Git repository (preferred) Issue tracker Wiki Travis CI AppVeyor
7 Tools Graphical Interface Qucs ActiveFilter Attenuator Editor Filter Help Matching Library Rescodes Transcalc ~ 170 components Command Line qucs qucsator qucsconv Third-party and scripts asco admsxml iverilog freehdl ps2sp octave python
8 Projects
9 Contents
10 Components
11 Libraries
12 Visualization
13 Qucs-ActiveFilter
14 Qucs-Attenuator
15 Qucs-Help DEPRECATED
16 Paste into schematicà Qucs-Matching
17 Qucs-Lib Paste into schematicà
18 Qucs-Rescodes Paste into schematicà
19 Qucs-Transcalc Paste into schematicà
20 Paste into schematicà Qucs-Filter
21 Command Line Tools Qucs schematic schematic to netlist schematic to print dump components data Qucsator simulator DC Transient AC AC Noise S-Parameter S-Parameter Noise (Harmonic Balance) Qucsconv - converter spice - qucs spice - qucslib vcd - qucsdata qucsdata - csv qucsdata - touchstone citi - qucsdata touchstone - qucsdata csv - qucsdata zvr - qucsdata mdl - qucsdata qucsdata - matlab Custom file formats schematic library netlist data file
22 Verilog-A Includes models written in Verilog-A (GPL) Compact models CMC BSIM 3, 4, 6 (Berkeley) license issues EKV (EPFL) HICUM L0, L2 (TU-Dresden) FBH-HBT (TU-Berlin) qucs-nonfree repository ADMS (Automatic Device Model Synthesizer) Accellera Verilog-A à XML transformations à XYZ code license issue Subset of Verilog-AMS QUCS limitations Not supported: V(n)<+ ; New.vams headers GPL3+
23 Demo Examples RLC circuit, parameter sweep 555 timer: macro modeling Optimization: Band-pass filter 10 GHz microstrip band-pass filter Verilog counter Verilog-A support / model builder
24 RLC, parameter sweep
25 555 macro model
26 Optimization (ASCO)
27 Microstrip band-pass filter
28 Verilog Counter
29 Status Release (January 22, 2017) Bug fixing, usability improvements, build system cleanup Ongoing port Qt3Support to Qt4 New active-filter synthesis tool Integration of regression tests Removal of non-gpl models Adopted git-flow branching model 168 issues closed Develop (Release ) RF and Microwave Tuner Removal of qucs-editor and qucs-help (quick release)
30 Resources Website: GitHub (preferred): SourceForge: Mailing lists: IRC channel: #qucs Forum: Bug trackers: Source code documentation: Downloads: (NEW) Qucs-Help: (NEW) Transifex translations:
31 Final remarks User friendly Advanced components and modeling features We are open for collaboration Help is welcome
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