More C functions and Big Picture [MIPSc Notes]

Size: px
Start display at page:

Download "More C functions and Big Picture [MIPSc Notes]"

Transcription

1 More C functions and Big Picture [MIPSc Notes] Implementing C functions Passing parameters Local variables Stack frames Big picture Compiling Assembling Passing parameters by value or reference Galen H. Sasaki EE 361 University of Hawaii 1 C Functions: Passing Parameters k = max(i,j) max(int x, int y) Caller Load values i and j jal max Unload result Callee Reference values x and y Return result Where to pass parameters? Input parameters: registers global memory locations stack not ideal Return parameter: $2 (not always but true for our textbook) Galen H. Sasaki EE 361 University of Hawaii 2

2 Callee max(int i, int j) if (i>j) return i; max: # $4 = i, $5 = j # return max in $2 slt $1,$5,$4 # $1 = 1 if j < i beq $0,$1,Else move $2,$4 jr $31 else return j; Else: move $2,$5 jr $31 Galen H. Sasaki EE 361 University of Hawaii 3 Caller: Calling Procedure main() # $8 = n, $9 = m, $10 = k, $11 = temporary # Put input parameters in registers k = max(n,m); move $11,$31 # Save $31 jal max # goto max (prev. slide) move $31,$11 # Restore $31 # Put result in k Galen H. Sasaki EE 361 University of Hawaii 4

3 Review Calling Procedure: Save any registers that must be preserved across the call [Any reg values that could destroyed should by the function should be stored] Input parameters jal Get output parameters Restore any registers that must be preserved across the call Galen H. Sasaki EE 361 University of Hawaii 5 MIPS Convention For Registers Register Name Number Usage $zero 0 constant 0 $at 1 reserved for assembler $v0-$v1 2-3 expression evaluation and results of a function (return values) a0-$a3 4-7 arguments 1-4 (input parameters) $t0-$t temporary (not preserved across call) (callee s responsible to $s0-$s saved temporary (preserved across call) preserve values) $t8-$t temporary (not preserved across call) (caller s responsibility $k0-$k reserved for OS kernel to preserve values) $gp 28 pointer to global area $sp 29 stack pointer $fp 30 frame pointer $ra 31 return address Galen H. Sasaki EE 361 University of Hawaii 6

4 Stacks Problem: Limited number of registers to save stuff in Solution: Stack can store lots of stuff and in a dynamic way (i.e., as needed). Passing paramaters via stack: input values and return (output) values C function local variables Galen H. Sasaki EE 361 University of Hawaii 7 Parameter Passing Via Stack: Caller main k = max(n,m); # n = $8, m = $9, k = $10 addi $sp,$sp,-12 sw sw sw jal $ra,0($sp) $8,4($sp) $9,8($sp) max move $10,$2 $sp $sp ra n m lw $ra,$0($sp) addi $sp,$sp,+12 Galen H. Sasaki EE 361 University of Hawaii 8

5 Parameter Passing Via Stack: Callee max(int i, int j) if (i>j) return i; else return j; max: lw $4,0($sp) lw $5,4($sp) Else: slt $1,$5,$4 beq $0,$1,Else move $2,$4 jr $31 move $2,$5 jr $31 same as before $sp ra 1st 2nd Galen H. Sasaki EE 361 University of Hawaii 9 Local Variables Registers are good locations for local variables because of speed. But we need to save and restore them when calling a function -- on stack -- other registers Review: Who is responsible for saving? Caller or callee? Caller save: Calling function is responsible to save register values Disadvantages: - have to save register values for every function call even if not used by callee Callee save: Called function is responsible to save register values Disadvantages: - have to save registers even if not used by caller Galen H. Sasaki EE 361 University of Hawaii 10

6 k ji Local Variables on Stack Created by callee funct: addi $sp,$sp,-12 m n k jip funct(int i, int j, int k) int n, m, p; lw $1, ($sp) # $1 = j sw $1, ($sp) # m = $1 m = j; addi $sp,$sp,12 jr $ra # $ra = $31 Convention: input parameters are pushed into stack from right to left. Galen H. Sasaki EE 361 University of Hawaii 11 Example: factorial factorial(n) = n! = n (n-1) (n-2). (1) // Recursive implementation in C int fact(int n) if (n<1) return(1); else return(n * fact(n-1)); Fact: sub $sp,$sp,8 sw $ra,4($sp) sw $a0,0($sp) slt $t0,$a0,1 beq $t0,$zero,else add $v0,$zero,1 add $sp,$sp,8 jr $ra Else: sub $a0,$a0,1 jal fact lw $a0,0($sp) lw $ra,4($sp) add $sp,$sp,8 mul $v0,$a0,$v0 jr $ra if (n<1) return(1) return(n*fact(n-1)) Galen H. Sasaki EE 361 University of Hawaii 12

7 Stack Frame (or procedure call frames) Stack pointer $sp n m j 1) is used to point to top of stack 2) used as a reference to variables It has two jobs -- bad Frame point $fp takes over job 2 During execution of a function, the fp is stable. Galen H. Sasaki EE 361 University of Hawaii 13 Stack Frame For each call there is a block of memory on the stack called the stack frame. * to pass arguments * to save registers * for local variables Typical stack frame: $sp $fp local variables arrays, structs saved reg values including ret address arg reg values arguments (from caller) Stack can dynamically change and we still have stable $fp Left to right (4th, 5th, etc arguments because 0th, 3rd are in regs) Galen H. Sasaki EE 361 University of Hawaii 14

8 Stack Frames # $t0 = i, $s0 = j, $s1 = k; # Save $t0, $a0, $a1, and $ra on the stack addi $sp,$sp,-16 main() sw $t0,0($sp) sw $ra,4($sp) sw $a0,8($sp) sw $a1,12($sp) k = addumup(i,j); # Load parameters move $a0,$t0 old $t0 move $a1,$s0 old $ra # go to addumup old $a0 jal addumup old $a1 # Load output into k move $s1,$2 addumup(int i, int j) # Restore $t0, $a0, $a1, and $ra from the stack lw $t0,0($sp) int n; lw $ra,4($sp) n = i + j; lw $a0,8($sp) return n; lw $a1,12($sp) # Balance stack addi $sp,$sp,16 Galen H. Sasaki EE 361 University of Hawaii 15 main() k = addumup(i,j); addumup(int i, int j) int n, m; n = i + j; m = n + 10; return m; Stack Frames addumup: # n is in $s0, and m is in stack addi $sp,$sp,-16 sw $s0,8($sp) sw $fp,12($sp) addi $fp,$sp,12 # n = i+j add $s0,$a0,$a1 # m = n + 10 lw $t0,-8($fp) addi $t0,$t0,10 sw $t0,-12($fp) # return m lw $v0,-12($fp) # restore $fp move $fp,0($fp) # restore $s0 and stack lw $s0,8($sp) addi $sp,$sp,16 jr $ra old $t0 old $ra old $a0 old $a1 m n saved $s0 saved $fp old $t0 old $ra old $a0 old $a1 Galen H. Sasaki EE 361 University of Hawaii 16 $fp No arguments or $ra saved since addumup doesn t call anything

9 Calling Convention Calling procedure to a function funct(arg0, arg1,..., argn) Pass parameters arg0,..., argn through $a0-$a3 and stack Save caller saved registers, i.e., $a0-$a3, $t0-$t9 that are being used jal funct Restore caller saved registers Load values from $v0-$v1 funct: Make room on stack for stack frame Save callee registers, i.e., $s0-$s7 Save $fp, and have the new $fp point to the old value Save $ra, if funct makes a function call Do the function operation using $fp to reference local variables in the stack Restore registers and balance the stack jr $ra Stack $a0 = arg0 $a1 = arg1 $a2 = arg2 $a3 = arg3 arg4 arg5 arg5 Galen H. Sasaki EE 361 University of Hawaii 17 MIPS Convention For Registers Register Name Number Usage $zero 0 constant 0 $at 1 reserved for assembler $v0-$v1 2-3 expression evaluation and results of a function a0-$a3 4-7 arguments 1-4 $t0-$t temporary (not preserved across call) $s0-$s saved temporary (preserved across call) $t8-$t temporary (not preserved across call) $k0-$k reserved for OS kernel $gp 28 pointer to global area $sp 29 stack pointer $fp 30 frame pointer $ra 31 return address Galen H. Sasaki EE 361 University of Hawaii 18

10 Memory Usage Reserved 0x x Text Segment Static Dynamic Data Segment Determined by OS (malloc) Stack Segment Galen H. Sasaki EE 361 University of Hawaii 19 Big Picture Compilers (very brief) Assemblers Odds and Ends CISC vs. RISC Arrays (and structures) Pointers Galen H. Sasaki EE 361 University of Hawaii 20

11 Big Picture -- Software C code: file.c high level language Compiler Assembly code: file.s Assembler Object file: file.o ISA Other object files libraries Linker machine code (executable) Loader computer (target machine) Galen H. Sasaki EE 361 University of Hawaii 21 What Does A Compiler Do? The parser: * Identifies keywords and symbols * Preprocessing (e.g., expanding macros ) * Outputs are tokens and symbol table Semantic analysis: The program is understood and a data structure is created that represents the program -- e.g., identifies statements, checks for proper syntax, adds info to symbol table. High level optimizations: optimization at C language level Code generation: C instruction --> template --> assembly code Low level optimizations: optimize at assembly lang. level file.c Compiler file.s Galen H. Sasaki EE 361 University of Hawaii 22

12 Templates Example: if (expr1 == expr2) statement 1; else statement 2; Evaluate expr1 and load into $r1 Evaluate expr2 and load into $r2 bne $r1,$r2,else Code for statement 1 j Skip Else: Code for statement 2 Skip: Galen H. Sasaki EE 361 University of Hawaii 23 What Does An Assembler Do? Converts assembly language programs into machine programs. Assembly language components: machine instructions pseudo instructions labels (or symbols) directives: not machine instructions, but instructions for the assembler on how to assemble.globl main.text main:.. addi $sp,$sp,-12 Instructions move $8,$9 # actually add $8,$0,$9. loop: skip: beq $0,$1,loop jr $ra.data char_data:.ascii2 The quick brown mongoose Data byte_data:.byte 0,1,2,3,7,9,11,12.byte 1,2,7,3,9,12,75,0 Galen H. Sasaki EE 361 University of Hawaii 24

13 Two-Pass Assembler main: loop: loop2:.text add $1,$2,$3 bne $1,$0,Skip addi $1,$2,3 or $3,$4,$5 slti $1,$3,11 jal max skip: addi $1,$1,1 mult $3,$12,$10 j loop max: jr $31.data array_words:.word 10,20,32 Pass 1: Scan program from top to bottom. Allocate space in memory for instructions and data. Build symbol table. add bne: Skip? addi or slt jal: max? addi mult j: loop? jr Symbol Table Symbol Value main 0 Skip loop loop2 max array_words Pass 2: Determine machine code Galen H. Sasaki EE 361 University of Hawaii 25.macro max($arg1,$arg2,$arg3) move $arg1,$arg2 slt $1,$arg2,$arg3 beq $0,$1,Skip move $arg1,$arg3 j max_over Skip: move $arg1,$arg2 max_over:.end_macro Macros Macro Expansion main: Block of Code 1 move $4,$5 slt $1,$5,$6 beq $0,$1,Skip.1 move $4,$6 j max_over.1 Skip.1: move $4,$5 max_over.1: Block of Code 2 main: Block of Code 1 move $10,$11 slt $1,$11,$12 max($4,$5,$6) beq $0,$1,Skip.2 Block of Code 2 move $10,$12 max($10,$11,$12) j max_over.2 Skip.2: move $10,$11 Block of Code 3 max_over.2: Block of Code 3 Galen H. Sasaki EE 361 University of Hawaii 26

14 Linking and Loading Output of Assembler: Object File: Header Text Data Relocation Info. Symbol Table Debug Linking: file1.o Header1 Text1 Data1 Relocation1 Symbol Table1 Debug1 file2.o Header2 Text2 Data2 Relocation2 Symbol Table2 Debug2 Loading: Load code and execute Header Text Data Relocation Symbol Table Debug Galen H. Sasaki EE 361 University of Hawaii 27 Odds and Ends Alternatives to the MIPS architecture Fallacies and Pitfalls Design Principles Pointers Galen H. Sasaki EE 361 University of Hawaii 28

15 Alternatives to MIPS * MIPS is RISC-- reduced instruction set computer * CISC -- complicated instruction set computer. Philosophy: make instructions powerful to shorten programs. Hypothetical CISC instructions: Example: autoincrement and autodecrement lwt $8,Start($19) increments $19 after load Example: addm $16,$17,Astart($19) Example: increment-compare-and-branch too much information for one word ---> double word instructions. Irregularities are bad. Implements for-loop icb $19,$20,Loop increment $19 branch if $19 < $20 Galen H. Sasaki EE 361 University of Hawaii 29 Fallacies and Pitfalls Design Principles Fallacies and Pitfalls * More powerful instructions mean higher performance * Write in assembly language to obtain the highest performance * Word addresses, in byte addressable memory, differ by 1 Big Endian Address Memory Design Principles Little Endian Address Memory * Smaller is faster * Simplicity favors regularity * Good design demands compromise * Make the common fast Galen H. Sasaki EE 361 University of Hawaii 30

16 clear1(int array[], int size) int i; for (i=0; i < size; i++) array[i] = 0; Arrays vs. Pointers clear2(int *array, int size) int *p; for (p = &array[0]; p < &array[size]; p++) *p = 0; array[0] array[1].. array[size-1] array[size] clear1(int array[], int size) int i; i = 0; while (i < size) array[i] = 0; i++; clear2(int *array[], int size) int *p; p = &array[0]; while (p < &array[size]) *p = 0; p++ Galen H. Sasaki EE 361 University of Hawaii 31 Arrays clear1(int array[], int size) int i; i = 0; while (i < size) array[i] = 0; i++; # $4 points to array, $5 = size # i: $2 clear1: move $2,$0 # i = 0; while: slt $1,$2,$5 # while (i < size) beq $0,$1,Return add $3,$2,$2 # array[i] = 0; add $3,$3,$3 add $3,$3,$4 sw $0,0($3) addi $2,$2,1 # i++; Return: j jr while $ra Galen H. Sasaki EE 361 University of Hawaii 32

17 Pointers # $4 = *array, $5 = size # $2 = p clear2(int *array[], int size) int *p; p = &array[0]; while (p < &array[size]) *p = 0; p++; array[0] array[1].. array[size-1] array[size] clear2: move $2,$4 # p = &array[0] while: add $3,$5,$5 add $3,$3,$3 add $3,$3,$4 # $3 = size*4 + *array slt $1,$2,$3 beq $1,$0,Return sw $0,0($2) # *p = 0; addi $2,$2,4 # p++; j while Return: jr $ra Galen H. Sasaki EE 361 University of Hawaii 33

EE 361 University of Hawaii Fall

EE 361 University of Hawaii Fall C functions Road Map Computation flow Implementation using MIPS instructions Useful new instructions Addressing modes Stack data structure 1 EE 361 University of Hawaii Implementation of C functions and

More information

ECE369. Chapter 2 ECE369

ECE369. Chapter 2 ECE369 Chapter 2 1 Instruction Set Architecture A very important abstraction interface between hardware and low-level software standardizes instructions, machine language bit patterns, etc. advantage: different

More information

COMP 303 Computer Architecture Lecture 3. Comp 303 Computer Architecture

COMP 303 Computer Architecture Lecture 3. Comp 303 Computer Architecture COMP 303 Computer Architecture Lecture 3 Comp 303 Computer Architecture 1 Supporting procedures in computer hardware The execution of a procedure Place parameters in a place where the procedure can access

More information

COE608: Computer Organization and Architecture

COE608: Computer Organization and Architecture Add on Instruction Set Architecture COE608: Computer Organization and Architecture Dr. Gul N. Khan http://www.ee.ryerson.ca/~gnkhan Electrical and Computer Engineering Ryerson University Overview More

More information

MIPS Functions and Instruction Formats

MIPS Functions and Instruction Formats MIPS Functions and Instruction Formats 1 The Contract: The MIPS Calling Convention You write functions, your compiler writes functions, other compilers write functions And all your functions call other

More information

Do-While Example. In C++ In assembly language. do { z--; while (a == b); z = b; loop: addi $s2, $s2, -1 beq $s0, $s1, loop or $s2, $s1, $zero

Do-While Example. In C++ In assembly language. do { z--; while (a == b); z = b; loop: addi $s2, $s2, -1 beq $s0, $s1, loop or $s2, $s1, $zero Do-While Example In C++ do { z--; while (a == b); z = b; In assembly language loop: addi $s2, $s2, -1 beq $s0, $s1, loop or $s2, $s1, $zero 25 Comparisons Set on less than (slt) compares its source registers

More information

Chapter 2. Computer Abstractions and Technology. Lesson 4: MIPS (cont )

Chapter 2. Computer Abstractions and Technology. Lesson 4: MIPS (cont ) Chapter 2 Computer Abstractions and Technology Lesson 4: MIPS (cont ) Logical Operations Instructions for bitwise manipulation Operation C Java MIPS Shift left >>> srl Bitwise

More information

Computer Architecture. Chapter 2-2. Instructions: Language of the Computer

Computer Architecture. Chapter 2-2. Instructions: Language of the Computer Computer Architecture Chapter 2-2 Instructions: Language of the Computer 1 Procedures A major program structuring mechanism Calling & returning from a procedure requires a protocol. The protocol is a sequence

More information

Control Instructions. Computer Organization Architectures for Embedded Computing. Thursday, 26 September Summary

Control Instructions. Computer Organization Architectures for Embedded Computing. Thursday, 26 September Summary Control Instructions Computer Organization Architectures for Embedded Computing Thursday, 26 September 2013 Many slides adapted from: Computer Organization and Design, Patterson & Hennessy 4th Edition,

More information

Control Instructions

Control Instructions Control Instructions Tuesday 22 September 15 Many slides adapted from: and Design, Patterson & Hennessy 5th Edition, 2014, MK and from Prof. Mary Jane Irwin, PSU Summary Previous Class Instruction Set

More information

CS 61C: Great Ideas in Computer Architecture More MIPS, MIPS Functions

CS 61C: Great Ideas in Computer Architecture More MIPS, MIPS Functions CS 61C: Great Ideas in Computer Architecture More MIPS, MIPS Functions Instructors: John Wawrzynek & Vladimir Stojanovic http://inst.eecs.berkeley.edu/~cs61c/fa15 1 Machine Interpretation Levels of Representation/Interpretation

More information

Branch Addressing. Jump Addressing. Target Addressing Example. The University of Adelaide, School of Computer Science 28 September 2015

Branch Addressing. Jump Addressing. Target Addressing Example. The University of Adelaide, School of Computer Science 28 September 2015 Branch Addressing Branch instructions specify Opcode, two registers, target address Most branch targets are near branch Forward or backward op rs rt constant or address 6 bits 5 bits 5 bits 16 bits PC-relative

More information

Architecture II. Computer Systems Laboratory Sungkyunkwan University

Architecture II. Computer Systems Laboratory Sungkyunkwan University MIPS Instruction ti Set Architecture II Jin-Soo Kim (jinsookim@skku.edu) Computer Systems Laboratory Sungkyunkwan University http://csl.skku.edu Making Decisions (1) Conditional operations Branch to a

More information

Chapter 2. Instruction Set Architecture (ISA)

Chapter 2. Instruction Set Architecture (ISA) Chapter 2 Instruction Set Architecture (ISA) MIPS arithmetic Design Principle: simplicity favors regularity. Why? Of course this complicates some things... C code: A = B + C + D; E = F - A; MIPS code:

More information

COMPUTER ORGANIZATION AND DESIGN

COMPUTER ORGANIZATION AND DESIGN COMPUTER ORGANIZATION AND DESIGN 5 th The Hardware/Software Interface Edition Chapter 2 Instructions: Language of the Computer 2.1 Introduction Instruction Set The repertoire of instructions of a computer

More information

MIPS Instruction Set Architecture (2)

MIPS Instruction Set Architecture (2) MIPS Instruction Set Architecture (2) Jinkyu Jeong (jinkyu@skku.edu) Computer Systems Laboratory Sungkyunkwan University http://csl.skku.edu EEE3050: Theory on Computer Architectures, Spring 2017, Jinkyu

More information

Machine Language Instructions Introduction. Instructions Words of a language understood by machine. Instruction set Vocabulary of the machine

Machine Language Instructions Introduction. Instructions Words of a language understood by machine. Instruction set Vocabulary of the machine Machine Language Instructions Introduction Instructions Words of a language understood by machine Instruction set Vocabulary of the machine Current goal: to relate a high level language to instruction

More information

Mark Redekopp, All rights reserved. EE 352 Unit 6. Stack Frames Recursive Routines

Mark Redekopp, All rights reserved. EE 352 Unit 6. Stack Frames Recursive Routines EE 352 Unit 6 Stack Frames Recursive Routines Arguments and Return Values MIPS convention is to use certain registers for this task $a0 - $a3 used to pass up to 4 arguments. If more arguments, use the

More information

CENG3420 Lecture 03 Review

CENG3420 Lecture 03 Review CENG3420 Lecture 03 Review Bei Yu byu@cse.cuhk.edu.hk 2017 Spring 1 / 38 CISC vs. RISC Complex Instruction Set Computer (CISC) Lots of instructions of variable size, very memory optimal, typically less

More information

CSCI 402: Computer Architectures. Instructions: Language of the Computer (3) Fengguang Song Department of Computer & Information Science IUPUI.

CSCI 402: Computer Architectures. Instructions: Language of the Computer (3) Fengguang Song Department of Computer & Information Science IUPUI. CSCI 402: Computer Architectures Instructions: Language of the Computer (3) Fengguang Song Department of Computer & Information Science IUPUI Recall Big endian, little endian Memory alignment Unsigned

More information

comp 180 Lecture 10 Outline of Lecture Procedure calls Saving and restoring registers Summary of MIPS instructions

comp 180 Lecture 10 Outline of Lecture Procedure calls Saving and restoring registers Summary of MIPS instructions Outline of Lecture Procedure calls Saving and restoring registers Summary of MIPS instructions Procedure Calls A procedure of a subroutine is like an agent which needs certain information to perform a

More information

Computer Organization and Structure. Bing-Yu Chen National Taiwan University

Computer Organization and Structure. Bing-Yu Chen National Taiwan University Computer Organization and Structure Bing-Yu Chen National Taiwan University Instructions: Language of the Computer Operations and Operands of the Computer Hardware Signed and Unsigned Numbers Representing

More information

ECE260: Fundamentals of Computer Engineering

ECE260: Fundamentals of Computer Engineering Supporting Nested Procedures James Moscola Dept. of Engineering & Computer Science York College of Pennsylvania Based on Computer Organization and Design, 5th Edition by Patterson & Hennessy Memory Layout

More information

Memory Usage 0x7fffffff. stack. dynamic data. static data 0x Code Reserved 0x x A software convention

Memory Usage 0x7fffffff. stack. dynamic data. static data 0x Code Reserved 0x x A software convention Subroutines Why we use subroutines more modular program (small routines, outside data passed in) more readable, easier to debug code reuse i.e. smaller code space Memory Usage A software convention stack

More information

Chapter 2A Instructions: Language of the Computer

Chapter 2A Instructions: Language of the Computer Chapter 2A Instructions: Language of the Computer Copyright 2009 Elsevier, Inc. All rights reserved. Instruction Set The repertoire of instructions of a computer Different computers have different instruction

More information

ENGN1640: Design of Computing Systems Topic 03: Instruction Set Architecture Design

ENGN1640: Design of Computing Systems Topic 03: Instruction Set Architecture Design ENGN1640: Design of Computing Systems Topic 03: Instruction Set Architecture Design Professor Sherief Reda http://scale.engin.brown.edu School of Engineering Brown University Spring 2014 Sources: Computer

More information

EN164: Design of Computing Systems Lecture 11: Processor / ISA 4

EN164: Design of Computing Systems Lecture 11: Processor / ISA 4 EN164: Design of Computing Systems Lecture 11: Processor / ISA 4 Professor Sherief Reda http://scale.engin.brown.edu Electrical Sciences and Computer Engineering School of Engineering Brown University

More information

MIPS R-format Instructions. Representing Instructions. Hexadecimal. R-format Example. MIPS I-format Example. MIPS I-format Instructions

MIPS R-format Instructions. Representing Instructions. Hexadecimal. R-format Example. MIPS I-format Example. MIPS I-format Instructions Representing Instructions Instructions are encoded in binary Called machine code MIPS instructions Encoded as 32-bit instruction words Small number of formats encoding operation code (opcode), register

More information

CSE Lecture In Class Example Handout

CSE Lecture In Class Example Handout CSE 30321 Lecture 07-09 In Class Example Handout Part A: A Simple, MIPS-based Procedure: Swap Procedure Example: Let s write the MIPS code for the following statement (and function call): if (A[i] > A

More information

Computer Architecture

Computer Architecture Computer Architecture Chapter 2 Instructions: Language of the Computer Fall 2005 Department of Computer Science Kent State University Assembly Language Encodes machine instructions using symbols and numbers

More information

Thomas Polzer Institut für Technische Informatik

Thomas Polzer Institut für Technische Informatik Thomas Polzer tpolzer@ecs.tuwien.ac.at Institut für Technische Informatik Branch to a labeled instruction if a condition is true Otherwise, continue sequentially beq rs, rt, L1 if (rs == rt) branch to

More information

UCB CS61C : Machine Structures

UCB CS61C : Machine Structures inst.eecs.berkeley.edu/~cs61c UCB CS61C : Machine Structures Lecture 10 Introduction to MIPS Procedures I Sr Lecturer SOE Dan Garcia 2014-02-14 If cars broadcast their speeds to other vehicles (and the

More information

Chapter 3. Instructions:

Chapter 3. Instructions: Chapter 3 1 Instructions: Language of the Machine More primitive than higher level languages e.g., no sophisticated control flow Very restrictive e.g., MIPS Arithmetic Instructions We ll be working with

More information

Lecture 2. Instructions: Language of the Computer (Chapter 2 of the textbook)

Lecture 2. Instructions: Language of the Computer (Chapter 2 of the textbook) Lecture 2 Instructions: Language of the Computer (Chapter 2 of the textbook) Instructions: tell computers what to do Chapter 2 Instructions: Language of the Computer 2 Introduction Chapter 2.1 Chapter

More information

Chapter 2. Instructions:

Chapter 2. Instructions: Chapter 2 1 Instructions: Language of the Machine More primitive than higher level languages e.g., no sophisticated control flow Very restrictive e.g., MIPS Arithmetic Instructions We ll be working with

More information

MIPS Datapath. MIPS Registers (and the conventions associated with them) MIPS Instruction Types

MIPS Datapath. MIPS Registers (and the conventions associated with them) MIPS Instruction Types 1 Lecture 08 Introduction to the MIPS ISA + Procedure Calls in MIPS Longer instructions = more bits to address registers MIPS Datapath 6 bit opcodes... 2 MIPS Instructions are 32 bits More ways to address

More information

Subroutines. int main() { int i, j; i = 5; j = celtokel(i); i = j; return 0;}

Subroutines. int main() { int i, j; i = 5; j = celtokel(i); i = j; return 0;} Subroutines Also called procedures or functions Example C code: int main() { int i, j; i = 5; j = celtokel(i); i = j; return 0;} // subroutine converts Celsius to kelvin int celtokel(int i) { return (i

More information

CSE Lecture In Class Example Handout

CSE Lecture In Class Example Handout CSE 30321 Lecture 07-08 In Class Example Handout Part A: J-Type Example: If you look in your book at the syntax for j (an unconditional jump instruction), you see something like: e.g. j addr would seemingly

More information

CS 110 Computer Architecture Lecture 6: More MIPS, MIPS Functions

CS 110 Computer Architecture Lecture 6: More MIPS, MIPS Functions CS 110 Computer Architecture Lecture 6: More MIPS, MIPS Functions Instructor: Sören Schwertfeger http://shtech.org/courses/ca/ School of Information Science and Technology SIST ShanghaiTech University

More information

Chapter 2. Instructions: Language of the Computer. Adapted by Paulo Lopes

Chapter 2. Instructions: Language of the Computer. Adapted by Paulo Lopes Chapter 2 Instructions: Language of the Computer Adapted by Paulo Lopes Instruction Set The repertoire of instructions of a computer Different computers have different instruction sets But with many aspects

More information

COMPSCI 313 S Computer Organization. 7 MIPS Instruction Set

COMPSCI 313 S Computer Organization. 7 MIPS Instruction Set COMPSCI 313 S2 2018 Computer Organization 7 MIPS Instruction Set Agenda & Reading MIPS instruction set MIPS I-format instructions MIPS R-format instructions 2 7.1 MIPS Instruction Set MIPS Instruction

More information

LECTURE 2: INSTRUCTIONS

LECTURE 2: INSTRUCTIONS LECTURE 2: INSTRUCTIONS Abridged version of Patterson & Hennessy (2013):Ch.2 Instruction Set The repertoire of instructions of a computer Different computers have different instruction sets But with many

More information

Stored Program Concept. Instructions: Characteristics of Instruction Set. Architecture Specification. Example of multiple operands

Stored Program Concept. Instructions: Characteristics of Instruction Set. Architecture Specification. Example of multiple operands Stored Program Concept Instructions: Instructions are bits Programs are stored in memory to be read or written just like data Processor Memory memory for data, programs, compilers, editors, etc. Fetch

More information

MODULE 4 INSTRUCTIONS: LANGUAGE OF THE MACHINE

MODULE 4 INSTRUCTIONS: LANGUAGE OF THE MACHINE MODULE 4 INSTRUCTIONS: LANGUAGE OF THE MACHINE 1 ARCHITECTURE MODEL The basic instruction set of a computer is comprised of sequences of REGISTER TRANSFERS. Example: Add A, B, C Register B # A

More information

Instructions: MIPS arithmetic. MIPS arithmetic. Chapter 3 : MIPS Downloaded from:

Instructions: MIPS arithmetic. MIPS arithmetic. Chapter 3 : MIPS Downloaded from: Instructions: Chapter 3 : MIPS Downloaded from: http://www.cs.umr.edu/~bsiever/cs234/ Language of the Machine More primitive than higher level languages e.g., no sophisticated control flow Very restrictive

More information

Computer Organization and Structure. Bing-Yu Chen National Taiwan University

Computer Organization and Structure. Bing-Yu Chen National Taiwan University Computer Organization and Structure Bing-Yu Chen National Taiwan University Instructions: Language of the Computer Operations and Operands of the Computer Hardware Signed and Unsigned Numbers Representing

More information

CS61C : Machine Structures

CS61C : Machine Structures inst.eecs.berkeley.edu/~cs61c/su05 CS61C : Machine Structures Lecture #8: MIPS Procedures 2005-06-30 CS 61C L08 MIPS Procedures (1) Andy Carle Topic Outline Functions More Logical Operations CS 61C L08

More information

Lectures 5. Announcements: Today: Oops in Strings/pointers (example from last time) Functions in MIPS

Lectures 5. Announcements: Today: Oops in Strings/pointers (example from last time) Functions in MIPS Lectures 5 Announcements: Today: Oops in Strings/pointers (example from last time) Functions in MIPS 1 OOPS - What does this C code do? int foo(char *s) { int L = 0; while (*s++) { ++L; } return L; } 2

More information

CS 61C: Great Ideas in Computer Architecture Strings and Func.ons. Anything can be represented as a number, i.e., data or instruc\ons

CS 61C: Great Ideas in Computer Architecture Strings and Func.ons. Anything can be represented as a number, i.e., data or instruc\ons CS 61C: Great Ideas in Computer Architecture Strings and Func.ons Instructor: Krste Asanovic, Randy H. Katz hdp://inst.eecs.berkeley.edu/~cs61c/sp12 Fall 2012 - - Lecture #7 1 New- School Machine Structures

More information

CS 110 Computer Architecture MIPS Instruction Formats

CS 110 Computer Architecture MIPS Instruction Formats CS 110 Computer Architecture MIPS Instruction Formats Instructor: Sören Schwertfeger http://shtech.org/courses/ca/ School of Information Science and Technology SIST ShanghaiTech University Slides based

More information

Lecture 5: Procedure Calls

Lecture 5: Procedure Calls Lecture 5: Procedure Calls Today s topics: Procedure calls and register saving conventions 1 Example Convert to assembly: while (save[i] == k) i += 1; i and k are in $s3 and $s5 and base of array save[]

More information

ELEC / Computer Architecture and Design Fall 2013 Instruction Set Architecture (Chapter 2)

ELEC / Computer Architecture and Design Fall 2013 Instruction Set Architecture (Chapter 2) ELEC 5200-001/6200-001 Computer Architecture and Design Fall 2013 Instruction Set Architecture (Chapter 2) Victor P. Nelson, Professor & Asst. Chair Vishwani D. Agrawal, James J. Danaher Professor Department

More information

Lecture 5: Procedure Calls

Lecture 5: Procedure Calls Lecture 5: Procedure Calls Today s topics: Memory layout, numbers, control instructions Procedure calls 1 Memory Organization The space allocated on stack by a procedure is termed the activation record

More information

Prof. Kavita Bala and Prof. Hakim Weatherspoon CS 3410, Spring 2014 Computer Science Cornell University. See P&H 2.8 and 2.12, and A.

Prof. Kavita Bala and Prof. Hakim Weatherspoon CS 3410, Spring 2014 Computer Science Cornell University. See P&H 2.8 and 2.12, and A. Prof. Kavita Bala and Prof. Hakim Weatherspoon CS 3410, Spring 2014 Computer Science Cornell University See P&H 2.8 and 2.12, and A.5 6 compute jump/branch targets memory PC +4 new pc Instruction Fetch

More information

Chapter 3 MIPS Assembly Language. Ó1998 Morgan Kaufmann Publishers 1

Chapter 3 MIPS Assembly Language. Ó1998 Morgan Kaufmann Publishers 1 Chapter 3 MIPS Assembly Language Ó1998 Morgan Kaufmann Publishers 1 Instructions: Language of the Machine More primitive than higher level languages e.g., no sophisticated control flow Very restrictive

More information

CS 316: Procedure Calls/Pipelining

CS 316: Procedure Calls/Pipelining CS 316: Procedure Calls/Pipelining Kavita Bala Fall 2007 Computer Science Cornell University Announcements PA 3 IS out today Lectures on it this Fri and next Tue/Thu Due on the Friday after Fall break

More information

Course Administration

Course Administration Fall 2018 EE 3613: Computer Organization Chapter 2: Instruction Set Architecture Introduction 4/4 Avinash Karanth Department of Electrical Engineering & Computer Science Ohio University, Athens, Ohio 45701

More information

Lecture 7: Procedures

Lecture 7: Procedures Lecture 7: Procedures CSE 30: Computer Organization and Systems Programming Winter 2010 Rajesh Gupta / Ryan Kastner Dept. of Computer Science and Engineering University of California, San Diego Outline

More information

Two processors sharing an area of memory. P1 writes, then P2 reads Data race if P1 and P2 don t synchronize. Result depends of order of accesses

Two processors sharing an area of memory. P1 writes, then P2 reads Data race if P1 and P2 don t synchronize. Result depends of order of accesses Synchronization Two processors sharing an area of memory P1 writes, then P2 reads Data race if P1 and P2 don t synchronize Result depends of order of accesses Hardware support required Atomic read/write

More information

5/17/2012. Recap from Last Time. CSE 2021: Computer Organization. The RISC Philosophy. Levels of Programming. Stored Program Computers

5/17/2012. Recap from Last Time. CSE 2021: Computer Organization. The RISC Philosophy. Levels of Programming. Stored Program Computers CSE 2021: Computer Organization Recap from Last Time load from disk High-Level Program Lecture-2 Code Translation-1 Registers, Arithmetic, logical, jump, and branch instructions MIPS to machine language

More information

Recap from Last Time. CSE 2021: Computer Organization. Levels of Programming. The RISC Philosophy 5/19/2011

Recap from Last Time. CSE 2021: Computer Organization. Levels of Programming. The RISC Philosophy 5/19/2011 CSE 2021: Computer Organization Recap from Last Time load from disk High-Level Program Lecture-3 Code Translation-1 Registers, Arithmetic, logical, jump, and branch instructions MIPS to machine language

More information

Chapter 2: Instructions:

Chapter 2: Instructions: Chapter 2: Instructions: Language of the Computer Computer Architecture CS-3511-2 1 Instructions: To command a computer s hardware you must speak it s language The computer s language is called instruction

More information

Operands and Addressing Modes

Operands and Addressing Modes Operands and Addressing Modes Where is the data? Addresses as data Names and Values Indirection L5 Addressing Modes 1 Assembly Exercise Let s write some assembly language programs Program #1: Write a function

More information

Chapter 2. Instructions: Language of the Computer

Chapter 2. Instructions: Language of the Computer Chapter 2 Instructions: Language of the Computer Instruction Set The repertoire of instructions of a computer Different computers have different instruction sets But with many aspects in common Early computers

More information

Calling Conventions. Hakim Weatherspoon CS 3410, Spring 2012 Computer Science Cornell University. See P&H 2.8 and 2.12

Calling Conventions. Hakim Weatherspoon CS 3410, Spring 2012 Computer Science Cornell University. See P&H 2.8 and 2.12 Calling Conventions Hakim Weatherspoon CS 3410, Spring 2012 Computer Science Cornell University See P&H 2.8 and 2.12 Goals for Today Calling Convention for Procedure Calls Enable code to be reused by allowing

More information

Procedure Calls Main Procedure. MIPS Calling Convention. MIPS-specific info. Procedure Calls. MIPS-specific info who cares? Chapter 2.7 Appendix A.

Procedure Calls Main Procedure. MIPS Calling Convention. MIPS-specific info. Procedure Calls. MIPS-specific info who cares? Chapter 2.7 Appendix A. MIPS Calling Convention Chapter 2.7 Appendix A.6 Procedure Calls Main Procedure Call Procedure Call Procedure Procedure Calls Procedure must from any call Procedure uses that main was using We need a convention

More information

EEC 581 Computer Architecture Lecture 1 Review MIPS

EEC 581 Computer Architecture Lecture 1 Review MIPS EEC 581 Computer Architecture Lecture 1 Review MIPS 1 Supercomputing: Suddenly Fancy 2 1 Instructions: Language of the Machine More primitive than higher level languages e.g., no sophisticated control

More information

Lectures 3-4: MIPS instructions

Lectures 3-4: MIPS instructions Lectures 3-4: MIPS instructions Motivation Learn how a processor s native language looks like Discover the most important software-hardware interface MIPS Microprocessor without Interlocked Pipeline Stages

More information

Instruction Set Architecture

Instruction Set Architecture Computer Architecture Instruction Set Architecture Lynn Choi Korea University Machine Language Programming language High-level programming languages Procedural languages: C, PASCAL, FORTRAN Object-oriented

More information

ECE260: Fundamentals of Computer Engineering. Supporting Procedures in Computer Hardware

ECE260: Fundamentals of Computer Engineering. Supporting Procedures in Computer Hardware Supporting Procedures in Computer Hardware James Moscola Dept. of Engineering & Computer Science York College of Pennsylvania Based on Computer Organization and Design, 5th Edition by Patterson & Hennessy

More information

Computer Architecture Instruction Set Architecture part 2. Mehran Rezaei

Computer Architecture Instruction Set Architecture part 2. Mehran Rezaei Computer Architecture Instruction Set Architecture part 2 Mehran Rezaei Review Execution Cycle Levels of Computer Languages Stored Program Computer/Instruction Execution Cycle SPIM, a MIPS Interpreter

More information

CS222: MIPS Instruction Set

CS222: MIPS Instruction Set CS222: MIPS Instruction Set Dr. A. Sahu Dept of Comp. Sc. & Engg. Indian Institute of Technology Guwahati 1 Outline Previous Introduction to MIPS Instruction Set MIPS Arithmetic's Register Vs Memory, Registers

More information

Procedure Calling. Procedure Calling. Register Usage. 25 September CSE2021 Computer Organization

Procedure Calling. Procedure Calling. Register Usage. 25 September CSE2021 Computer Organization CSE2021 Computer Organization Chapter 2: Part 2 Procedure Calling Procedure (function) performs a specific task and return results to caller. Supporting Procedures Procedure Calling Calling program place

More information

Chapter 2. Instructions: Language of the Computer

Chapter 2. Instructions: Language of the Computer Chapter 2 Instructions: Language of the Computer Instruction Set The range of instructions of a computer Different computers have different instruction sets But with many aspects in common Early computers

More information

Instruction Set Architecture part 1 (Introduction) Mehran Rezaei

Instruction Set Architecture part 1 (Introduction) Mehran Rezaei Instruction Set Architecture part 1 (Introduction) Mehran Rezaei Overview Last Lecture s Review Execution Cycle Levels of Computer Languages Stored Program Computer/Instruction Execution Cycle SPIM, a

More information

EN164: Design of Computing Systems Topic 03: Instruction Set Architecture Design

EN164: Design of Computing Systems Topic 03: Instruction Set Architecture Design EN164: Design of Computing Systems Topic 03: Instruction Set Architecture Design Professor Sherief Reda http://scale.engin.brown.edu Electrical Sciences and Computer Engineering School of Engineering Brown

More information

CS61C : Machine Structures

CS61C : Machine Structures inst.eecs.berkeley.edu/~cs61c CS61C : Machine Structures Lecture 11 Introduction to MIPS Procedures I Lecturer PSOE Dan Garcia www.cs.berkeley.edu/~ddgarcia CS61C L11 Introduction to MIPS: Procedures I

More information

Instructor: Randy H. Katz hap://inst.eecs.berkeley.edu/~cs61c/fa13. Fall Lecture #7. Warehouse Scale Computer

Instructor: Randy H. Katz hap://inst.eecs.berkeley.edu/~cs61c/fa13. Fall Lecture #7. Warehouse Scale Computer CS 61C: Great Ideas in Computer Architecture Everything is a Number Instructor: Randy H. Katz hap://inst.eecs.berkeley.edu/~cs61c/fa13 9/19/13 Fall 2013 - - Lecture #7 1 New- School Machine Structures

More information

Chapter 2. Instructions: Language of the Computer. Baback Izadi ECE Department

Chapter 2. Instructions: Language of the Computer. Baback Izadi ECE Department Chapter 2 Instructions: Language of the Computer Baback Izadi ECE Department bai@engr.newpaltz.edu Instruction Set Language of the Machine The repertoire of instructions of a computer Different computers

More information

Procedure Call and Return Procedure call

Procedure Call and Return Procedure call Procedures int len(char *s) { for (int l=0; *s!= \0 ; s++) l++; main return l; } void reverse(char *s, char *r) { char *p, *t; int l = len(s); reverse(s,r) N/A *(r+l) = \0 ; reverse l--; for (p=s+l t=r;

More information

CENG3420 L03: Instruction Set Architecture

CENG3420 L03: Instruction Set Architecture CENG3420 L03: Instruction Set Architecture Bei Yu byu@cse.cuhk.edu.hk (Latest update: January 31, 2018) Spring 2018 1 / 49 Overview Introduction Arithmetic & Logical Instructions Data Transfer Instructions

More information

MIPS%Assembly% E155%

MIPS%Assembly% E155% MIPS%Assembly% E155% Outline MIPS Architecture ISA Instruction types Machine codes Procedure call Stack 2 The MIPS Register Set Name Register Number Usage $0 0 the constant value 0 $at 1 assembler temporary

More information

CS61C : Machine Structures

CS61C : Machine Structures inst.eecs.berkeley.edu/~cs61c/su06 CS61C : Machine Structures Lecture #9: MIPS Procedures 2006-07-11 CS 61C L09 MIPS Procedures (1) Andy Carle C functions main() { int i,j,k,m;... i = mult(j,k);... m =

More information

CS 61c: Great Ideas in Computer Architecture

CS 61c: Great Ideas in Computer Architecture MIPS Functions July 1, 2014 Review I RISC Design Principles Smaller is faster: 32 registers, fewer instructions Keep it simple: rigid syntax, fixed instruction length MIPS Registers: $s0-$s7,$t0-$t9, $0

More information

Chapter 2. Instructions: Language of the Computer

Chapter 2. Instructions: Language of the Computer Chapter 2 Instructions: Language of the Computer Instruction Set The repertoire of instructions of a computer Different computers have different instruction sets But with many aspects in common Early computers

More information

COMPUTER ORGANIZATION AND DESIGN. 5 th Edition. The Hardware/Software Interface. Chapter 2. Instructions: Language of the Computer

COMPUTER ORGANIZATION AND DESIGN. 5 th Edition. The Hardware/Software Interface. Chapter 2. Instructions: Language of the Computer COMPUTER ORGANIZATION AND DESIGN The Hardware/Software Interface 5 th Edition Chapter 2 Instructions: Language of the Computer Instruction Set The repertoire of instructions of a computer Different computers

More information

MIPS Assembly Language Programming

MIPS Assembly Language Programming MIPS Assembly Language Programming COE 308 Computer Architecture Prof. Muhamed Mudawar College of Computer Sciences and Engineering King Fahd University of Petroleum and Minerals Presentation Outline Assembly

More information

Machine Instructions - II. Hwansoo Han

Machine Instructions - II. Hwansoo Han Machine Instructions - II Hwansoo Han Conditional Operations Instructions for making decisions Alter the control flow - change the next instruction to be executed Branch to a labeled instruction if a condition

More information

CS 61C: Great Ideas in Computer Architecture (Machine Structures) More MIPS Machine Language

CS 61C: Great Ideas in Computer Architecture (Machine Structures) More MIPS Machine Language CS 61C: Great Ideas in Computer Architecture (Machine Structures) More MIPS Machine Language Instructors: Randy H. Katz David A. PaGerson hgp://inst.eecs.berkeley.edu/~cs61c/sp11 1 2 Machine Interpreta4on

More information

COMPUTER ORGANIZATION AND DESIGN. 5 th Edition. The Hardware/Software Interface. Chapter 2. Instructions: Language of the Computer

COMPUTER ORGANIZATION AND DESIGN. 5 th Edition. The Hardware/Software Interface. Chapter 2. Instructions: Language of the Computer COMPUTER ORGANIZATION AND DESIGN The Hardware/Software Interface 5 th Edition Chapter 2 Instructions: Language of the Computer Instruction Set The repertoire of instructions of a computer Different computers

More information

CS 61C: Great Ideas in Computer Architecture. More MIPS, MIPS Functions

CS 61C: Great Ideas in Computer Architecture. More MIPS, MIPS Functions CS 61C: Great Ideas in Computer Architecture More MIPS, MIPS Functions Instructor: Justin Hsia 7/02/2013 Summer 2013 Lecture #6 1 Review of Last Lecture (1/2) RISC Design Principles Smaller is faster:

More information

Lecture 7: Procedures and Program Execution Preview

Lecture 7: Procedures and Program Execution Preview Lecture 7: Procedures and Program Execution Preview CSE 30: Computer Organization and Systems Programming Winter 2010 Rajesh Gupta / Ryan Kastner Dept. of Computer Science and Engineering University of

More information

Chapter 2. Instructions: Language of the Computer

Chapter 2. Instructions: Language of the Computer Chapter 2 Instructions: Language of the Computer Instruction Set The repertoire of instructions of a computer Different computers have different instruction sets But with many aspects in common Early computers

More information

MIPS Assembly Language Programming

MIPS Assembly Language Programming MIPS Assembly Language Programming ICS 233 Computer Architecture and Assembly Language Dr. Aiman El-Maleh College of Computer Sciences and Engineering King Fahd University of Petroleum and Minerals [Adapted

More information

Instructions: Assembly Language

Instructions: Assembly Language Chapter 2 Instructions: Assembly Language Reading: The corresponding chapter in the 2nd edition is Chapter 3, in the 3rd edition it is Chapter 2 and Appendix A and in the 4th edition it is Chapter 2 and

More information

ECE232: Hardware Organization and Design

ECE232: Hardware Organization and Design ECE232: Hardware Organization and Design Lecture 6: Procedures Adapted from Computer Organization and Design, Patterson & Hennessy, UCB Overview Procedures have different names in different languages Java:

More information

Patterson PII. Solutions

Patterson PII. Solutions Patterson-1610874 978-0-12-407726-3 PII 2 Solutions Chapter 2 Solutions S-3 2.1 addi f, h, -5 (note, no subi) add f, f, g 2.2 f = g + h + i 2.3 sub $t0, $s3, $s4 add $t0, $s6, $t0 lw $t1, 16($t0) sw $t1,

More information

Implementing Procedure Calls

Implementing Procedure Calls 1 / 39 Implementing Procedure Calls February 18 22, 2013 2 / 39 Outline Intro to procedure calls Caller vs. callee Procedure call basics Calling conventions The stack Interacting with the stack Structure

More information

Lecture 6: Assembly Programs

Lecture 6: Assembly Programs Lecture 6: Assembly Programs Today s topics: Procedures Examples Large constants The compilation process A full example 1 Procedures Local variables, AR, $fp, $sp Scratchpad and saves/restores, $fp Arguments

More information

Announcements. EE108B Lecture MIPS Assembly Language III. MIPS Machine Instruction Review: Instruction Format Summary

Announcements. EE108B Lecture MIPS Assembly Language III. MIPS Machine Instruction Review: Instruction Format Summary Announcements EE108B Lecture MIPS Assembly Language III Christos Kozyrakis Stanford University http://eeclass.stanford.edu/ee108b PA1 available, due on Thursday 2/8 Work on you own (no groups) Homework

More information