Speed and Size-Optimized Implementations of the PRESENT Cipher for Tiny AVR Devices
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1 Speed and Size-Optimized Implementations of the PRESENT Cipher for Tiny AVR Devices Kostas Papagiannopoulos Aram Verstegen July 11, 2013 Papagiannopoulos and Verstegen July 11, 2013 Speed and Size-Optimized PRESENT for AVR 1 / 28
2 Who We Are 2-year Master s programme in computer security Collaboration of 3 universities Software, Hardware, Networks, Formal methods, Cryptography, Privacy, Law, Ethics, Auditing, Physics Papagiannopoulos and Verstegen July 11, 2013 Speed and Size-Optimized PRESENT for AVR 2 / 28
3 Cryptography Engineering, Assignment 1 Choose and implement a block cipher on the ATtiny45 in two versions, optimized for size and speed PRESENT KATAN-64 Klein LED PRINCE mcrypton Piccolo XTEA HIGHT Papagiannopoulos and Verstegen July 11, 2013 Speed and Size-Optimized PRESENT for AVR 3 / 28
4 PRESENT Cipher Papagiannopoulos and Verstegen July 11, 2013 Speed and Size-Optimized PRESENT for AVR 4 / 28
5 ATtiny Family Model Flash (Bytes) SRAM (Bytes) Clock speed (MHz) ATtiny ATtiny ATtiny ATtiny ATtiny Basic 90 (single word) AVR instructions 32 8-bit general purpose registers 16-bit address space 16-bit words Harvard architecture Papagiannopoulos and Verstegen July 11, 2013 Speed and Size-Optimized PRESENT for AVR 5 / 28
6 ATtiny45 Address Space 7 0 Addr. 16-bit Use R0 0x00 R1 0x01 R2 0x02.. R13 0x0D R14 0x0E R15 0x0F R16 0x10 R17 0x11.. R26 0x1A X low R27 0x1B X high SRAM R28 0x1C Y low R29 0x1D Y high SRAM + CPU registers R30 0x1E Z low R31 0x1F Z high SRAM + Flash 64 I/O registers 0x0020-0x005F Internal SRAM 0x0060-0x00DF Papagiannopoulos and Verstegen July 11, 2013 Speed and Size-Optimized PRESENT for AVR 6 / 28
7 Quick AVR Recap Load register from immediate ldi Rd, 42 Load register from SRAM pointer (X) ld Rd, X Load register from Flash pointer (Z) lpm Rd, Z XOR output with input eor Ro, Ri Swap nibbles in byte swap Rd Rotate left with carry rol Rd Rotate left without carry lsl Rd Store to SRAM from register (and increment) st X+, Rd Procedure calls rcall, ret, rjmp Stack access push, pop Counting inc, dec Adding add, sub Binary logic and, or, eor Papagiannopoulos and Verstegen July 11, 2013 Speed and Size-Optimized PRESENT for AVR 7 / 28
8 State of the Art Speed vs Size AVR Crypto-lib 1200 Size Eisenbarth Cycles/byte Papagiannopoulos and Verstegen July 11, 2013 Speed and Size-Optimized PRESENT for AVR 8 / 28
9 Strategy Speed-optimized Size-optimized Substitution/permutation Table lookups On-the-fly computation Code flow Inlined / unrolled Re-used / looped Locality All in registers Use more SRAM Papagiannopoulos and Verstegen July 11, 2013 Speed and Size-Optimized PRESENT for AVR 9 / 28
10 addroundkey ; state ˆ= roundkey (first 8 bytes of key register) addroundkey: eor STATE0, KEY0 eor STATE1, KEY1 eor STATE2, KEY2 eor STATE3, KEY3 eor STATE4, KEY4 eor STATE5, KEY5 eor STATE6, KEY6 eor STATE7, KEY7 ret Papagiannopoulos and Verstegen July 11, 2013 Speed and Size-Optimized PRESENT for AVR 10 / 28
11 4-bit S-Box x A B C D E F S[x] C 5 6 B 9 0 A D 3 E F Papagiannopoulos and Verstegen July 11, 2013 Speed and Size-Optimized PRESENT for AVR 11 / 28
12 4-bit S-Box x A B C D E F S[x] C 5 6 B 9 0 A D 3 E F Accessing the table 4 bits at a time incurs a penalty low_nibble: mov ZL, INPUT ; load input andi ZL, 0xF ; take low nibble as table index lpm OUTPUT, Z ; load table output cbr INPUT, 0xF ; clear low nibble and INPUT, OUTPUT ; save low nibble to input ret byte: rcall low_nibble ; substitute low nibble high_nibble: swap INPUT ; swap nibbles rcall low_nibble ; substitute low nibble swap INPUT ; swap nibbles back ret Papagiannopoulos and Verstegen July 11, 2013 Speed and Size-Optimized PRESENT for AVR 11 / 28
13 4-bit S-Box x A B C D E F S[x] C 5 6 B 9 0 A D 3 E F Accessing the table 4 bits at a time incurs a penalty low_nibble: mov ZL, INPUT ; load input andi ZL, 0xF ; take low nibble as table index lpm OUTPUT, Z ; load table output cbr INPUT, 0xF ; clear low nibble and INPUT, OUTPUT ; save low nibble to input ret byte: rcall low_nibble ; substitute low nibble high_nibble: swap INPUT ; swap nibbles rcall low_nibble ; substitute low nibble swap INPUT ; swap nibbles back ret We have an 8-bit architecture, so we want to access bytes! Papagiannopoulos and Verstegen July 11, 2013 Speed and Size-Optimized PRESENT for AVR 11 / 28
14 Squared S-Box x C 0D 0E 0F S[x] CC C5 C6 CB... C4 C7 C1 C2 x C 1D 1E 1F S[x] 5C B x F0 F1 F2 F3... FC FD FE FF S[x] 2C B Papagiannopoulos and Verstegen July 11, 2013 Speed and Size-Optimized PRESENT for AVR 12 / 28
15 Squared S-Box x C 0D 0E 0F S[x] CC C5 C6 CB... C4 C7 C1 C2 x C 1D 1E 1F S[x] 5C B x F0 F1 F2 F3... FC FD FE FF S[x] 2C B New S-Box is 256 bytes, combinations of two nibbles Papagiannopoulos and Verstegen July 11, 2013 Speed and Size-Optimized PRESENT for AVR 12 / 28
16 Squared S-Box x C 0D 0E 0F S[x] CC C5 C6 CB... C4 C7 C1 C2 x C 1D 1E 1F S[x] 5C B x F0 F1 F2 F3... FC FD FE FF S[x] 2C B New S-Box is 256 bytes, combinations of two nibbles It substitutes 1 byte at a time Papagiannopoulos and Verstegen July 11, 2013 Speed and Size-Optimized PRESENT for AVR 12 / 28
17 Squared S-Box x C 0D 0E 0F S[x] CC C5 C6 CB... C4 C7 C1 C2 x C 1D 1E 1F S[x] 5C B x F0 F1 F2 F3... FC FD FE FF S[x] 2C B New S-Box is 256 bytes, combinations of two nibbles It substitutes 1 byte at a time No need to swap or discern high/low nibble mov ZL, INPUT ; load table input lpm OUTPUT, Z ; save table output ret Papagiannopoulos and Verstegen July 11, 2013 Speed and Size-Optimized PRESENT for AVR 12 / 28
18 S-Box and P-Layer Idea: Combine the SBox and PLayer in lookup tables [Bo Zhu & Zheng Gong] Papagiannopoulos and Verstegen July 11, 2013 Speed and Size-Optimized PRESENT for AVR 13 / 28
19 S-Box and P-Layer Idea: Combine the SBox and PLayer in lookup tables [Bo Zhu & Zheng Gong] 1024 bytes of lookup tables, 32 lookups per round Papagiannopoulos and Verstegen July 11, 2013 Speed and Size-Optimized PRESENT for AVR 13 / 28
20 S-Box and P-Layer Idea: Combine the SBox and PLayer in lookup tables [Bo Zhu & Zheng Gong] 1024 bytes of lookup tables, 32 lookups per round Works well on AVR compared to on-the-fly computation Papagiannopoulos and Verstegen July 11, 2013 Speed and Size-Optimized PRESENT for AVR 13 / 28
21 S-Box and P-Layer Idea: Combine the SBox and PLayer in lookup tables [Bo Zhu & Zheng Gong] 1024 bytes of lookup tables, 32 lookups per round Works well on AVR compared to on-the-fly computation Reached 1091 cycles/byte for encryption ( 18% faster compared to 1341 cycles/byte) Papagiannopoulos and Verstegen July 11, 2013 Speed and Size-Optimized PRESENT for AVR 13 / 28
22 S-Box and P-Layer Idea: Combine the SBox and PLayer in lookup tables [Bo Zhu & Zheng Gong] 1024 bytes of lookup tables, 32 lookups per round Works well on AVR compared to on-the-fly computation Reached 1091 cycles/byte for encryption ( 18% faster compared to 1341 cycles/byte) Because of many lookups, consider larger SRAM (ATmega) Papagiannopoulos and Verstegen July 11, 2013 Speed and Size-Optimized PRESENT for AVR 13 / 28
23 S-Box and P-Layer Idea: Combine the SBox and PLayer in lookup tables [Bo Zhu & Zheng Gong] 1024 bytes of lookup tables, 32 lookups per round Works well on AVR compared to on-the-fly computation Reached 1091 cycles/byte for encryption ( 18% faster compared to 1341 cycles/byte) Because of many lookups, consider larger SRAM (ATmega) lpm instruction: 3 cycles Papagiannopoulos and Verstegen July 11, 2013 Speed and Size-Optimized PRESENT for AVR 13 / 28
24 S-Box and P-Layer Idea: Combine the SBox and PLayer in lookup tables [Bo Zhu & Zheng Gong] 1024 bytes of lookup tables, 32 lookups per round Works well on AVR compared to on-the-fly computation Reached 1091 cycles/byte for encryption ( 18% faster compared to 1341 cycles/byte) Because of many lookups, consider larger SRAM (ATmega) lpm instruction: 3 cycles ld instruction: 2 cycles, could reduce 125 cycles/byte more Papagiannopoulos and Verstegen July 11, 2013 Speed and Size-Optimized PRESENT for AVR 13 / 28
25 Lookup tables Table 1 at 0x600, Table 2 at 0x800 Papagiannopoulos and Verstegen July 11, 2013 Speed and Size-Optimized PRESENT for AVR 14 / 28
26 Lookup tables Table 1 at 0x600, Table 2 at 0x800 Lookup table 1 ldi ZH, 0x06 mov ZL, STATE0 lpm OUTPUT0, Z andi OUTPUT0, 0xC0 Papagiannopoulos and Verstegen July 11, 2013 Speed and Size-Optimized PRESENT for AVR 14 / 28
27 Lookup tables Table 1 at 0x600, Table 2 at 0x800 Lookup table 1 ldi ZH, 0x06 mov ZL, STATE0 lpm OUTPUT0, Z andi OUTPUT0, 0xC0 Lookup table 2 ldi ZH, 0x08 mov ZL, STATE0 lpm OUTPUT1, Z andi OUTPUT1, 0x30 Papagiannopoulos and Verstegen July 11, 2013 Speed and Size-Optimized PRESENT for AVR 14 / 28
28 Lookup tables Table 1 at 0x600, Table 2 at 0x800 Lookup table 1 ldi ZH, 0x06 mov ZL, STATE0 lpm OUTPUT0, Z andi OUTPUT0, 0xC0 Lookup table 2 ldi ZH, 0x08 mov ZL, STATE0 lpm OUTPUT1, Z andi OUTPUT1, 0x30 Combine bits or OUTPUT0, OUTPUT1 Papagiannopoulos and Verstegen July 11, 2013 Speed and Size-Optimized PRESENT for AVR 14 / 28
29 Lookup tables Table 1 at 0x600, Table 2 at 0x800 Lookup table 1 ldi ZH, 0x06 mov ZL, STATE0 lpm OUTPUT0, Z andi OUTPUT0, 0xC0 Lookup table 1, table 2, table 1, table 2 Lookup table 2 ldi ZH, 0x08 mov ZL, STATE0 lpm OUTPUT1, Z andi OUTPUT1, 0x30 Combine bits or OUTPUT0, OUTPUT1 Papagiannopoulos and Verstegen July 11, 2013 Speed and Size-Optimized PRESENT for AVR 14 / 28
30 Lookup tables Table 1 at 0x600, Table 2 at 0x800 Lookup table 1 ldi ZH, 0x06 mov ZL, STATE0 lpm OUTPUT0, Z andi OUTPUT0, 0xC0 Lookup table 2 ldi ZH, 0x08 mov ZL, STATE0 lpm OUTPUT1, Z andi OUTPUT1, 0x30 Lookup table 1, table 2, table 1, table 2 Lookup table 1, table 1, table 2, table 2 ldi ZH, 0x06 mov ZL, STATE0 lpm OUTPUT0, Z andi OUTPUT0, 0xC0 mov ZL, STATE4 lpm OUTPUT1, Z andi OUTPUT1, 0xC0 Combine bits or OUTPUT0, OUTPUT1 Papagiannopoulos and Verstegen July 11, 2013 Speed and Size-Optimized PRESENT for AVR 14 / 28
31 Lookup tables Table 1 at 0x600, Table 2 at 0x800 Lookup table 1 ldi ZH, 0x06 mov ZL, STATE0 lpm OUTPUT0, Z andi OUTPUT0, 0xC0 Lookup table 2 ldi ZH, 0x08 mov ZL, STATE0 lpm OUTPUT1, Z andi OUTPUT1, 0x30 Combine bits or OUTPUT0, OUTPUT1 Lookup table 1, table 2, table 1, table 2 Lookup table 1, table 1, table 2, table 2 ldi ZH, 0x06 mov ZL, STATE0 lpm OUTPUT0, Z andi OUTPUT0, 0xC0 mov ZL, STATE4 lpm OUTPUT1, Z andi OUTPUT1, 0xC0 Fewer changes in ZH Papagiannopoulos and Verstegen July 11, 2013 Speed and Size-Optimized PRESENT for AVR 14 / 28
32 Key Update 1 Rotate 80-bit key register 61 bits to the left Papagiannopoulos and Verstegen July 11, 2013 Speed and Size-Optimized PRESENT for AVR 15 / 28
33 Key Update 1 Rotate 80-bit key register 61 bits to the left Rotate 19 bits to the right instead Papagiannopoulos and Verstegen July 11, 2013 Speed and Size-Optimized PRESENT for AVR 15 / 28
34 Key Update 1 Rotate 80-bit key register 61 bits to the left Rotate 19 bits to the right instead Use 2 mov instructions to rotate 2 8 = 16 bits Papagiannopoulos and Verstegen July 11, 2013 Speed and Size-Optimized PRESENT for AVR 15 / 28
35 Key Update 1 Rotate 80-bit key register 61 bits to the left Rotate 19 bits to the right instead Use 2 mov instructions to rotate 2 8 = 16 bits Use ror only for the last 3 bits Papagiannopoulos and Verstegen July 11, 2013 Speed and Size-Optimized PRESENT for AVR 15 / 28
36 Key Update 1 Rotate 80-bit key register 61 bits to the left Rotate 19 bits to the right instead Use 2 mov instructions to rotate 2 8 = 16 bits Use ror only for the last 3 bits 2 S-Box the top 4 bits of 80-bit key register Papagiannopoulos and Verstegen July 11, 2013 Speed and Size-Optimized PRESENT for AVR 15 / 28
37 Key Update 1 Rotate 80-bit key register 61 bits to the left Rotate 19 bits to the right instead Use 2 mov instructions to rotate 2 8 = 16 bits Use ror only for the last 3 bits 2 S-Box the top 4 bits of 80-bit key register use a byte lookup table 8 bits substituted unchanged Papagiannopoulos and Verstegen July 11, 2013 Speed and Size-Optimized PRESENT for AVR 15 / 28
38 Key Update 1 Rotate 80-bit key register 61 bits to the left Rotate 19 bits to the right instead Use 2 mov instructions to rotate 2 8 = 16 bits Use ror only for the last 3 bits 2 S-Box the top 4 bits of 80-bit key register use a byte lookup table 8 bits substituted unchanged 3 XOR key bits with round counter Papagiannopoulos and Verstegen July 11, 2013 Speed and Size-Optimized PRESENT for AVR 15 / 28
39 Key Update 1 Rotate 80-bit key register 61 bits to the left Rotate 19 bits to the right instead Use 2 mov instructions to rotate 2 8 = 16 bits Use ror only for the last 3 bits 2 S-Box the top 4 bits of 80-bit key register use a byte lookup table 8 bits substituted unchanged 3 XOR key bits with round counter XOR needs to span 2 registers KEY4 XOR Round KEY5 Papagiannopoulos and Verstegen July 11, 2013 Speed and Size-Optimized PRESENT for AVR 15 / 28
40 Key Update 1 Rotate 80-bit key register 61 bits to the left Rotate 19 bits to the right instead Use 2 mov instructions to rotate 2 8 = 16 bits Use ror only for the last 3 bits 2 S-Box the top 4 bits of 80-bit key register use a byte lookup table 8 bits substituted unchanged 3 XOR key bits with round counter XOR needs to span 2 registers KEY4 KEY5 XOR Round Do step 3 before step 1 then XOR spans only 1 register Papagiannopoulos and Verstegen July 11, 2013 Speed and Size-Optimized PRESENT for AVR 15 / 28
41 Serialization of the Algorithm ; state ˆ= roundkey addroundkey: eor STATE0, KEY0 eor STATE1, KEY1 eor STATE2, KEY2 eor STATE3, KEY3 eor STATE4, KEY4 eor STATE5, KEY5 eor STATE6, KEY6 eor STATE7, KEY7 ret Papagiannopoulos and Verstegen July 11, 2013 Speed and Size-Optimized PRESENT for AVR 16 / 28
42 Serialization of the Algorithm ; half state ˆ= roundkey addroundkey: eor STATE0, KEY0 eor STATE1, KEY1 eor STATE2, KEY2 eor STATE3, KEY3 ret This helps with: doing I/O applying round keys applying S-Boxes applying P-Layer Papagiannopoulos and Verstegen July 11, 2013 Speed and Size-Optimized PRESENT for AVR 17 / 28
43 Serialization of the Algorithm But we need I/O: ; half state ˆ= roundkey addroundkey: eor STATE0, KEY0 eor STATE1, KEY1 eor STATE2, KEY2 eor STATE3, KEY3 ret This helps with: doing I/O applying round keys applying S-Boxes applying P-Layer consecutive_input: ld STATE0, X+ ld STATE1, X+ ld STATE2, X+ ld STATE3, X+ ret interleaved_output: st STATE3, X- dec X st STATE2, X- dec X st STATE1, X- dec X st STATE0, X- dec X ret Papagiannopoulos and Verstegen July 11, 2013 Speed and Size-Optimized PRESENT for AVR 17 / 28
44 Indirect Register Addressing ; state ˆ= roundkey (full state in SRAM) addroundkey: clr YL ; point Y at first key register addroundkey_byte: ld INPUT, X ; load input ld KEY_BYTE, Y+ ; load key, advance pointer eor INPUT, KEY_BYTE ; XOR st X+, INPUT ; store output, advance pointer cpi YL, 8 ; loop over 8 bytes brne addroundkey_byte subi XL, 8 ret ; point at the start of the block Papagiannopoulos and Verstegen July 11, 2013 Speed and Size-Optimized PRESENT for AVR 18 / 28
45 Packed S-Boxes Before: C 5 6 B 9 0 A D 3 E F Papagiannopoulos and Verstegen July 11, 2013 Speed and Size-Optimized PRESENT for AVR 19 / 28
46 Packed S-Boxes Before: C 5 6 B 9 0 A D 3 E F After: C5 6B 90 AD 3E F Papagiannopoulos and Verstegen July 11, 2013 Speed and Size-Optimized PRESENT for AVR 19 / 28
47 Packed S-Boxes Before: C 5 6 B 9 0 A D 3 E F After: C5 6B 90 AD 3E F unpack_sbox: asr ZL ; halve input, take carry lpm SBOX_OUTPUT, Z ; get s-box output brcs odd_unpack ; branch depending on carry even_unpack: swap SBOX_OUTPUT ; swap nibbles in s-box output odd_unpack: cbr SBOX_OUTPUT, 0xF0 ; clear high nibble in s-box output ret Papagiannopoulos and Verstegen July 11, 2013 Speed and Size-Optimized PRESENT for AVR 19 / 28
48 Packed S-Boxes Before: C 5 6 B 9 0 A D 3 E F After: C5 6B 90 AD 3E F unpack_sbox: asr ZL lpm SBOX_OUTPUT, Z brcs odd_unpack even_unpack: swap SBOX_OUTPUT rjmp unpack odd_unpack: nop nop ; 4 cycles total unpack: cbr SBOX_OUTPUT, 0xF0 ret ; 2 cycles if true ; 1 cycle ; 2 cycles ; 1 cycle Papagiannopoulos and Verstegen July 11, 2013 Speed and Size-Optimized PRESENT for AVR 19 / 28
49 S-Box Optimization sboxbyte: ; input (low nibble) mov ZL, INPUT ; load s-box input cbr ZL, 0xF0 ; clear high nibble in input rcall unpack_sbox ; get output in SBOX_OUTPUT cbr INPUT, 0xF ; clear low nibble in output or INPUT, SBOX_OUTPUT ; save low nibble to output ; fall through sboxhighnibble: mov ZL, INPUT ; load s-box input cbr ZL, 0xF ; clear low nibble in input swap ZL ; move high nibble to low nibble rcall unpack_sbox ; get output in SBOX_OUTPUT swap SBOX_OUTPUT ; move low nibble to high nibble cbr INPUT, 0xF0 ; clear high nibble in output or INPUT, SBOX_OUTPUT ; save high nibble to output ret Papagiannopoulos and Verstegen July 11, 2013 Speed and Size-Optimized PRESENT for AVR 20 / 28
50 S-Box Optimization sboxbyte: rcall sboxlownibbleandswap ; apply s-box to low nibble ; and swap nibbles rjmp sboxlownibbleandswap ; do it again and return sboxhighnibble: swap INPUT ; swap nibbles in IO register sboxlownibbleandswap: mov ZL, INPUT ; load s-box input cbr ZL, 0xF0 ; clear high nibble in s-box input rcall unpack_sbox cbr INPUT, 0xF ; clear low nibble in IO register or INPUT, SBOX_OUTPUT ; save low nibble to IO register swap INPUT ; swap nibbles ret Papagiannopoulos and Verstegen July 11, 2013 Speed and Size-Optimized PRESENT for AVR 20 / 28
51 S-Box Optimization sboxbyte: rcall sboxlownibbleandswap ; apply s-box to low nibble ; and swap nibbles rjmp sboxlownibbleandswap ; do it again and return sboxhighnibble: swap INPUT ; swap nibbles in IO register sboxlownibbleandswap: mov ZL, INPUT ; load s-box input cbr ZL, 0xF0 ; clear high nibble in s-box input asr ZL ; halve input, take carry lpm SBOX_OUTPUT, Z ; get s-box output brcs odd_unpack ; branch depending on carry even_unpack: swap SBOX_OUTPUT ; swap nibbles in s-box output odd_unpack: cbr SBOX_OUTPUT, 0xF0 ; clear high nibble in s-box output cbr INPUT, 0xF ; clear low nibble in IO register or INPUT, SBOX_OUTPUT ; save low nibble to IO register swap INPUT ; swap nibbles ret Papagiannopoulos and Verstegen July 11, 2013 Speed and Size-Optimized PRESENT for AVR 20 / 28
52 P-Layer Nibble playernibble: ror INPUT ; move bit into carry ror OUTPUT0 ; move bit into output register ror INPUT ; etc ror OUTPUT1 ror INPUT ror OUTPUT2 ror INPUT ror OUTPUT3 ret Apply twice to consume an input byte After 4 input bytes, 4 output bytes (half block) are filled Interleave 2 half blocks Papagiannopoulos and Verstegen July 11, 2013 Speed and Size-Optimized PRESENT for AVR 21 / 28
53 2 Step P-Layer Half state input Half state output, interleaved Second half state input Second half state output, interleaved Papagiannopoulos and Verstegen July 11, 2013 Speed and Size-Optimized PRESENT for AVR 22 / 28
54 Using SREG Flags and Stack setup_redo_block: clt ; clear T flag rjmp redo_block ; do the second part block: set ; set T flag ; fall through redo_block: ; instructions here happen twice when called from block brts setup_redo_block ; redo this block? (if T flag set) ret 1 Input playernibble and push 4 output bytes to stack Do other half 2 Output Point at last odd state byte Pop from stack and save 4 output bytes Point at last even state byte and do other half Papagiannopoulos and Verstegen July 11, 2013 Speed and Size-Optimized PRESENT for AVR 23 / 28
55 Key Register Rotation rotate_left_i: lsl KEY9 rol KEY8 rol KEY7 rol KEY6 rol KEY5 rol KEY4 rol KEY3 rol KEY2 rol KEY1 rol KEY0 adc KEY9, ZERO dec ITEMP brne rotate_left_i ret ; take MSB as carry, clear LSB ; rotate MSB out, carry bit in ; etc ; add carry bit to last key byte ; decrement counter ; loop Papagiannopoulos and Verstegen July 11, 2013 Speed and Size-Optimized PRESENT for AVR 24 / 28
56 Key Register Rotation rotate_left_i: ldi YL, 10 ; point at last key byte clc ; clear carry bit rotate_left_i_bit: ld ROTATED_BITS, -Y ; load key byte rol ROTATED_BITS ; rotate bits st Y, ROTATED_BITS ; save key byte cpse YL, ZERO ; compare, skip if equal rjmp rotate_left_i_bit ; loop over all key bytes adc KEY9, ZERO ; add carry bit to last key byte dec ITEMP ; decrement counter brne rotate_left_i ; loop ret Papagiannopoulos and Verstegen July 11, 2013 Speed and Size-Optimized PRESENT for AVR 24 / 28
57 Numbers Encryption Decryption Size AVR Crypto-lib Eisenbarth Papagiannopoulos and Verstegen July 11, 2013 Speed and Size-Optimized PRESENT for AVR 25 / 28
58 Numbers Encryption Decryption Size AVR Crypto-lib Eisenbarth Speed-optimized Size-optimized Papagiannopoulos and Verstegen July 11, 2013 Speed and Size-Optimized PRESENT for AVR 25 / 28
59 Numbers Encryption Decryption Size AVR Crypto-lib Eisenbarth Speed-optimized Size-optimized Unpacked S-Boxes Inlined rotation Inlined rotation, unpacked S-Boxes Papagiannopoulos and Verstegen July 11, 2013 Speed and Size-Optimized PRESENT for AVR 25 / 28
60 Numbers Encryption Decryption Size AVR Crypto-lib Eisenbarth Speed-optimized Size-optimized Unpacked S-Boxes Inlined rotation Inlined rotation, unpacked S-Boxes bit Unpacked S-Boxes (128-bit) Inlined rotation (128-bit) Inlined rotation, unpacked S-Boxes (128-bit) Papagiannopoulos and Verstegen July 11, 2013 Speed and Size-Optimized PRESENT for AVR 25 / 28
61 Relative Performance/Size Efficiency vs Size Papagiannopoulos AVR Crypto-lib Size Eisenbarth Verstegen + Verstegen Cycles/byte Papagiannopoulos and Verstegen July 11, 2013 Speed and Size-Optimized PRESENT for AVR 26 / 28
62 ASCII Art C56B90AD 3EF EF8C12 DB A57D0 3AD0 F1F 7F0E070E1 41D05DD05 CD047D080 2D16D00 82E81E1 06D E0 03D 04A9591F7 33C0CAE08 894CA F9 883CD13 FACF9D1 E8A95 A9F D D E8 2FE F70E70 FE F C F7080 7F8 52B E0 D5D F442687E3 D2DF802DD DDF082E 4F CC278C D 93C830D1 F7A E08 C91CD DF8D936 A95 D9F7A F0E0 70E DD 27C C278D C A30 E1F7A E08 E91 CAD FC9 DF6A 95D9F73 F932F931 F930F93 16F 4E894 F3C F E08F91 8E93AA95 6A95D9F 71E F4E F 6CF 0895D7DFC5DF CDDFE0D FB7DFD9 F7C 0CF0 000 Papagiannopoulos and Verstegen July 11, 2013 Speed and Size-Optimized PRESENT for AVR 27 / 28
63 ASCII Art s-boxes decrypt (start+16) C56B90AD 3EF EF8C12 DB A57D0 3AD0 F1F 7F0E070E1 41D05DD05 CD047D080 2D16D00 82E81E1 06D E0 03D 04A9591F7 33C0CAE08 894CA F9 883CD13 FACF9D1 E8A95 A9F D D E8 2FE F70E70 FE F C F7080 7F8 52B E0 D5D F442687E3 D2DF802DD DDF082E 4F CC278C D 93C830D1 F7A E08 C91CD DF8D936 A95 D9F7A F0E0 70E DD 27C C278D C A30 E1F7A E08 E91 CAD FC9 DF6A 95D9F73 F932F931 F930F93 16F 4E894 F3C F E08F91 8E93AA95 6A95D9F 71E F4E F 6CF 0895D7DFC5DF CDDFE0D FB7DFD9 F7C 0CF0 000 encrypt (end-16) S-Boxes, decrypt, rotate_left_i, sboxbyte, sboxnibble, playernibble, schedule_key, addroundkey, sboxlayer, setup, player, encrypt. Papagiannopoulos and Verstegen July 11, 2013 Speed and Size-Optimized PRESENT for AVR 27 / 28
64 Questions? Papagiannopoulos and Verstegen July 11, 2013 Speed and Size-Optimized PRESENT for AVR 28 / 28
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