ELCT 501: Digital System Design

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1 ELCT 501: Digital System Lecture 1: Introduction Dr. Mohamed Abd El Ghany,

2 Administrative Rules Course components: Lecture: Thursday (fourth slot), 13:15-14:45 (H8) Office Hours: Thursday after lecture Teaching assistant: Eng. Salma Hesham Grading: Assignments: 10% (2 x 5%) Quizzes: 10% (2x 5%) Project : 10% Mid term exam: 30% Final exam: 40% 2

3 Administrative Rules Quizzes: Quiz 1: Thursday, 4/10/2012, 13:15 (H8) Quiz 2: Thursday, Quiz 3: Thursday, Project: Announcement : Thursday, Due date: 3

4 Course Policies Take notes during the lectures, Don t expect that everything said during the lecture will be documented in the slides I expect that anything said during a lecture or tutorials will be known by all students. So, if you don t attend, then please at least ask! It is your responsibility to check the course website regularly for any announcements or material 4

5 Course Objective Understanding the basic low-level background of digital circuits Recognizing the different types of memories and programmable logic devices Analysis and of Advanced Combinational and Sequential Circuits Applying a complete design flow targeting FPGA platforms Applying the concept of pipelining to boost the throughput of a digital system Analysis and of Efficient Arithmetic Circuits 5

6 Text and Reference Books John Wakerly, Digital, Prentice Hall, ISBN: Neil Storey, Electronics- A System Approach, Prentice Hall, ISBN Stephen Brown, and Zvonko Vranesic, Fundamentals of Digital Logic with VHDL, Mc Graw Hill, ISBN Ercegovac and Lang, Digital Arithmetic, 6

7 Prerequisites Digital Logic Electric Circuits I, II Introduction to Computer Programming 7

8 What is inside your electronic devices? The design process of a typical IC is presented by this course. 8

9 Integrated Circuits (ICs) Analog Digital Mixed Op-amps LNA Oscillator microprocessor DSPs ADC DAC 9

10 Digital Integrated Circuits (DICs) DICs technology Bipolar FET(MOS) TTL ECL BiCMOS CMOS 10

11 Digital Integrated Circuits (DICs) Digital Integrated Circuits SSI MSI LSI VLSI ULSI < 12 eq. gates eq. gates eq. gates 10,000-99,999 eq. gates > 100,000 eq. gates 11

12 Moore s Law So, we need the Computer-aided design (CAD) tools!!! 12

13 Computer-Aided (CAD) Tools FPGA Advantage tools Xilinx tools Altera tools (Quartus II) Synopsys tools 13

14 Process Required product Define specifications Initial design Simulation Redesign Yes correct? No Prototype Implementation Make corrections Yes Testing Meets specifications No Minor errors? Yes No Finished product 14

15 Hardware Implementation Programmable Logic Devices (PLDs) Custom-ed Chips - These chips have a very general structure and include a collection of programmable switches that allow the internal circuitry in the chip to be configured in many different ways. - The designer can implement whatever functions are needed for a particular application by choosing an appropriate configuration of the switches. - PLDs can be programmed multiple times - Reprogramming might be necessary, for instance, if a designed function is not quite as intended or if new functions are needed that were not contemplated in the original design. - One of the most sophisticated types of PLD is Field-Programmable Gate Array (FPGA) Chip -Such chips are intended for use in specific applications and are called Application- Specific Integrated Circuits (ASICs) Chips - The main advantage of a custom chip is that its design can be optimized for a specific task; hence it usually leads to better performance - It is possible to include a large amount of logic circuitry in a custom chip than would be possible in other types of chips. - A disadvantage of the custom-design approach is that manufacturing a custom chip often takes a considerable amount of time, on the order of months 15

16 Hardware Implementation A consortium of integrated circuit manufacturers called the Semiconductor Industry Association (SIA) produces an estimate of how the technology is expected to evolve. The SIA Roadmap* predicts the minimum size of a transistor that can be fabricated on an integrated circuit chip. the size of a transistor is measured by a parameter called its gate length will be discussed later Transistor gate length 0.14 µm 0.12 µm 90 nm 65 nm 50 nm 35 nm Transistors per cm 2 14 million 16 million 24 million 40 million 64 million 100 million Chip size mm 2 mm 2 mm 2 mm 2 mm 2 mm 2 16

17 The internal layout of Intel Core i7 17

18 Evaluation Major Parameters of Digital Evaluation Performance area Power consumption A good designer would utilize this trade-off according to the target applications The speed of gate directly affects the max. clock speed of the digital system Gate speed is tech-dependent. E.g. 45 nm CMOS process has faster gates than 0.18 µm. ASIC implementation is faster than FPGA implementation 18

19 Summary 19

20 Transistor Switches D D D D D D G G=0 G=1 G G=0 G=1 S S S S S S NMOS transistor PMOS transistor 20

21 CMOS logic Gates V DD V DD V DD NOT gate V x V f V f = 1 V f = 0 V x = 0 V x = 1 Truth Table x f

22 CMOS logic Gates (NOR Gate) NOR gate Truth Table A B F

23 CMOS logic Gates (NAND Gate) NAND gate Truth Table A B F

24 Complex Logic Functions V DD PMOS network F INs NMOS network Structure of a CMOS Circuit 24

DIGITAL DESIGN TECHNOLOGY & TECHNIQUES

DIGITAL DESIGN TECHNOLOGY & TECHNIQUES CAD for ASIC Design 1 INTEGRATED CIRCUITS (IC) An integrated circuit (IC) consists complex electronic circuitries and their interconnections. William Shockley et