ELCT 912: Advanced Embedded Systems

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1 ELCT 912: Advanced Embedded Systems Lecture 2-3: Embedded System Hardware Dr. Mohamed Abd El Ghany, Department of Electronics and Electrical Engineering

2 Embedded System Hardware Used for processing of input to produce output in task specific fashion Input interface Information Processing System Output interface 2

3 Processors Microprocessors and Microcontrollers. Key Requirements for Embedded Processors: Energy-Efficiency High Code Density 3

4 Microprocessors A microprocessor is a general-purpose digital computer central processing unit. It needs external memory and I/O devices. CPU for computers No RAM, ROM, I/O on CPU chip itself Examples: Intel s x86 and Motorola s 680x0 4

5 Microcontrollers A microcontroller incorporates in a single IC ROM, RAM, Parallel I/O, serial I/O, counters and a clock circuit, in addition to the components of a microprocessor. A microcontroller is a true computer on a chip. 5

6 Abstract block diagram of a microcontroller 6

7 Components of microcontroller A Timer module: allows the microcontroller to perform tasks for certain time periods A serial I/O port: to allow data to flow between the microcontroller and other devices such as a PC or another microcontroller An ADC: to allow the microcontroller to accept analog input data for processing A DAC: to allow the microcontroller to send analog output data to external devices 7

8 Detailed block diagram of a microcontroller 8

9 Why microcontrollers in Embedded Systems? Low cost, small packaging Low power consumption Programmable, reprogrammable I/O capabilities Easy integration with other circuits Single purpose Suitable for applications in which cost, power, and space are critical 9

10 Microprocessors vs. Microcontrollers Microprocessor CPU is stand-alone, RAM, ROM, I/O, timer are separate Designer can decide on the amount of ROM, RAM and I/O ports Expansive Versatile Mostly used in PCs General purpose Microcontroller CPU, RAM, ROM, I/O, timer etc. are all on a single chip Fix amount of on chip ROM, RAM, I/O ports For applications in which cost, power and space are critical Mostly used in embedded systems Single purpose 10

11 Microprocessors vs. Microcontrollers Program ROM Data Variable RAM Ctrl Memory Interface Unit Stack RAM Addr Interrupt Circuitry RAM Processor I/O Ports Timer ROM Processor & Built-in Registers I/O Pins Microprocessor based system Microcontroller Block Diagram 11

12 Basics of Computer Architecture There are two main architectures that are the origins of all the current processor cores: The von Neumann Architecture The Harvard Architecture 12

Von Neumann Architecture Only one bus between CPU and memory RAM and program memory share the same bus and the same memory, and hence, must have the same

13 Von Neumann Architecture Only one bus between CPU and memory RAM and program memory share the same bus and the same memory, and hence, must have the same bit width Bottleneck: Getting instructions interferes with reading/writing data Motorola HC11 Department of Electronics and Electrical Engineering ELCT 912: 13

14 Harvard Architecture Separate memory spaces for data and instruction Fetch instruction and data simultaneously Separate program bus and data bus Can be different widths Instruction pipelining easily Micochip PIC 14

15 Typical Processors Design Philosophies CISC Complex Instruction Set Computer RISC Reduced Instruction Set computer 15

16 CISC- Complex Instruction Set Computer A large number of instructions, each carrying out a different permutation of the same operation Instructions provide for complex operations Different instructions of different format Different instructions of different length Different addressing modes Requires multiple cycles for execution Complex hardware and simple compilers 16

17 RISC- Reduced Instruction Set Computer Instructions for simple operations that can be executed in a single cycle Each instruction of fixed length Facilities instruction pipelining Large general purpose register set Can contain data or address (symmetry) Load-store architecture No memory access for data processing instructions Simple hardware and complex compilers 17

18 RISC success Stories Power PC Router, switches, storage equipment, etc MIPS PlayStation, PlayStation 2 Power Architecture Wii, Xbox 360, PlayStation 3, Printers, Cars SPARC By Sun Microsysems (new Oracle) ARM! 18

19 ARM Ltd Advanced RISC Machine (ARM) is the first RISC processor for commercial use It was originally developed in the 80 s at Acorn Computers Ltd of Cambridge In 1990 ARM Ltd spun out of Acron Designs the ARM range of RISC processor cores Licenses ARM core designs to semiconductor partners who fabricate and sell to their customers ARM does not fabricate silicon itself Also develop technologies to assist with the design-in of the ARM architecture Software tools, boards, debug hardware, application software, bus architectures, peripherals, memory, etc. 19

20 ARM Offices Worldwide 20

21 ARM Partnership Model ARM business model is based on partnership with: Silicon Partners ARM licenses processor cores (and other IPs) to partners for use in their own products Third parties who support the ARM architecture OS vendors, Tools vendors, application software providers, Design services 21

22 ARM Partners 22

23 Why ARM? Low power consumption Fast execution per Watt Good backward compatibility Relatively inexpensive Variety of code offerings In 2006, it has been reported that around 2 billion ARM-based devices were sold etc 23

24 Examples of ARM-powered Products 24

25 Examples of companies licensing ARM IP 3Com Agilent Technologies Altera Freescale Fujitsu NEC Nokia Intel IBM Microsoft Motorola Panasonic Qualcomm Sharp Sanyo Sun Microsystems Sony Symbian Texas Instruments Toshiba Wipro 25

26 ARM for Embedded Systems An example of an ARM microcontroller 26

27 Components of a Typical ARM microcontroller ARM Processor Controls the embedded device Different versions of the ARM Processor are available to suit the desired operating characteristics An ARM processor comprises a core (the execution engine that processes instructions and manipulates data) plus the surrounding components that interface it with a bus. These components can include memory management and caches Controllers Coordinate important functional block of the system Two commonly found controllers are interrupt and memory controllers Peripherals Bus Provide all the input- output capability external to the chip and are responsible for the uniqueness of the embedded device Used to communicate between different parts of the device 27

28 ARM Bus Technology The most common PC bus technology is peripheral Component Interconnect (PCI), which connects off-chip devices such as video cards and hard disk controllers to the x86 processor bus. Embedded devices use on-chip bus that allows different peripheral to be interconnected with an ARM core 28

29 Bus Protocol It is the set of logical rules that govern the communication between the processor and a peripheral The Advanced Microcontroller Bus Architecture (AMBA) has been widely adopted as the on-chip bus architecture used for ARM processors Using AMRA, peripheral designers can reuse the same design on multiple projects Because there are a large number of peripherals developed with an AMBA interface, hardware designers have a wide choice of tested and proven peripherals for use in a device A peripheral can simply be bolted onto the on-chip bus without having to redesign an interface for each different processor architecture This plug-and-play interface for hardware developers improves availability and time to market 29

30 ARM AMBA Variations First AMBA bus introduced were the ARM System Bus (ASB) and the ARM peripheral Bus (APB) Later, the ARM High-performance Bus (AHB) was introduced. AHB provides higher data throughput than ASB and can run at higher clock speeds to be the first ARM bus to support widths of 64 and 128 bits ARM has introduced two variations on the AHB bus: Multi-layer AHB and AHB-Lite In contrast to the original AHB, which allows a single bus master to be active on the bus at any time, the Multi-layer AHB bus allows multiple active bus masters AHB and Multi-layer AHB support the same protocol for master and slave but have different interconnects. The new interconnects in Multi-layer AHB are good for systems with multiple processors, they permit operations to occur in parallel and allow for higher throughput rates AHB-Lite is a subset of the AHB bus and it is limited to a single bus master. This bus was developed for designs that do not require the full features of the standard AHB bus. 30

31 ARM Memory Tradeoffs: price, performance, and power consumption Characteristics: hierarchy, width, and type E.g. If memory has to run twice as fast to maintain a desired bandwidth, then the memory power requirement is expected to be higher 31

32 Memory Hierarchy 32

33 Memory Width ARM Vs Thumb instruction fetch 33

34 Memory Types 34

35 Other components of an ARM microcontroller Peripherals Memory controllers Connect different types of memory to the processor bus Interrupt controllers Software Provides a programmable governing policy that allows software to determine which peripheral or device can interrupt the processor at any specific time by setting the appropriate bits in the interrupt controller registers Boot Code Takes processor from Reset State to a state where the OS can run Operating System ARM supports over 50 OS s RTOS Platform OS Applications 35

36 References p=1 ARM System Developers Guide, A.N. Sloss, D. Symes, and C. Wright nutes/ membersmeeting/arm.pdf -homeprofile ming-the-arm-microprocessor-for-embeddedsystems Department of Electronics and Electrical Engineering ELCT 912: 36

EE 354 Fall 2015 Lecture 1 Architecture and Introduction

EE 354 Fall 2015 Lecture 1 Architecture and Introduction Note: Much of these notes are taken from the book: The definitive Guide to ARM Cortex M3 and Cortex M4 Processors by Joseph Yiu, third edition,