Elettronica T moduli I e II

Transcription

1 Elettronica T moduli I e II Docenti: Massimo Lanzoni, Igor Loi Massimo.lanzoni@unibo.it igor.loi@unibo.it A.A. 2015/2016

2 Scheduling MOD 1 (Prof. Loi) Weeks 39,40,41,42, 43,44» MOS transistors» Digital electronics MOD 2 (Prof. Lanzoni) Weeks 45,46,47,48,49,50,51,52» OPAMPS» Analog electronics

3 What is this class all about? to digital integrated circuit design engineering» Key concepts needed to be a good digital IC designer» Design creativity Models and techniques that allow reasoning about circuit behavior» Allow analysis and optimization of the circuit s performance, power, cost, etc.» Understanding circuit behavior is key to making sure it will actually work Teach you how to make sure your circuit works» Do you want your transistor to be the one that screws up a 1 billion transistor chip?

4 MOD1: What you ll learn... Understanding, designing, and optimizing digital circuits for various quality metrics:» Performance (speed)» Power dissipation» Cost» Reliability

5 Detailed Topics CMOS devices and manufacturing technology CMOS gates Combinational and sequential circuits Arithmetic building blocks Interconnect Memories Propagation delay, noise margins, power Design methodologies

6 Logistics Instructor s office hours» By appointment ( ) Textbook» J. Rabaey, A. Chandrakasan, B. Nikolic, Circuiti integrati digitali," 2a edizione, Prentice-Hall 2005 ( N. Weste, D. Harris, CMOS VLSI Design 4th Ed., Addison-Wesley 2011 ( Lecture notes» WEB site

7 Written Exam Open book (you can bring book, notes etc) No electronic devices allowed (only calculators) No more penalties if the score is less than 14/30 Dont cheat!! 6 exam per year» 3 exams during Jan-Feb 2016» 2 exams during June-July 2016» 1 exam during September 2016 Exam info: 2 open questions, 1 execise, 75min available.

8 Exam and Grades Witten final exam» hrs (Mod1 + Mod2)» Mod1 and Mod2 are independent» Written_grade = (Mod1_grade + Mod2_grade)/2 Oral exam is optional» Final grade = Written_grade» or» (Written_grade + Oral_grade)/2

9 Digital integrated circuits revolution

10 Digital Integrated Circuit Design: The past, the present and the future» What made Digital IC design what it is today» Why is designing digital Ics different today than it was before?» Will it change in the future?

11 The First Computer The Babbage Difference Engine (1832) 25,000 parts cost: 17,470

12 ENIAC - The first electronic computer (1946) Balistic calculator (Used during 2 World War) valves 1500 relais 30 tons 200 KW $ ,22 (1946) During 10 years of opeating life valves had to be replaced

13 The transistor revolution First transistor Shockley, Brattain, Bardeen Bell Labs, 1948 Same Functionality of vacuum tubes but less power and compact, reliable and fast.

14 The first Integrted Circuit Improvement on technology process :» Planar Transistors (BJT) Integration of many transistors on the same semiconductor substrate Phase shift oscillator Jack Kilby (1958)

15 The first integrated circuit ECL 3-input Gate Technology: bipolar Motorola 1966 Noyce Fairchil Co-Founder Idea: Planar transistor Process in a single shot several transistor Manufactoring steps Doping Oxidation Lithografy Etching Deposition Etc Beginning of the IC REVOLUTION!!!

16 Transistor Transistor Logic TTL is a class of digital circuits built from bipolar junction transistors (BJT) and resistors. Became very popular after 1963 (Texas) 7400 and 5400 series Main issue:» Speed» Power

17 MOS transistor Patented : 1935 (IGFET)...Reinvented in late 60. First working device : 70

18 Microprocessors Intel 4004 (1971) 2300 transistors 3x4mm 10um process PMOS <1 MHz operation

19 Microprocessors Intel 4004 (1971) 2300 transistors 3x4mm 10um process PMOS <1 MHz operation

20 Intel Core 2 Microprocessor Intel Core 2 (2006), 291M transistors, 65CMOS, 143mm² 3GHz

21 Transistor Counts

22 Intel SRAM Prototype Chip (2009) 22nm 364MB SRAM > 2.9B transistor 3rd generation High-K + Metal Gate

23 Moore s Law In 1965, Gordon Moore noted that the number of transistors on a chip doubled every 18 to 24 months He made a prediction that semiconductor technology will double its effectiveness every 18 months Electronics, April 19, L O G2 O F T H E N U M B E R O F C O M P O N E N T S P E R IN T E G R A T E D F U N C T IO N

24 Cost per Transistor cost: -per-transistor Fabrication capital cost per transistor (Moore s law)

25 Scaling Transistor count is the most common measure of integrated circuit complexity.» Intel's 10-core XeonWestmere-EX 2.5 Billion» Xilinx currently holds the "world-record" for an FPGA containing 6.8 Billion transistors. More integration due transistor scaling:» More compact devices» faster» Less power hungry

26 65nm CMOS Technology PMOS (gate 65nm) 8 Metal Layers for local/global interconnects

27 Evolution in Complexity memories

28 Frequency Frequency (Mhz) Doubles every 2 years Now it s over! P6 Pentium proc Courtesy, Intel Year Lead Lead Microprocessors Microprocessors frequency frequency doubles every 2 years

29 Power Dissipation Prediction (2000)

30 Power density Power Density (W/cm2) Rocket Nozzle 1000 Nuclear Reactor 100 Courtesy, Intel Hot Plate P Pentium proc Year Power density too high to keep junctions junctions at at low temp

31 Not enough cooling

32 Why Scaling? Technology shrinks by 0.7/generation With every generation can integrate 2x more functions per chip; chip cost does not increase significantly Cost of a function decreases by 2x But» How to design chips with more and more functions?» Design engineering population does not double every two years Hence, a need for more efficient design methods» Exploit different levels of abstraction

33 Design Abstraction Levels SYSTEM MODULE + GATE CIRCUIT DEVICE G S n+ D n+

34 Not Only Microprocessors (cell phone ) Small Signal RF Power RF Power Managemen t Analog Baseband Digital Baseband (DSP + MCU) 34

35 Challenges in Digital Design Macroscopic Issues Microscopic Problems Time-to-Market Millions of Gates High-Level Abstractions Reuse & IP: Portability Predictability Verification Ultra-high speed design Interconnect Noise, Crosstalk Reliability, Manufacturability Power Dissipation Clock distribution. Everything Looks a Little Different and There s a Lot of Them!?