ee457_mt_sp2013.fm 3 ( 48 points) 30 min. Virtual Memory: 6 pts 9 pts 6 pts 6 pts 6 pts 7 pts 3.1 PTBR stands for. It is initiated by (hardware / oper

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7 ee457_mt_sp2013.fm 3 ( 48 points) 30 min. Virtual Memory: PTBR stands for. It is initiated by (hardware / operating system) and is utilized by (MMU / CCU) (i.e. memory management unit or cache control unit) to look up (TLB / Page Table / Cache Tag RAM). 3.2 Page Table: Number of A,B,C,D Tables built by the OS: PQRST on the side represents a 20-bit (5-digit hex) VPN in a 4-level page table with upper 4 bits (P) indexing the A-level table, next 8 bits (QR) indexing the B-level tables, next 4 bits (S) indexing the C-level tables, and the last 4 bits (T) indexing the D-level tables. TABLE-I Suppose the first 8 distinct virtual pages accessed by the application program had the VPNs as stated in TABLE-I (in sorted order). How many tables of what size are built by OS by this time? A-level: B-level: C-level: D-level: Complete 8 distinct VPNs of your choice in TABLE-II such that the least number of A,B,C,D tables are built by OS. This least set consists of of A-Table(s), of B-Table(s), of C-Table(s), of D-Table(s) Similarly, complete 8 distinct VPNs of your choice in TABLE-III such that the most number of A,B,C D tables are built by OS. This set consists of of A-Table(s), of B-Table(s), of C-Table(s), of D-Table(s). 3.3 The advantage of (VIPT / PIPT) over (VIPT / PIPT) comes from the fact that 3.4 Memory addresses: In a 32-bit virtual address system using 1KB pages, state any two consecutive 32-bit word addresses (in hex) which do not fall in the same virtual page. I am evicting a page containing the byte with virtual address h. What is its virtual page number (in hex)?. What is the range of byte addresses residing in that page (lowest virtual byte address to highest virtual byte address). April 5, :34 pm EE457 Midterm Exam - Spring 2013 Page - 10 / 11 TABLE-II TABLE-III P Q R S T P Q R S T P Q R S T C Copyright 2013 Gandhi Puvvada

8 ee457_mt_sp2013.fm 3 ( 48 points) 30 min. Virtual Memory: PTBR stands for. It is initiated by (hardware / operating system) and is utilized by (MMU / CCU) (i.e. memory management unit or cache control unit) to look up (TLB / Page Table / Cache Tag RAM). 3.2 Page Table: Number of A,B,C,D Tables built by the OS: PQRST on the side represents a 20-bit (5-digit hex) VPN in a 4-level page table with upper 4 bits (P) indexing the A-level table, next 8 bits (QR) indexing the B-level tables, next 4 bits (S) indexing the C-level tables, and the last 4 bits (T) indexing the D-level tables Suppose the first 8 distinct virtual pages accessed by the application program had the VPNs as stated in TABLE-I (in sorted order). How many tables of what size are built by OS by this time? A-level: B-level: C-level: D-level: Complete 8 distinct VPNs of your choice in TABLE-II such that the least number of A,B,C,D tables are built by OS. This least set consists of of A-Table(s), of B-Table(s), of C-Table(s), of D-Table(s) Similarly, complete 8 distinct VPNs of your choice in TABLE-III such that the most number of A,B,C tables are built by OS. This most set consists of of A-Table(s), of B-Table(s), of C-Table(s), of D-Table(s). 3.3 The advantage of (VIPT / PIPT) over (VIPT / PIPT) comes from the fact that 3.4 Memory addresses: In a 32-bit virtual address system using 1KB pages, state any two consecutive 32-bit word addresses (in hex) which do not fall in the same virtual page. I am evicting a page containing the byte with virtual address h. What is its virtual page number (in hex)?. What is the range of byte addresses residing in that page (lowest virtual byte address to highest virtual byte address). April 4, 2013 :30 am EE457 Midterm Exam - Spring 2013 Page - 10 / 11 TABLE-I TABLE-II TABLE-III P Q R S T P Q R S T P Q R S T C Copyright 2013 Gandhi Puvvada