MTCA.4 RTMs for Generic Fast ADC-DAC
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1 Dr. Matthias Kirsch MTCA.4 RTMs for Generic Fast ADC-DAC
2 A good speech should be like a woman's skirt: long enough to cover the subject and short enough to create interest Winston S. Churchill
3 Nomenclature μrtm or RTM Rear Transition Module in the context of the MTCA.4 standard (in contrast to ATCA Rear Transition Module)
4 AMC/μRTM Concept
5 Underlying Idea Develop fairly complex Digitizer or FPGA, AMC.4 card once Use with a variety of RTMs with moderate complexity tailored to the application
6 SIS8300 Digitizer Properties MTCA.4 4 lane PCI Express 640 MB/s readout 10 channels 125 MS/s 16-bit ADC 10 MS/s to 125 MS/s per channel AC and DC input stage two 250 MS/s 16-bit DACs for fast feedback implementation high precision, flexible clock distribution logic Internal, front panel, RTM and backplane clock sources Programmable delay of twin ADC groups Gigabit Link Port implementation to backplane Double SFP cage for high speed system interconnects Virtex V FPGA up to 32 MSample Memory per channel additional point to point links over backplane In field firmware upgrade
7 SIS8300 V2
8 SIS8300 Virtex 5 Options FPGA DDR2 Memory Comment XC5VLX50T-3FGG1136C 4 x 1 GBit Default XC5VSX50T-3FGG1136C 4 x 2 GBit More DSP slices XC5VLX110T-3FGG1136C 5 x 2 GBit More I/Os
9 MMC (Module Management Controller) Implementation in ATMEGA128 Struck in house development RTM implementation in close co-operation with DESY and N.A.T (for insiders: Quiesce philosophy to be sorted out) ATmega MU
10 RTMs for the SIS8300
11 SIS8900 Single Ended Input RTM 10 LEMO 00 connectors (FMB option) 50 Ohm input impedance -1 V,...,+1 V default input range analog signals can be routed to AC and DC input stage RJ45 jack for RTM clocks RJ45 jack for Digital I/O +5V, 250 ma power option for RJ45 jacks two metric on board pin headers for 6 LVDS input/output signals each
12 SIS8900 Application Examples SIS8300 Production Tests SIS8300/8900 as Standard Single Ended Digitizer PTB 10 pm Interferometer Readout (so far SIS3302 VME implementation) PTB Delay Line Readout Development (Pulsed Fast Neutron Transmission Spectroscopy)
13 SIS8300/8900 ROOT GUI
14 Border-crossing security inspection based on Neutron and Gamma Radiography suitable for inspecting medium-size cargo or passenger vehicles Oversized objects Palletized cargo Schematic view of proposed bordercrossing inspection system Passenger vehicles V. Dangendorf Air cargo containers
15 Imaging Detector for PFNTS TRECOR: Time-Resolved Event Counting Optical Radiation Detector Pickup Electrode and Delayline N, radiation ECII (event couting image intensifier) PMT scintillator lens mirror X,Y,Z - 3d pickup electrode ECII V. Dangendorf
16 DAQ for TRECOR - system requires 60 optical readout channels - each Channel aquires Image (x, y), Time-of-Flight (TOF) and Energy (E ) - Parameters - derived from 8 measured params, mostly time differences < 30 ns - data rate >2 MHz / optical channel - online data compression and pre-analysis on DAQ board in scalable system peferably Concept based on TCA with SIS8300: - dt measurement with fine/coarse masurement: Fine: amplitude of rising edge Coarse: 125 MHz clock of SIS Calculation of x(512),y(512),tof(128), E(16) in FPGA (brackets: parameter resolution in ch) - Consistency check of parameter set in FPGA - Histogramming of 4-d Matrix in memory - Optional transparent mode for Analysis in WS V. Dangendorf
17 HYTEC RTM7201 ITER magnetic sensor readout 4-channel signal modulator Harsh/Noisy environment Signal conditioning RTM with driver/receiver AMC/RTM (direct SIS8300 connection option)
18
19 DWC8300/SIS8300
20 Flash Injector Rack Installation
21 FLASH Operation
22 DESY BPM RTM Interleaved Sampling 50 pc resolution target Frank Schmidt-Föhre, Bastian Lorbeer
23 DESY APD Stretcher RTM Dual channel signal stretcher Petter Göttlicher, Chris Youngman
24 Build your own RTM? Partial Requirements I 2 C Bus AT24C32A compatible serial EEPROM (connected to the fron AMC I 2 C port and at address 0x50) Blue hot swap LED, LED1, optional LED2 Hot swap ejector handle (AMC MMC readable) The μrtm shall provide at least one temperature sensor (AMC MMC readable)
25 SIS8300 Compatible RTM Management - I2C Port Repeater Note: Later drafts and final spec.: μrtms that control the LEDs via I2C should use LED drivers with programmable blink rate and duty cycle can be accomodated with change in SIS8300 management code as needed
26 SIS8900 RTM Management EEPROM and Temp Sensor
27 SIS8300 Compatible RTM Management Identifier Record 0x0092BD (37565) Struck Innovative Systeme GmbH Thorsten Fritzke thorsten.fritzke&struck.de IANA: Internet Assigned Numbers Authority
28 Outlook SIS8300-L Digitizer development under way, Virtex 6 (XC6VLX130T-2FFG1156C) instead of Virtex 5 (MGT link speed), DDR3, DAC to Z3, Multi GSPS 12-bit MTCA.4 Digitizer in 2013 Differential input RTM development upon request
29 Summary SIS8300/DWC8300 MTCA.4 Digitizer- Downconverter combination meets XFEL LLRF specification SLAC LLRF ADC Frontend (talk by Zheqiao Geng, SLAC) BPM and APD stretcher RTMs ITER RTM Development (HYTEC) Single ended SIS8900 RTM Substantial progress since Valencia NSS xtca Workshop
30 µtca/mtca.4 Ecosystem good feedback during IPAC12 user base increasing (recent ESS PO) some 50 SIS8300 and 10 SIS8900 in field availability of standard hardware increasing You will want to keep in mind that a learning and introduction curve was present in other standards -like VME- as well
31 Acknowledgements The SIS8300 was developed in co-operation with DESY under ZIM Förderkennzeichen MS9 We d like to extend our special thanks to Kay Rehlich from DESY for the good atmosphere and the assistance throughout the development and Frank Ludwig from DESY for his input and continued support for improvements on the analog side in the V1 to V2 revision transition and beyond SIS8300-L
32 Vendor Exhibits ELMA 6 slot MTCA.4 crate NAT MCH Kontron AMC5020 CPU SIS8300 Digitizer SIS8900 RTM CERN ROOT SIS8300 demo application under LINUX (and Rigol signal generator)
33 Questions/Discussion
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