OEpic s Business Presentation

Transcription

1 OEpic s Business Presentation 10-40Gb/s InP OEICs OEpic, Inc. Sunnyvale, California June, 2001

2 OEpic s Vision Advanced EO / OE Integration Integrate the Best of Optical Components With Millimeter Wave ICs for 10 and 40Gb/s Fiber Optics Communications

3 OEpic s Core Competencies Complete 40Gb/s OEIC design and fabrication capability n Design and Characterization n Epitaxial Material Technology n Processing and Fabrication n Volume Production

4 Company History n Incorporated in Delaware on July 14, 2000, n A core team of 29 employees with 20 key engineers has been assembled and functional, n Advanced InP OEIC wafer fab with MBE epitaxial growth and sub 0.1 micron CD capabilities, n Full range of optical design and test capabilities up to 50GHz, n Wafer fab and office space of 18,000 sq. feet (expandable to 38,000 sq. feet) leased in Sunnyvale, CA. n Received product specifications and NRE revenue from telecom customers.

5 What Is Is The Business? Design and manufacture of customized OEICs for broadband fiber optics communications Market Opportunities 10Gb/s and 40Gb/s OEICs Competitive Advantage Speed and performance, from design to production with COMPLETE capabilities

6 Primary Business Model n An IP based product company n Strategic alliances with system, subsystem and module manufacturers 0Joint development of advanced OEIC products 0Shared IP ownership n Focus: 10Gb/s and 40 Gb/s Transceiver OEICs OEpic provides COMPLETE OEM custom integration, from design, material growth, wafer fabrication, test, to volume production, of 10Gb/s and 40 Gb/s OEIC products and beyond.

7 Founding Team n Yi-Ching Pao, President and CEO 0Ph.D. in E.E., Stanford University 0IEEE Fellow IEEE Microwave Prize: 100GHz InP Broadband MMIC 01990, 1992 R&D100 Awards of InP MMIC and high level epitaxial integration of Filtronic lant (6/00), y since 1991 n Denny Houng, Chief Scientist 0Ph.D. in E.E., Stanford University 0Principle Project Scientist, Electronics Research Lab., HP Labs. 0Principle investigator, MOCVD and GSMBE based 850nm, 980nm, 1300nm semiconductor lasers, and InP based DHBTs 0Co-author of two invited book chapters, on Organometallic Vapor Phase Epitaxy of III-V Materials, and Epitaxy Technology for VCSEL 030 journal publications, 6 invited talks, and four US patents.

8 Founding Team n Cindy Yuen, VP of High Speed Electronics 0Ph.D. in Physics, Stanford University, 0Manager, Integrated Circuit Technology, Varian Research Center, 0Manager, Advanced Technology, Litton Industries, LSSD, 0Department Manager, RF electronics product line, Space Systems/Loral 050 technical publications, 6 patents, and co-authored one book in the field of high speed devices, MMICs, and OEICs, R&D100 Award for the development of 2-20GHz HEMT MMIC, n M. Leonard Riaziat, CTO, VP of Optoelectronic Engineering 0Ph.D. in Applied Physics, Stanford University 0Director, Varian Central Research Laboratory 0Business Investments Manager, Varian Medical and BioSynergy 0Associate Editor of IEEE Circuits and Devices Magazine 0Author of text book Introduction to High-Speed Electronics and Optoelectronics, John Wiley and Sons, Inc., New York, technical publications and 5 US patents

9 Founding Team n Milton Chang, Chairman of The Board 0Ph.D. in EE, California Institute of Technology, 0Founder of more than 12 companies including: Uniphase, Gadzoox Networks, Newport Corporation, and New Focus 0President & CEO of Newport Corporation and took the company public in 1983, 0Founder, CEO, and now Chairman of New Focus, Inc 0Serves on the boards of seven private and public companies 0Founder of Incubic, LLC, to further leverage his expertise in launching successful start-up companies.

10 Founding Team Qualification 100GHz InP broadband OEIC receiver as result of Founders technical accomplishment (Instrumentation applications) Amplifier Amplifier Selective re-growth of multifunction integration Photodetector Limiter diodes

11 Founding Team Qualification 20 Record performance of FSS MMIC amplifiers Record Performance of founders previous accomplishments 15 Gain (db) 10 W-band (100GHz) InP CPW amplifier 5 Winner of International R&D-100 Award Frequency (GHz) V-band (60GHz) HEMT amplifier

12 Founding Team Qualification InP based HBT Performance HBT topology IEEE-Cornell, 2000

13 Why Integrate? n Reproducibility nperformance - low parasitic nsimplify subsequent packaging efforts with enhanced yield nhigh volume, Low cost

14 Why InP? InP is the only substrate that allows the integration of long wavelength optical components at 40Gb/s. Substrate Optical Integration HBT Performance HEMT Performance Si-SiGe No 120/120 GHz Substrate Loss, Current Density NA IEEE Spectrum, October 2000 GaAs Short λ 120/120 GHz High power 150/200 GHz InP Short and Long λ 270/300 GHz 240/330 GHz Lowest Noise Note: Si-Si/Ge cannot perform any E/O and O/E conversion, has inadequate or marginal speed for 40Gb/s data rate, but presents higher level of integration for complex ICs 40Gb/s and above is InP domain

15 Technology and Product Roadmap for OEpic Technology Roadmap - fiber link components DFB laser Pump laser MUX Clock Modulator Driver VCSEL Driver VCSEL EA / EO Modulator Fiber line EDFA Fiber line Pre-amp AGC amp Data Regen. DEMUX Photodetector Phase-I Phase-II TBD NOT Integration Clock Recovery

16 Product Positioning OEpic s 10Gb/s and 40Gb/s OEICs Initial Products and Potential Products OEpic focuses its initial PHY layer products on the front-end, high- speed E/O and O/E conversion OEICs OEpic will also work on the next level of PHY layer ICs due to its much superior performance over Si/SiGe SiGe technology in 40Gb/s applications Si CMOS PHY Layer ICs InP Integrated O/E and E/O Components (TIA, modulator, driver, detector, OEICs) OEpic Initial Product Focus Si/SiGe PHY Layer ICs InP Based PHY Layer ICs (Mux, DeMux, SERDES, CDR, etc.) OEpic Potential Product Focus

17 OEpic s Products Frequency Wavelength <10 GHz GaAs 850 nm 10 GHz InP 1310 nm - 40 GHz 1550 nm Rx PIN PIN(MSM)+TIA+Limiting Amp TIA (custom chip) Limiting Amp (custom chip) -! - -!!!!!!! Tx Wavelength Integrated VCSEL Integrated EA Modulator EO MODULATOR 850 nm (Direct drive)! nm InP!! nm InP!! - Drivers InP/GaAs!(GaAs <=10 GHz)!(10G & InP-40 GHz)!(10G & InP-40 GHz)

18 Initial OEICs for 10Gb/s Applications (40Gb/s will will follow the the same same framework but but on on InP InPonly) Long λ Rx Goal: Single chip (PIN+TIA+LA) Rx integration InGaAs/InP PIN Dark I ~ 30 na at -3V Rise time ~ 20 ps at -5V Responsivity > 0.8 A/W Short λ In(Ga)P HBT TIA In(Ga)P HBT AGC/Limiting Amplifier Tx Goal: Dual-chip (driver+ EML, driver+vcsel) Tx integration Long λ Short λ In(Ga)P HBT PIN-TIA In(Ga)P VCSEL Driver Amplifier OEpic s matching VCSEL Aperture size = 20 um Threshold current ~ 5.9 ma Slope efficiency ~ 0.48 mw/ma Typical Power ~ 2.6 mw 3rd party VCSEL products Third party modulator products In(Ga)P EA and EO Modulator Driver Amplifier

19 Photo of of Integrated (photodiode + TIA) PIN3LGPDV.2 Chip Dimension: 590 x 575µm Measured Performance of Integrated (PIN Diode+TIA3v.2) Parameter Transimpedance Sensitivity (@10-9 BER) Overload (@10-9 BER) Vout Dark Current PIN Diode Responsivity Output Return Loss Power Consumption Simulated 54 dbω -20 dbm 0 dbm 2.5 to 250 mvp-p C 0.5 A/W >11 db 52 mw

20 EA Mod or VCSEL Driver Amplifier DRV3v.1 Summary of Predicted and Measured DRV3 Performance Parameter 3 db S.S. Bandwidth Input Voltage Output Voltage Small Signal Gain Input Return Loss Output Return Loss Group Delay Variation P sat Power Consumption Simulated 11 GHz mvp-p 1 Vp-p (+4 dbm) 25 ± 1.5 db > 7 db > 4 db < 25 ps +4 5 GHz 310 mw On-Carrier Measurements 11 GHz GHz 26 ± 1.5 db > 12 db > 11 db < 20 ps GHz 275 mw InP EA Modulator Layer structure p++ InP (100Å) p+ InP (1000Å) Superlattice pairs InGaAs (90Å) InAlAs (50Å) n+ InAlAs (10000Å) n+ InAlAs (2400Å) InP Substrate Extinction Ratio: 10 db, Bandwidth: 25 GHz expandable to 45 GHz, Drive Voltage: 3V p-p Chip Dimension: 895 x 575µm OEpic s lasing VCSEL for process demonstration

21 Photo of of Driver Amplifiers DRV6v.1 and v.2 Summary of Predicted & Measured DRV6v.2 Performance Parameter 3 db S.S. Bandwidth Simulated 10 GHz On-Carrier Measurements 8 GHz Chip Dimension: 895 x 575µm Input Voltage 400 to 1000 mvp-p Output Voltage 2.5 Vp-p (+12 dbm) 2.6 Vp-p (+12.2 dbm) Small Signal Gain 30.5 ± 1.5 db 30 +/- 4 db Input Return Loss > 5 db > 10 db above 1 GHz Output Return Loss > 4 db > 5 db above 1 GHz Group Delay Variation < 30 ps < 40 ps P sat +12 5GHz GHz Power Consumption W W Chip Dimension: 1080 x 575µm

22 Next level of integration for 10Gb/s Applications Integration of (PIN+TIA+Differential Amp) with Differential Driver6 Amplifier 850 nm wavelength for 10Gb/s Application (Chip Dimension: 988 x 882 um) (Chip Dimension: 1520 x 882 um) Differential Amplifier (Chip Dimension: 988 x 882 um) Integration of (PIN + TIA) with 850 nm wavelength for 20 Gb/s (Chip Dimension: 697 x 588 um)

23 Initial 40Gb/s OEIC Designs Driver Amplifier for 40 Gb/s Application - v.1 Chip Dimension: 1490 x 625 um Driver Amplifier for 40 Gb/s Application - v.2 Chip Dimension: 1490 x 625 um

24 Revenue Forecast 10Gb/s is used to stabilize the wafer fab and to provide initial volume revenue 40Gb/s remains to be our main growth focus Gb/s Telecomm 10Gb/s Tele/Datacomm Projected Revenue in $K Q1 01 Q2 01 Q3 01 Q4 01 Q1 02 Q2 02 Q3 02 Q4 02 Q1 03 Q2 03 Q3 03 Q4 03 Quarter/Year

25 Projected Revenue and Net Profit/Loss Gross margins for 40Gb/s products may be > 80%, while 10Gb/s may stay in the 50% range Revenue and Profit/Loss in $K Net Loss Total Revenue Net Profit Q1 01 Q2 01 Q3 01 Q4 01 Q1 02 Q2 02 Q3 02 Q4 02 Q1 03 Q2 03 Q3 03 Q4 03 Quarter/Year

26 Risks No Technical Risk for 10Gb/s Products Marketing Strategy and Sales Determined Two Identified Risks for 40Gb/s Product Plan 1. Deployment timing of the 40Gb/s products in volume It is mainly the supply chain and industrial infrastructure issues. More sources are required Gb/s InP based product reliability Reliability is the major concern due to the high internal electric field required to achieve the 40Gb/s performance. This problem may be resolved by environmental control to meet the system requirement.