Roll No TCS 402/TIT 402

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1 Roll No TCS 402/TIT 402 Mid Term Examination March 2016 B.Tech (IV Semester) Computer Organization Time: Two (2) Hrs. Maximum Marks: 60 NOTE: (i) (ii) (iii) (iv) This question paper contains three questions with alternative choice. All questions are compulsory. Each questions carries four parts a, b, c and d. Attempt either the parts a and b or c and d of each question. Each part carries ten marks. Total marks assigned to each question are twenty. SOLUTIONS 1. (a)explain the various functional units with their operations in a computer with diagram. (10) Ans:Functional units:cpu,memory,input and output devices. Or diagram similar to this.explain the working or operations also.

2 2. (b) Represent the following according to the given specifications: I. (-40.1) 10 in 32 bit floating point representation. II. (30) 10 in 32 bit floating point representation. III. (162) 10 in 8 bit sign magnitude representation IV. (-71) 10 in 8 bit 2 s complement representation. V. (125) 10 in 8 bit unsigned representation (5 X 2) Ans:

iii.162=(01010 0001 ) 2 s so 162 can be represented in 9 bits in 2 s.

3 iii.162=( ) 2 s so 162 can be represented in 9 bits in 2 s.in 8 bits computer will represent it as a)if anyone has written ,then also it will be considered correct b)if anyone has wriiten that 162 cannot be represented in 8 bits in 2 s, then also it will be considered correct. c)but if someone has written any other answer,then it is incorrect.

(c ) Using hamming code, even parity agreement and Data: 10011010.

4 (c ) Using hamming code, even parity agreement and Data: Enumerate the various steps to generate the data to be sent to receiver. Assume that bit number 8 is reversed then enumerate the various steps to detect and correct this error in data. OR (10)

6 (d) (i) Differentiate between Reduced Instruction Set and Complex Instruction Set computers architecture in tabular form. (5)

7 Ans: (ii) What do you mean by common bus? Explain the different types of buses used in the computer? (5) Ans:Common bus: common set of lines on which all the data,control signals and addresses flow. Different types of buses 1)Internal bus/system bus:data bus,address bus,control bus, 2)External bus/input output bus

8 Explain them 3. (a) Draw a flowchart for showing the various steps used in Booths Algorithm and multiply the following (14) 10 and (-12) 10 using Booths Algorithm,where (14) 10 is multiplicand and (-12) 10 is multiplier. Assume these signed numbers are stored in 5 bit registers. (10) Ans: Draw flowchart. (b)answer the following questions. I. Write the smallest negative number to be represented in 8 bit 1 s complement with its bit pattern. Ans:In 8 bit 1 s complement:smallest negative number=-( )=-(128-1)=-(127)

9 Bit battern: II. What are the advantages of 2 s complement over 1 s complement and sign magnitude representation. Ans:1) 2 s complement has only one representation of zero while 1 s complement and sign magnitude representation have 2 representation for zero. 2)Easy addition,subtraction in 2 s. To add numbers using one's complement you have to first do binary addition, then add in an end-around carry value. Two's complement doesnot require to add end around carry.. III. Convert the following expression into postfix epression: A * B + C*D*E+F Ans: AB* +C*D*E+F AB* +CD* * E+F AB* +CD*E* + F AB* CD*E*+ + F AB* CD*E*+F+ IV. List any two types of interrupts. Ans: External interrupts come from input-output (I/O) devices, from a timing device, from a circuit monitoring the power supply, or from any other external source.

10 Internal interrupts arise from illegal or erroneous use of an instruction or data. Example :attempt to divide by zero, stack overflow, and memory protection violation. V. What is the maximum addressable memory,if the size of data bus is 16 bits and size of address bus is 32 bits? (5 X 2) Ans: maximum addressable memory=2 32 (c) What is a Computer instruction? Differentiate between Memory reference, Input Output and Register Reference Instructions with respect to their Instruction format.explain the following instruction: BUN and BSA (10) Ans: Computer instruction:a statement which tells the computer to perform some specific task. OR A memory-reference instruction uses 12 bits to specify an address and one bit to specify the addressing mode I. I is equal to 0 for direct address and to 1 for indirect address

11 The register- reference instructions are recognized by the operation code 111 with a 0 in the leftmost bit (bit 15) of the instruction. A register-reference instruction specifies an operation on or a test of the AC register. An operand from memory is not needed; therefore, the other 12 bits are used to specify the operation or test to be executed. Similarly, an input-output instruction does not need a reference to memory and is recognized by the operation code 111 with a 1 in the leftmost bit of the instruction. The remaining 12 bits are used to specify the type of input-output operation or test performed. Some memory reference instructions are:add,and,lda,sta Some register reference instructions are:cla,cme,cma,inc Some I/O reference instructions are:inp,out BUN: Branch Unconditionally This instruction transfers the program to the instruction specified by the effective address. Remember that PC holds the address of the instruction to be read from memory in the next instruction cycle. PC is incremented at time T1 to prepare it for the address of the next instruction in the program sequence. The BUN instruction allows the programmer to specify an instruction out of sequence and we say that the program branches (or jumps) unconditionally. The instruction is executed with one microoperation: D4T4: PC <- AR, SC <- 0 The effective address from AR is transferred through the common bus to PC. Resetting SC to 0 transfers control to T0. The next instruction is then fetched

12 and executed from the memory address given by the new value in PC. BSA: Branch and Save Return Address This instruction is useful for branching to a portion of the program called a subroutine or procedure. When executed, the BSA instruction stores the address of the next instruction in sequence (which is available in PC) into a memory location specified by the effective address. The effective address plus one is then transferred to PC to serve as the address of the first instruction in the subroutine. D5T4: M[AR] <- PC, AR <- AR + 1 D5T5: PC <- AR, SC <- 0

13 (d) Write the assembly language code to represent the following arithmetic expression X=(A+B) * (C+D) in zero,one,two and three address instructions.(10) Ans: 4. (a) Explain in detail the instruction cycle with the help of suitable diagram. (10)

14 Ans: Explain the microoperations also shown above. (b) (i) The content of PC in the basic computer is 3AF (all numbers in hexadecimal). The content of AC is 7EC3. The content of memory at address 3AF is 932E. The content of memory at address 32E is 09AC.The content of memory at address 9AC is 8B9F. Assume the opcode for binary pattern 001 is ADD I. What is the instruction that is fetched and executed first. Ans: 3AF 32E 9AC AC = 7EC3 PC= 3AF 932E= Memory 932E 09AC 8B9F

15 1=mode bit =>Indirect mode 001 =opcode =>ADD (given) 932E= 1 ADD 32E will be fetched and ADD operation will be executed II.Show the binary operation that will be performed in the AC when the instruction is executed. Ans: AC = 7EC3 (ADD) DR = 8B9F AC= 0A62 III.Give the contents of registers PC, AR, DR, AC and IR in hexadecimal and the values of E, I and the sequence counter in binary at the end of the instruction cycle. (5) Ans: PC = 3AF + 1 = 3BO IR = 932E AR = 7AC E = 1 DR = 8B9F I = 1 AC = 0A62 SC = 0000 or 0 (ii) Starting from an initial value of R = , determine the sequence of binary values in R after a logical shift-left, followed by a circular shiftright,followed by a logical shift-right and a circular shift-left. (5) Ans: R = Logical shift left: Circular shift right: Logical shift right:

16 Circular shift left: OR (c) List and explain any five parameters/factors on which the performance of processor depends. (10) Ans:Parameters are: Bus size,register size,cache size,main memory size,compiler,instruction set,clock,pipelining etc. Explain any five. (d) (i) Suppose we have the instruction Load Given memory and register R1 contain the values below: Assuming register R2 has content as 1300,determine the actual value loaded into the accumulator and fill in the table below by showing appropriate calculation wherever needed: Mode Immediate Direct Value loaded into Accumulator

17 Indirect Indexed with R1 as index register Register indirect taking R2 in consideration (5) Ans: Value loaded into Accumulator will be the operand. Mode Value loaded into Accumulator Immediate 1000 Direct 1400 Indirect 1300 Indexed with R1 as index register 1000 Register indirect taking R2 in consideration 1100 (ii) Register A holds the 8-bit binary Determine the B operand and the logic microoperation to be performed in order to change the value in A to (consider I and II): I II (2 1/ /2 ) Ans: I. A = B = A<- A XOR B= II.

18 A = B = A A OR B

Unit II Basic Computer Organization

Unit II Basic Computer Organization 1. Define the term. Internal Organization-The internal organization of a digital system is defined by the sequence of microoperations it performs on data stored in its registers. Program- A program is