3D Hetero-Integration Technology for Future Automotive Smart Vehicle System

Transcription

1 3D Hetero-Integration Technology for Future Automotive Smart Vehicle System Kangwook Lee, Ph.D Professor, NICHe, Tohoku University Deputy Director, Global INTegration Initiative (GINTI) Kangwook Lee, Tohoku University

2 Agenda Background Smart Vehicle System for Future Automotive 3-D Hetero-Integration Technologies for Smart Vehicle System High Speed, Highly Parallel Processing Image Sensor Module in Smart Vehicle System Summary

3 Background Potential Applications of 3-D Integration Beyond Mobile & Consumer Products Killer Application! Yole Report, 2012 Anticipated applications start for consumer mobile products and extend to high-performance, multi-functional hetero-integrated convergence systems

4 Background Automotive Is A Emerging Market For Semiconductor

5 Background Evolution Directions of Future Smart Automotive DENSO Corp., IEEE 3D-IC 2011, Osaka, Environment Ecology Super Clean, Zero Emission, Ultimate Recycling System Comfort -Convenience Smart Highway, Connected Car, Joyful Mobility Safety Zeronize(Accident) Intelligent Safety Systems, Automated Driving

6 Background Automotive Industry Seeking Electronic Solutions For Safety in Future Automotive (Crash-Proof Car) (Autonomous Driving Car) From "Damage Reduction and Collision Avoidance" to Autonomous Driving"

7 Background Automotive Industry Seeking Electronic Solutions For Safety in Future Automotive Communicate with various sensor networks as a sensor terminal within the car and to the world around car(car-to-car, car-to-infrastructure) to improve traffic safety for all road users, increase efficiency of the public transport systems, and induce better response to hazards, incidents and accidents Connected Car, Smart Highway Safety vehicle system requires high speed signal sensing and high data processing depending on the moving speed of car. It needs more fastly gather and parallely analyze a lot of information from environment

8 Smart Vehicle System for Future Automotive Current Safety Vehicle Electronic Systems Challenges Infineon, 3D Architecture, 2011 K-W. Lee et al, IEEE IEDM 2009, IEEE T-ED 2011 Limited number of modules/parts can be installed in car due to large size Limitation of high speed signal sensing and high data transmission networking due to long distance between modules/parts Large power consumption Require integrated vehicle electronic systems for high performance functions and low power consumption

9 Smart Vehicle System for Future Automotive Electronics Becomes The Car Many numbers and various kinds of LSIs and sensor devices, and ECUs are loaded in car to assist an autonomous driving. It steadily increasing in future ; ex) 1000 chips, 47 ECU (electronic control unit), 3.6km wire (Hyundai Equus,2013) An estimated 40% of a vehicle`s cost is determined by electronics and S/W (146% increase since the `90s). An estimated 90% of all innovation in automotive are driven by electronics and S/W Electronics determine the competiveness of automotive industry in future Need a smart vehicle system for future automotive

10 Smart Vehicle System for Future Automotive Demands for Smart Vehicle System High Speed Sensing Highly Parallel Data Processing - Acting Small form-factor & miniaturization for low power consumption High speed variable real-time signal (distance, velocity, imaging) sensing and highly parallel data computing/processing, and high speed data communication between vehicle systems in car and to outside networking Hetero-integration of more sensors, more functionality, more information and more digitalization in system How to compactly integrate heterogeneous LSIs, sensors and photonic devices into a smart vehicle system?

11 Smart Vehicle System for Future Automotive

12 Smart Vehicle System for Future Automotive Analog Devices, SEMI WEST 2010

13 Smart Vehicle System for Future Automotive High density, small form-factor, and hetero-integration of ECU multi-chip module

14 Smart Vehicle System for Future Automotive Intelligent integratedsystem of a sensor, micro controller, passives and power converter in a multilayer block Smaller package of complete solution

15 Smart Vehicle System for Future Automotive 3-D hetero-integrated smart vehicle system of LSIs, sensors, power ICs, and photonics devices MEMS accelerator for high sensitive sensing of high speed moving element Image sensor stacked with ADC LSI for high performance imaging processing 3D processor, 3D memory for high performance computing Optical interconnection of photonics for high speed data transmission networking Micro-fluidic channels for the sinking of generated heat K-W. Lee et al, IEEE IEDM 2009, IEEE T-ED 2011

16 Smart Vehicle System for Future Automotive Evolution Directions of Semiconductor Technologies For Smart Vehicle System in Future Automotive Integration technologies ; heterogeneous 3D integration amongst MEMS, sensors, SoC, memory, photonic, and power devices Extremely high performance microprocessors ; multi-core technologies with affinity to image recognition and real-time processing Energy technologies ; smart grid systems and novel power devices Total design methodologies ; ESL design technologies between automotive systems and semiconductors DENSO Corp., IEEE 3D-IC 2011

17 3-D Hetero-Integration Technologies for Smart Vehicle System 3D System Integration Projects in Tohoku Univ. All Functions into One Cube!! System-on-Board 1978 (IEDM): 3D DRAM 1989 (Future Electron Device) : 3D Integration Technology 3-D Super-Chip 1999 (IEDM): 3D Image Sensor (Wafer-level Stacking) 2000 (IEDM): 3D Shared Memory (Wafer-level Stacking) 2001 (ISSCC): 3D Artificial Retina (Wafer-level Stacking) 2002 (Cool Chips) : 3D Microprocessor (Wafer-level Stacking) 2005 (IEDM): Super Chip Integration, 10-Layers Memory, Self-Assembly 2007 (IEDM): Reconfigured Wafer-to-Wafer 3D Integration, Self-Assembly 2008 (IEDM): Heterogeneous Multi-Chip Module (LSI-MEMS) 2009 (IEDM): 3D Hetero-integrated Opto-Electronic System (LSI-MEMS-Optics) 2012 (IEDM): Chip-based 3D Heterogeneous Integration Technology Hybrid Self-Assembly and Electrostatic Temporary Bonding

18 3-D Hetero-Integration Technologies for Smart Vehicle System High-throughput heterogeneous multi-chip integration by self-assembly and sidewall interconnection High accuracy 3D integration by wafer-level bonding 1 st layer Micro-bump Optical interconnection by Si interposer with optical waveguide VCSEL Si Interposer Cu TSV PD 2 nd layer 3 rd layer TSV 30um T. Fukushima et al., IEDM, 2008 K.W. Lee et al., IEEE 3D SIC, 2009 Optical Waveguide Noriki et al., SSDM, 2008 K.W. Lee et al., IEEE IEDM 2009 Optical Signal K.W. Lee et al., IEDM, 2000 CMOS-compatible, high flexible 3-D heterogeneous integration of photonics, LSI/power devices, and MEMS sensors for smart vehicle system

19 3-D Hetero-Integration Technologies for Smart Vehicle System Wafer-level 3D Stacking Technology - TSV formation - Optimal CMOS process -Wafer burn-in test & repair - Wafer Bonding -Thinning -Bumping 3D stacked LSI wafer 1st proposal of 3D WtWStacking with TSV M. Koyanagi, Proc. 8 th Symposium on Future Electron Devices, 1989

20 3-D Hetero-Integration Technologies for Smart Vehicle System Self-Assembly 3D Stacking Technology 1. Hydrophilic Area 2. Liquid Supply 3. Chip Release 4. Self-Assembly (Self-aligning & Bonding) Hydrophilic Bonding Area Hydrophobic Area Liquid Droplet (Top View) Chip Having Hydrophilic Backside Liquid Evaporation (Cross-sectional View) Surface tension of liquid is utilized for chip self-assembly Damage-free, high accuracy, and high speed bonding T. Fukushima et al., IEDM, 2005

21 3-D Hetero-Integration Technologies for Smart Vehicle System Multichip-to-Wafer Bonding by Self-Assembly Wafer Testing Sorting of KGDs Multichip-to-Wafer 3D Stacking By Self-Assembly LSI Wafer C KGDs Wafer C LSI Wafer B KGDs Wafer B 3D LSIs LSI Wafer A KGDs Wafer A Multi-KGDs layers are simultaneously aligned and bonded on LSI wafer by self-assembly method in batch T. Fukushima et al., IEDM, 2007

22 3-D Hetero-Integration Technologies for Smart Vehicle System Photograph of various-size self-assembled chips on 8-inch wafer by hybrid self-assembly T. Fukushima et al., IEEE IEDM, 2008

23 3-D Hetero-Integration Technologies for Smart Vehicle System Concept of heterogeneous MEMS-LSI multi-chip module Memory Processor Logic LS I IF chip RF chip Passives MEMS Substrate C (Reconfigured Substrate) B A D Various type KGD chips can be integrated simultaneously on a substrate in wafer-level Batch process for high throughput, low cost solution A. Self-assembly of heterogeneous multi-chips with high throughput, high accuracy B. High step-height sidewall interconnection C. Fine pitch, high density micro-bumps D. Passive device on a chip K.W. Lee et al., IEEE 3D-IC, 2009

24 3-D Hetero-Integration Technologies for Smart Vehicle System Concept of 3D opto-electronics hetero-integrated system Short Electrical Interconnect Micro-bump TSV Accurate Passive Alignment of Optical Component 3D-LSI Aperture Optical interposer VCSEL Si substrate PD Low Loss Optical Coupling mirror Core Cladding Optical waveguide Low Loss Optical Waveguide High speed, low energy inter-chip optical interconnection K.W. Lee et al., IEDM, 2009

25 3-D Hetero-Integration Technologies for Smart Vehicle System Photograph of MEMS-LSI multi-chip module LSI, passive and MEMS chips are mounted on substrate by self-assembly LSI and passive chips are connected by Cu sidewall interconnection MEMS chip is connected by the cavity chip K.W. Lee et al., IEEE 3D-IC, 2009

26 3-D Hetero-Integration Technologies for Smart Vehicle System Photograph of MEMS-LSI multi-chip module MEMS Chip Cu Sidewall Interconnection LSI Chip Substrate MEMS chip vertically stacked on LSI chip by self-assembly K.W. Lee et al., IEEE 3D-IC, 2009

27 3-D Hetero-Integration Technologies for Smart Vehicle System Concept of die-level 3D hetero-integration technology Commercial chips with different functions and sizes, which were fabricated by different technologies, are processed and integrated in chip-level using backside TSV and novel detachable technologies Commercial Chips Chip Process 3D Integration K.W. Lee et al., IEEE IEDM, 2012 Low-cost, high flexible, and rapid prototyping solution for 3-D LSIs

28 3-D Hetero-Integration Technologies for Smart Vehicle System Process flow of die-level 3-D hetero-integration technology K.W. Lee et al., IEEE IEDM, 2012

29 High Speed, Highly Parallel Processing Image Sensor Module (Tohoku Univ.) High Speed Sensing, Highly Parallel Processing Image Sensor Module for Autonomous Driving Assist -IEEE IEDM IEEE T-ED D Stacked Image Sensor -IEEE ECTC IEEE IEDM D Stacked VLSI system Image sensor module comprising 3-D stacked image sensors for high speed signal sensing and 3-D stacked dependable VLSI systems for high performance data processing

30 3-D Stacked Stereo Vision Image Sensor for High Speed Signal Sensing Rear camera Rear Rear side radar Rear radar Ultra sonic sensor Short range mm-wave radar Front surveillance Image sensor Front Front surveillance mm-wave radar ASET Dream Chip Project Block Parallel Architecture -High frame rate ; 10,000 frames/s -High pixel rate ; 2M Pixel CIS CDS ADC IF Si interposer A Si interposer B Organic Substrate CIS CDS ADC IF Si interposer A Micro Lens Color Filter Image sensor chip Analog chip ADC chip Interface chip K.W. Lee et al., IEEE IEDM, 2012

31 Configuration and Circuit Block of 3-D Stacked Image Sensor with Block-Parallel Processing Optical Signal Metal Adhesive Bump TSV K.W. Lee et al., IEEE IEDM, 2012

32 Photograph of Fabricated 3-D Stacked Image Sensor with Three-layer Structure 3-D Stacked Image Sensor FPGA 3-D Stacked Image Sensor Module with Twin-lens Commercial 2-D Chips Cross-sectional Structure of 3-D Stacked Image Sensor K.W. Lee et al., IEEE IEDM, 2012

33 X-Ray CT Scan Image of Fabricated 3-D Stacked Image Sensor with Four-layer Structure Image Sensor Chip CDS Chip ADC Chip Interposer Chip IF Chip K.W. Lee et al., IEEE IEDM, 2012

34 High Speed, Highly Parallel Processing Image Sensor Module High Speed Sensing, Highly Parallel Processing Image Sensor Module for Autonomous Driving Assist -IEEE IEDM IEEE T-ED D Stacked Image Sensor -IEEE ECTC IEEE IEDM D Stacked VLSI system Image sensor module comprising 3-D stacked image sensors for high speed signal sensing and 3-D stacked dependable VLSI systems for high performance data processing

35 High Speed, Highly Parallel Processing Image Sensor Module High Dependable 3-D Stacked VLSI System with Self-Test and Self-Repair Functions Memory Chips (4-layers) Processor Chips (7-layers) Master Processor Chip (Self-Test/Self-Re pair) JST-CREST Project: Fundamental technologies for dependable VLSI system M. Koyanagi: Three-Dimensional VLSI System with Self-Restoration Function K.W. Lee et al., IEEE ECTC, 2014

36 Block Diagram of Resilient 3-D Stacked Multicore Processor System Tier 7 Tier 3 Tier 2 Tier 1 Test Bus Tier 0 OSTC OSTC OSTC OSTC Test Access Port (3D TAP) PBB PBB PBB PBB Core Core Core Core System Bus VBB VBB VBB VBB Vertical Bus using TSVs SM SM SM SM Mem Ctrl Mem Ctrl Mem Ctrl Mem Ctrl Memory Bus OSTC: On-line self-test controller PBB: PB bridge Mem Ctrl: Memory controller SM: Stacked shared memory VBB: Vertical bus bridge Core: Processor core System Bus External Memory H. Hashimoto. et al., IEEE 3D-IC, 2013

37 High Dependable 3-D Stacked VLSI System with Self-Test and Self-Repair Functions Photograph of fabricated 2-D core processor chip (Core Processor Chip, 90nm) K.W. Lee et al., IEEE ECTC, 2014

38 High Dependable 3-D Stacked VLSI System with Self-Test and Self-Repair Functions Configuration (a), top view (b), and SEM cross-section (c) of fabricated 3-D stacked multicore processor chip with two layers (b) Top View 2-layered 3-D Stacked Multicore Processor Chip (c) SEM Cross-section Cu TSV 2 nd Chip Si Interposer (a) Configuration Cu RDL Cu/Sn Bump 1 st Chip K.W. Lee et al., IEEE ECTC, 2014

39 High Dependable 3-D Stacked VLSI System with Self-Test and Self-Repair Functions X-ray CT-scan image of TSV array in two-layered 3-D stacked multicore processor chip (Captured image from the movie) (CT-scan movie) Cu RDL, Cu/Sn Bump (2 nd Layer) Cu TSVs (2 nd Layer) Interposer Cu RDL, Cu/Sn Bump (1 st Layer) Cu TSVs (1 st Layer) K.W. Lee et al., IEEE ECTC,2014

40 Challenges for Smart Vehicle System Vehicle system require high reliability and robustness to vibration and elevated temperature and other environments. But, current 3- D integration technologies not meet severe demand specifications for vehicle system It is strongly required to develop 3-D hetero-integration technologies (process, material, structure) for smart vehicle system in future automotive Toyota, 2009

41 Summary Automotive is a emerging market for semiconductor. Automotive industry seek electronic solutions for safety in future automotive Large numbers and various kinds of LSIs and sensor devices such as radars, sensors, local area network, power devices and electronic control units are loaded in an automotive to prevent abnormal accidents and to assist an autonomous driving The automotive sector could become one of the key markets for 3- D integration. 3-D hetero-integration technologies are introduced for the smart vehicle system in future automotive High speed sensing, highly parallel processing image sensor module for autonomous driving assist is proposed. Image sensor module with 3-D stacked image sensor and 3-D stacked multicore processor was successfully demonstrated for the first time as a typical example of smart vehicle system It is still challenges to develop 3-D hetero-integration technologies (process, material, structure) to meet severe demand specifications for smart vehicle system in future automotive

42 Acknowledgement This research was supported by the Dependable VLSI Project of Core Research for Evolutional Science and Technology (CREST) of Japan Science and Technology Corporation (JST) and by NEDO Development of Functionally Innovative 3D- Integrated Circuit (Dream Chip) Technology Project that is based on the Japanese government s METI IT Innovative Program.

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