Introduction to Digital Logic Missouri S&T University CPE 2210 Hardware Implementations

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1 Introduction to Digital Logic Missouri S&T University CPE 2210 Hardware Implementations Egemen K. Çetinkaya Egemen K. Çetinkaya Department of Electrical & Computer Engineering Missouri University of Science and Technology 30 April 2018 rev Egemen K. Çetinkaya

2 Introduction Hardware Implementations Outline Integrated circuits Memory components Processors Summary 2

3 Computer Organization Overview Egemen K. Çetinkaya 3

4 Computing Resources Overview What are the computing resources? Egemen K. Çetinkaya 4

5 Computing Resources Overview Computing resources are: CPU (central processing unit) memory bandwidth power What are the computer resource constraints? 5

6 Computing Resources Overview Computing resources are: CPU memory bandwidth power Computer resource constraints are: delay cost ($) 6

7 Integrated Circuit (IC) Integrated Circuits Overview refers to a package made of semiconductor material IC generally referred as chip There are different type of ICs What are the IC design implementation factors? 7

8 Integrated Circuit (IC) Integrated Circuits Overview refers to a package made of semiconductor material IC generally referred as chip There are different type of ICs IC design implementation factors: time to implement cost to implement speed of IC size of IC power consumption of IC 8

9 Full-custom IC Integrated Circuits Types costly and time-consuming Semi-custom IC also known as ASIC (Application-Specific Integrated Circuit) two types: standard cell ASIC gate arrays (aka: structured ASIC, platform ASIC) 9

10 Programmable Logic Devices Overview PLD: Programmable Logic Device Electronic component for reconfigurable digital circuit Simple PLDs: PLA: Programmable Logic Array PAL: Programmable Array Logic GAL: Generic Array Logic Complex PLDs: arrangement of multiple PLDs FPGA: Field-Programmable Gate Array FPGAs generally use lookup table 10

11 Programmable Logic Devices General Structure Egemen K. Çetinkaya PLDs consist: buffers/inverters, AND array, OR array 11

12 Programmable Logic Arrays (PLAs) General Structure Both AND array & OR array is programmable for PLAs 12

13 Programmable Logic Arrays (PLAs) Main Components Both AND array & OR array is programmable for PLAs PLAs characterized by three numbers: the number of input lines n the number of product terms p the number of sum-of-products m E.g. n p m a typical PLA is

14 Programmable Logic Arrays (PLAs) POS Array vs. SOP Array POS: AND-OR planes, SOP: OR-AND planes x 1 x 2 x n x 1 x 2 x n Input buffers and inverters Input buffers and inverters x 1 x 1 x n x n x 1 x 1 x n x n P 1 S 1 AND plane P k OR plane OR plane S k AND plane f 1 f m f 1 f m 14

15 Programmable Array Logic (PAL) General Structure AND array is programmable & OR array is fixed 15

16 Programmable Array Logic (PAL) Main Components Both AND array & OR array is programmable for PLAs Only AND array is programmable in PAL OR array is fixed PAL is easier to program compared to PLA PAL is easier to cheaper compared to PLA PAL is less flexible than the PLA 16

17 PLD and Programmer Example Egemen K. Çetinkaya Atmel PLD and XELTEK programmer 17

18 I/O block I/O block Egemen K. Çetinkaya Complex PLDs Architectural Components PAL-like block PAL-like block I/O block Interconnection wires PAL-like block PAL-like block I/O block PAL- or PLA-like blocks interconnected 18

19 Logic Devices Tradeoffs Development time (t) Development cost ($) Off-the-shelf ICs non programmable Manufactured ICs programmable semi-custom IC full-custom IC Logic IC PLD FPGA Gate array ASIC Standard cell ASIC???????????? Speed (GHz)?????? Size (mm 2 )?????? Power (W)?????? 19

20 Logic Devices Tradeoffs Development time (t) Development cost ($) Off-the-shelf ICs non programmable Manufactured ICs programmable semi-custom IC full-custom IC Logic IC PLD FPGA Gate array ASIC Standard cell ASIC low low low medium medium high low low low medium medium high Speed (GHz) low low low medium medium high Size (mm 2 ) large large large medium medium small Power (W) high high high medium medium low 20

21 M words Egemen K. Çetinkaya Memory Architecture Memory components store data items A M N memory stores M data items of N bits each Each data item is a word N-bits wide each M N memory 21

22 Memory Components Overview Memory components store data items There are two types of memory components what are they? 22

23 Memory Components Overview Memory components store data items There are two types of memory components RAM: Random-Access Memory ROM: Read-Only Memory Difference? 23

24 Memory Components Overview Memory components store data items There are two types of memory components RAM: Random-Access Memory ROM: Read-Only Memory RAM: write to and read from operation ROM: only read from operation Distinction between the two is getting blurred due to new technologies 24

25 Random-Access Memory Overview RAM: write to and read from operation What are types of RAM? 25

26 Random-Access Memory Overview RAM: write to and read from operation Types of RAM: register files static RAM dynamic RAM 26

27 Called write port Egemen K. Çetinkaya Register Files Overview A M N register file is a datapath memory component It provides efficient access to M registers where each register is N bits wide Consider register file 16 registers, each 32-bits wide 32-bit data to write 4-bit address specifies which register to write Enable (load) line: Reg written on next clock 32 4 W_data W_addr W_en register file R_data R_addr R_en bit data that is read 4-bit address to specifies which register to read Enable read read port 27

28 Register Files Ports A M N register file is a datapath memory component It provides efficient access to M registers where each register is N bits wide Write port: collection of W_data, W_addr, W_en Read port: collection of R_data, R_addr, R_en A register file with one read and write port is called: dual-ported register file note that a register port might be also used for R and W in that case it is called single-ported register file (very rare) Multiported register file: e.g. 2 R, 1 W ports 28

29 Random-Access Memory Overview RAM very similar to register files RAMs typically larger memory than the register files a typical RAM is single ported Consider RAM data addr rw en RAM RAM block symbol 29

30 Random-Access Memory Architecture Bit storage blocks are called cell Egemen K. Çetinkaya Let A = log 2 M d0 wdata(n-1) word enable wdata(n-2) wdata0 bit storage block (aka cell ) addr0 addr1 addr(a-1) a0 a1 AxM d1 decoder a(a-1) word data cell clk en rw e d(m-1) to all cells rdata(n-1) rdata(n-2) rdata0 word word enable enable rw data RAM cell 30

31 Read-Only Memory Overview ROM: only read from operation What are types of ROM? 31

32 Read-Only Memory Overview ROM: only read from operation Types of ROM: Mask-programmed ROM Fuse-based programmable ROM also known as PROM (programmable ROM) also known as one-time programmable ROM (OTP ROM) Erasable PROM (EPROM) Electrically Erasable PROM (EEPROM) 32

33 Read-Only Memory Overview ROM can be read but not written nonvolatile memory memory maintains its contents without power RAMs are volatile memory ROMs are generally faster and low-power compared to RAMs Consider ROM data addr en 1024x32 ROM ROM block symbol 33

34 addr Egemen K. Çetinkaya Read-Only Memory Architecture Bit storage blocks are called cell Similar to RAM, but no write function Let A = log 2 M d0 word enable bit storage block (aka cell ) addr0 addr1 addr(a-1) a0 a1 AxM d1 decoder a(a-1) word data clk en e d(m-1) word word enable enable data rdata(n-1) rdata(n-2) rdata0 ROM cell 34

35 Programmable Read-Only Memory Architecture PROM: it consists of a decoder and an OR array 35

36 Programmable Read-Only Memory Logic Diagram Decoder functions as AND-array: n input 2 n 1 output 36

37 Programmable Read-Only Memory PLD Notation OR-array results: 2 n input m outputs 37

38 Processors General Architecture Circuit consisting of controller and datapath elements External control inputs External control outputs Controller DP control inputs DP control outputs External data inputs... Datapath... External data outputs 38

39 Processors Overview Circuit consisting of control and datapath elements Based on the number of task they can perform: single-purpose processor circuit performing a specific task fast and power-efficient programmable processor (aka general-purpose processor) task is stored in memory rather than building the circuit representation of processing task in memory is a program Microprocessors became popular in 1980s micro refers to being small microprocessors are programmable processor 39

40 Programmable Processors Architecture General-purpose processor can be programmed Egemen K. Çetinkaya Seatbelt warning light program 3-tap FIR filter program Other programs Instruction memory I Data memory D PC 0 IR Controller Control unit n-bit 2x1 Register file RF ALU Datapath General-purpose processor 40

41 Programmable Processors Architecture Egemen K. Çetinkaya Control unit instruction memory: stores the programs program counter: stores address of the instruction instruction register: Datapath stores current instruction store, load, manipulate data Seatbelt warning light program Instruction memory I PC 0 IR Controller Control unit 3-tap FIR filter program Data memory D n-bit 2x1 Register file RF ALU Datapath Other programs General-purpose processor 41

42 Hardware Implementations Summary Computing resources are: CPU, memory, BW, power IC types are: off-the-shelf vs. manufactured off-the-shelf ICs: logic IC, PLD, FPGA manufactured IC: full-custom vs. semi-custom Simple PLDs: PLA: Programmable Logic Array: OR-AND or AND-OR planes PAL: Programmable Array Logic Memory can be categorized based on r/w operation RAM: write to and read from operation ROM: only read from operation Processor circuit: control and datapath elements 42

43 References and Further Reading [V2011] Frank Vahid, Digital Design with RTL Design, VHDL, and Verilog, 2nd edition, Wiley, [G2003] Donald D. Givone, Digital Principles and Design, McGraw-Hill, [BV2009] Stephen Brown and Zvonko Vranesic, Fundamentals of Digital Logic with VHDL Design, 3rd edition, McGraw-Hill, [W2006] John F. Wakerly, Digital Design Principles and Practices, 4th edition, Prentice Hall,

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Introduction to Digital Logic Missouri S&T University CPE 2210 Registers

Introduction to Digital Logic Missouri S&T University CPE 2210 Registers Egemen K. Çetinkaya Department of Electrical & Computer Engineering Missouri University of Science and Technology cetinkayae@mst.edu