2 1.1 הקדמה

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1 1 מבוא למחשבים חוברת שקפים ערך: ד"ר אורי סןיסה

2 2 1.1 הקדמה

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4 4 Addressing modes

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17 RTN Description of SRC 17

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19 19 *****SRC Simulator Help***** The program simulates a RISC computer's registers status while executing an assembly program. In addition, all memory cells are printed on the screen. The developer environment enables the programmer to input the data, load and save files, edit existing programs and execute them using the simulator debugger. The Interface: There are 8 registers for the use of the developer, in addition to IPC and II special registers for handling exceptions. There is 1 exception bit for enabling/disabling exceptions. The program counter, as well as the instruction registers are visible on the screen. All the memory cells are visible using the scroll bar of the text area. The capacity of the memory can be changed by editing SRCpar.txt The maximum capacity = 3000 memory bytes. File menu: The possible actions in this menu are: clear memory, load, save, exit. Clear memory: Clears all memory cells. (Sets them to zero) Load / Save : Load or save a *.src file. Exit: exit the program. Execute menu : The possible actions in this menu are: Reset, step into, run, and stop.

20 20 Reset: Reset the Program Counter to zero. Step into: Executes the program step by step. This is done by clicking on the "fetch and execute next instruction" button at the bottom of the screen. (The button promotes the PC and executes the current instruction in the IR). Prior to the execution, a "PC set" dialog box opens, where settings of the Program counter can be done. Run : Executes the program. Stop : Stops the running of the program. (In case of Step into). At the bottom on the screen, next to the "fetch and execute" button, there is a "Interupt" button where the user can make an Interupt while the program is running using "Step into". The data that must be input, in such case, is Isrc_vect and Isrc_info according to the convensions of the SRC Exceptions handling. Edit: Opens an "Edit" dialog box that enables the user to edit the memory cells. In each memory address, it is possible to input a number or any instruction from the SRC instruction set. [See Instruction Set Help] Help: Consists of this file, an "Instruction Set" file, a "Search" option for finding a brief help about a certain instruction, and information About" the developers of this debugger.

21 21 *****SRC Simulator Help***** The SRC Instruction Set: Register Structure :8 32-bit general purpose registers. Memory : 1000 memory bytes, byte addressable. Word size : 32 bits. Instruction size : 32 bits. [ra,rb,rc] - 0 <= {a,b,c} < 8. number -In displacement : use decimal value. -In relative address : use hexadecimal value. -In bit manipulation : use decimal value. COMMANDS: **Load and store: OP 1 ld ra,number -Load from absolute address;rb is register 0. 1 ld ra,rb,number -Load from displacement address. 2 ldr ra,number -Load from relative address;rb is register 0. 3 st ra,number -Store into absolute address;rb is register 0. 3 st ra,rb,number -Store into displacement address. 4 str ra,number -Store into relative address. 5 la ra,number -Load value of absolute address into ra;rb is register 0. 5 la ra,rb,number -Load value of displacement address into ra. 6 lar ra,number -Load value of relative address into ra. **Arithmetic: 12 add ra,rb,rc -Add rb to rc and put result in ra. 13 addi ra,rb,number -Add rb to immediate constant and put result in ra. 14 sub ra,rb,rc -Subtract rc from rb and put result in ra.

22 22 15 neg ra,rb -Place 2's complement negative of rc into ra. 22 or ra,rb,rc -OR rb and rc and put result in ra. 23 ori ra,rb,number -OR rb and immediate constant and put result in ra. 20 and ra,rb,rc -AND rb and rc and put result in ra. 21 andi ra,rb,number -AND rb and immediate constant and put result in ra. 24 not ra,rb -Place logical NOT of rc into ra. **Shift: 26 shr ra,rb,number -Shift rb right into ra by constant shift count number. 26 shr ra,rb,rc -Shift rb right into ra by count in rc;number is shra ra,rb,number -Shift rb right with sign-extended into ra by constant number. 27 shra ra,rb,rc -Shift rb right with sign-extended into ra by count in rc. 28 shl ra,rb,number -Shift rb left into ra by constant shift count number. 28 shl ra,rb,rc -Shift rb left into ra by count in rc;number is shc ra,rb,number -Shift rb left circularly into ra by constant number. 29 shc ra,rb,rc -Shift rb left circularly into ra by count in rc;number is 0. **Branch: 8 br rb -Branch unconditionally to rb. 9 brl ra,rb -Branch unconditionally to rb and save PC in ra. 9 brlnv ra -Do not branch but save PC in ra. 8 brzr rb,rc -Branch to rb if rc is zero. 9 brlzr ra,rb,rc -Branch to rb if rc is zero and save PC in ra. 8 brnz rb,rc -Branch to rb if rc is nonzero. 9 brlnz ra,rb,rc -Branch to rb if rc is nonzero and save PC in ra. 8 brpl rb,rc -Branch to rb if rc is positive or zero.(sign is plus.(

23 23 9 brlpl ra,rb,rc -Branch to rb if rc is positive or zero and save PC in ra. 8 brmi rb,rc -Branch to rb if rc is negative(sign is minus.( 9 brlmi ra,rb,rc -Branch to rb if rc is negative and save PC in ra. ** General: 31 stop - Set Run to zero, halting the machine. 0 nop -No operation. 10 een -Exception enable. Set overall exception enable bit. 11 edi -Exception disable. Clear overall exception enable bit. 30 rfi -Return from interrupt. PC <- IPC; enable exceptions. 16 svi ra,rb -Save II and IPC in ra and rb,respectively. 17 ri ra,rb -Restore II and IPC from ra and rb,respectively. **End of Help file.

Advanced Computer Architecture-CS501. Vincent P. Heuring&Harry F. Jordan Chapter 2 Computer Systems Design and Architecture

Advanced Computer Architecture-CS501. Vincent P. Heuring&Harry F. Jordan Chapter 2 Computer Systems Design and Architecture Lecture Handout Computer Architecture Lecture No. 4 Reading Material Vincent P. Heuring&Harry F. Jordan Chapter 2 Computer Systems Design and Architecture 2.3, 2.4,slides Summary 1) Introduction to ISA