Advanced Simulation Technologies
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1 Advanced Simulation Technologies PHY Layer Communication Design with SystemVue Agilent EEsof EDA Ingo Nickeleit, Application Engineer November
2 Contents Electronic System Level (ESL) Design Solutions Overview SystemVue Personas & Use Models Demos Algorithm Design System Integration
3 Example: Cellular Phone ESL Communication PHY Layer Antenna Design Finite-Difference Time-Domain Technology Module Design Method-of-Moments Technology Radio 3D Simulation Finite Element Method Technology RF Board Design & Layout Baseband H1(s) ESL IC Design & Layout Linear, Nonlinear Simulators Foundry Kits Wireless Standard Verification Comms Signal Design System Architecture Design Technology Wireless Library Technology Device Parameter Extraction
4 Communications PHY Layer Structure Involves various disciplines Wireless/RF Air Interface Mixed Signal Hardware DSP Algorithms
![DBM[IIP3] -132 DBM[MDS] 1 5](/docs-images/87/96221997/images/5-6.jpg "6 16 9 10 17 7 8 4")
![-138-144 -150 DBM[MDS] EM](/docs-images/87/96221997/images/5-9.jpg "Synthesis... and many more!")
5 R L I R L I Many Disciplines = Many Disjointed Tools Instrumentation Measurement SW Specification/ Prototype FPGA Prototyping SW IDE Mathlang DSP Partition n/refine Integrate e/verify System Architecture Physical Implementation RTL DSP Blocks DB[SFDR], DBM[IIP3] Dynamic Range DB[SFDR] DBM[IIP3] -132 DBM[MDS] Spreadsheets RF Blocks Analog Circuits Node DBM[MDS] EM Synthesis... and many more! one of our biggest problems is the paper hand-off between system design and physical implementation -Himadri De, RFMD
6 Agilent EEsof ESL Design Closing the gaps in PHY layer design Algorithm Exploration/ Design Partitioning Spectrasys Architecture design Implementation design Baseband Architecture Design Baseband Hardware/ Software Implementation SystemVue RF Architecture Design RF Circuit Implementation Ptolemy Communications System Integration Testing ADS GoldenGate Hardware
7 SPECTRASYS Native in Genesys environment RF block level simulator SPARCA * + spreadsheet Integrated in SystemVue Link to ADS environment BM[IIP3] DB[SFDR], DB Dynamic Range DB[SFDR] DBM[IIP3] DBM[MDS] R I R I L Node L DB BM[MDS] * SPARCA: Spectral Propagation and Root Cause Analysis = true frequency domain RF simulation
8 ADS/Ptolemy Native in ADS environment RF/DSP block level simulator TSDF * (Ptolemy) Circuit Co-verification Modulated signal & test Foundation technology of SystemVue s simulation kernel * TSDF: Timed Synchronous Data Flow
9 SystemVue Unique environment based on Genesys BB algorithm + RF/DSP block level simulator DDF * + SPARCA Polymorphic modeling & verification Compatibility with SystemVue (-2007), ADS, Genesys * DDF: Dynamic Data Flow
10 Wireless Libraries Common to SystemVue and Ptolemy Industry standards for wireless PHY layer Telecom Satcom Broadcast Various levels of detail
11 Instrument Link Common to SystemVue and Ptolemy Sharing signals with instrumentation & measurement software Consistent simulation/t&m testbench configuration Rapid prototype testing
12 Demo...
13 Personas & Use Models Algorithm Design Executable specifications Modulation, coding, equalization Target neutral Design Challenges Various coding styles & debug, polymorphic models, golden references Model Based Design Architecture design Implementation design Baseband Architecture Design Baseband Hardware/ Software Implementation Algorithm Exploration/ Design Partitioning SystemVue RF Architecture Design
14 EEsof Value for Algorithm & Architecture Design SystemVue Natively supports.m code, C++ and built-in DSP blocks Efficient polymorphic model selection & debugging Seamless transition to z- domain & fixed point models Wireless Libraries provide golden references.m code Comms/DSP functions libraries... C++ code Wireless Libraries
15 Personas & Use Models System Integration and Verification End-2- end system specifications High Level performance measures, Throughput Cognetive Radio, SDR Design Challenges Various IP code reuse, RF/BB interactions, dynamic system feedback Mixed Signal Domain Architecture design Implementation design Baseband Architecture Design Baseband Hardware/ Software Implementation Algorithm Exploration/ Design Partitioning SystemVue RF Architecture Design RF Circuit Implementation
16 EEsof Value for System Integration SystemVue Natively supports.m, C++, DSP and RF IP + RTL Co-verification System verification of digital implementation DDF simulator permits dynamic reconfiguration of system characteristics Scripting enables high level control of system algorithms
17 EEsof ESL Workshop
18 Presentation Title 11/16/2009
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